Commit Graph

26420 Commits

Author SHA1 Message Date
Juraj Linkeš
91c730fd4e config/arm: remove unused or superfluous variables
Remove variables that were either not used, referenced just once or not
needed.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Tested-by: Vimal Chungath <vcchunga@amazon.com>
Tested-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
2021-01-18 22:39:27 +01:00
Juraj Linkeš
7870ae8994 config/arm: rename variables
Rename Arm build variables and values so that they better conform to Arm
specifications. Also rename generically sounding variable to names that
better capture what the variables hold.

Rename machine_args_generic to part_number_config_arm since the
variable contains more than just the generic machine args and is used
mainly as the fallback arm configuration.
Rename the default machine args to generic machine args to reflect that.
The rest of the variables are self-explanatory.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Tested-by: Vimal Chungath <vcchunga@amazon.com>
Tested-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
2021-01-18 22:38:19 +01:00
Narcisa Vasile
e03d2c3c70 cfgfile: build on Windows
The librte_cfgfile lib is functional on Windows.
Enable compilation of this lib for Windows.

Signed-off-by: Narcisa Vasile <navasile@linux.microsoft.com>
2021-01-17 23:21:14 +01:00
Kumar Amber
bc230b569e raw/ioat: support secondary process
Add support for secondary processes in ioat devices. The update
allocates a memzone for a primary process or returns it in a
secondary process.

Signed-off-by: Kumar Amber <kumar.amber@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-01-17 22:52:35 +01:00
Nithin Dabilpuram
d70e87907a bitmap: support 128-byte cacheline in empty check
Currently bitmap line not empty check API assumes cache line
of 64B and only checks 8 slabs. Since in 128B cacheline, we
have 16 slabs per cacheline, rte_bitmap_clear() will mark
complete line as empty as soon as 8 slabs are empty thereby
breaking bitmap scan functionality. Fix it by defining new
__rte_bitmap_line_not_empty() for 128B cacheline platform.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2021-01-17 22:40:15 +01:00
Nithin Dabilpuram
5e9647fd5a test/bitmap: test scan after half cacheline is cleared
Add a test case to test scan operation post clear of half
cacheline of slabs.

Also fix meson.build to include test_bitmap.c in the compilation.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-01-17 22:37:28 +01:00
Long Li
a2a23a794b net/netvsc: support VF device hot add/remove
When a VF device is present, netvsc can send or receive packets over the
VF device. The VF device driver communicates directly with the PCI device
via the PF from the host hypervisor. This is faster than exchanging data
with netvsp via vmbus, i.e. syntheic path.

In Azure and Hyper-v environments, VF device can be hot added or hot
removed at anytime while guest VM is running. This patch improves netvsc
to support VF device hot add/remove.

1. netvsc monitors all system hot add activities over the PCI bus. When it
detects a VF device is added to the system and is managed under this
netvsc device, it asks EAL to probe and start this VF device, then it
attaches and switches data path to the VF device.

2. After a VF device is attached to netvsc, netvsc monitors this device on
hot remove. When this VF device is hot removed, netvsc switches data path
to synthetic, stops this VF device and removes it from EAL.

3. If any failure happens during a VF device hot remove or add, the netvsc
falls back to synthetic path for all data traffic.

Signed-off-by: Long Li <longli@microsoft.com>
2021-01-17 22:37:28 +01:00
Long Li
1fef6ced07 eal/linux: allow multiple starts of event monitor
In some cases, a device or infrastructure may want to enable hotplug
but application may also try and start hotplug as well. Therefore
change the monitor_started from a boolean into a reference count.

Signed-off-by: Long Li <longli@microsoft.com>
2021-01-17 22:37:28 +01:00
Stephen Hemminger
acdabc450e test: fix terminal settings on exit
When running one test (via DPDK_TEST) the test program
would leave the terminal in raw mode.  This was because
it was setting up cmdline to do interactive input.

The fix is to use cmdline_new() for the interactive case.

This also fixes a memory leak because the test
runner was never calling cmdline_free().

Fixes: 9b848774a5 ("test: use env variable to run tests")
Cc: stable@dpdk.org

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2021-01-17 18:51:13 +01:00
Stephen Hemminger
14df4f2987 test/rwlock: fix spelling and missing whitespace
Trivial fix to for spelling errors and incorrect spacing.
No change to any built code.

Fixes: 7a61fc5d1b ("test/rwlock: add new test-cases")
Fixes: af75078fec ("first public release")
Cc: stable@dpdk.org

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
2021-01-17 18:50:26 +01:00
Tyler Retzlaff
56446c913f eal/windows: fix C++ compatibility
Explicitly cast void * to type * so that EAL headers may be compiled
as C or C++.

Fixes: e8428a9d89 ("eal/windows: add some basic functions and macros")
Cc: stable@dpdk.org

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2021-01-17 18:27:48 +01:00
Lijun Ou
13fd972c6b maintainers: update for hns3
Because Wei Hu has changed to a new job and the
email address (xavier.huwei@huawei.com) has expired,
we remove him from the hns3 maintainer list.

All patches signed-off-by Wei Hu will be copied to Lijun Ou.

Signed-off-by: Lijun Ou <oulijun@huawei.com>
2021-01-17 17:17:02 +01:00
Thomas Monjalon
6a426d733e devtools: reduce ABI checks and static binaries
When testing compilation and checking ABI compatibility,
there is no real need of static binaries eating disks.

The static linkage of applications was already well tested,
though the static examples tested with meson were limited to "l3fwd" only.
The static build test with make is limited to "helloworld" example.

The ABI compatibility is checked on shared libraries,
and there is no need to test again on similar builds.
A new parameter is added to the function "build",
so the ABI check is enabled only for native gcc and clang shared builds,
32-bit, generic armv8 and ppc cross compilations.
In other words, it is disabled for some static builds and some Arm ones.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: David Marchand <david.marchand@redhat.com>
2021-01-15 17:29:51 +01:00
Olivier Matz
5b3ada04f7 test/mcslock: remove unneeded per lcore copy
Each core already comes with its local storage for mcslock (in its
stack), therefore there is no need to define an additional per-lcore
mcslock.

Fixes: 32dcb9fd2a ("test/mcslock: add MCS queued lock unit test")

Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2021-01-15 16:32:19 +01:00
Olivier Matz
de6aede17b service: propagate init error in EAL
Currently, when rte_service_init() fails at initialization, the
application always gets a ENOEXEC error code. For example, with testpmd,
this is displayed as:

  Cannot init EAL: Exec format error

This error code does not describe the real issue. Instead, use the error
code returned by the function.

Fixes: e398245008 ("service: initialize with EAL")
Cc: stable@dpdk.org

Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2021-01-15 16:32:19 +01:00
Tyler Retzlaff
aab8be4497 eal/windows: build reciprocal division functions
Build rte_reciprocal.c and export the following functions on windows:
  * rte_reciprocal_value
  * rte_reciprocal_value_u64

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
2021-01-15 15:04:03 +01:00
Tyler Retzlaff
6605c7f02e bus/pci: fix build with Windows SDK >= 10.0.20253
NetUIO device class and interface GUIDs are defined in system
headers starting from platform SDK v10.0.20253. Inspect SDK
version to avoid redefinition.

Pre-release SDKs do not promise compatibility and a narrow
subset of SDKs may still be subject to redefinition.

Fixes: c76ec01b45 (bus/pci: support netuio on Windows)
Cc: stable@dpdk.org

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Ranjit Menon <ranjit.menon@intel.com>
2021-01-15 14:50:00 +01:00
Thomas Monjalon
924e7d8f67 doc: fix figure numbering in graph guide
Some figures had a title inside the picture but not in RST file.
As a consequence, some versions of Sphinx are emitting a warning.

	Warning, treated as error:
	doc/guides/prog_guide/graph_lib.rst:64:
	no number is assigned for figure: figure-anatomy-of-a-node

The titles are moved from SVG to RST,
except for graph_mem_layout.svg where in-picture title must be kept.

Fixes: 4dc6d8e63c ("doc: add graph library guide")
Cc: stable@dpdk.org

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-01-15 12:28:19 +01:00
Gaetan Rivet
a86cb7e259 bus/dpaa: optimize device name parsing
Device name parsing is done on all buses during device iterations at
either EAL or ethdev levels.

When a bus implements device name parsing slowly, all iterations are
impacted. Efficient implementation is important.

The DPAA bus device name parsing has two issues: it allocates dynamic
memory and uses snprintf without a real need for it. Both can be
avoided, which improves the parsing performance.

The function is also simpler and shorter.

Signed-off-by: Gaetan Rivet <grive@u256.net>
2021-01-15 12:16:11 +01:00
Yicai Lu
324242fb51 ip_frag: remove padding length of fragment
In some situations, we would get several ip fragments, which total
data length is less than min_ip_len(64) and padding with zeros.
We simulated intermediate fragments by modifying the MTU.
To illustrate the problem, we simplify the packet format and
ignore the impact of the packet header.In namespace2,
a packet whose data length is 1520 is sent.
When the packet passes tap2, the packet is divided into two
fragments: fragment A and B, similar to (1520 = 1510 + 10).
When the packet passes tap3, the larger fragment packet A is
divided into two fragments A1 and A2, similar to (1510 = 1500 + 10).
Finally, the bond interface receives three fragments:
A1, A2, and B (1520 = 1500 + 10 + 10).
One fragmented packet A2 is smaller than the minimum Ethernet
frame length, so it needs to be padded.

|---------------------------------------------------|
|                      HOST                         |
| |--------------|   |----------------------------| |
| |      ns2     |   |      |--------------|      | |
| |  |--------|  |   |  |--------|    |--------|  | |
| |  |  tap1  |  |   |  |  tap2  | ns1|  tap3  |  | |
| |  |mtu=1510|  |   |  |mtu=1510|    |mtu=1500|  | |
| |--|1.1.1.1 |--|   |--|1.1.1.2 |----|2.1.1.1 |--| |
|    |--------|         |--------|    |--------|    |
|         |                 |              |        |
|         |-----------------|              |        |
|                                          |        |
|                                      |--------|   |
|                                      |  bond  |   |
|--------------------------------------|mtu=1500|---|
                                       |--------|

When processing the preceding packets above,
DPDK would aggregate fragmented packets A2 and B.
And error packets are generated, which padding(zero)
is displayed in the middle of the packet.

A2 + B:
0000   fa 16 3e 9f fb 82 fa 47 b2 57 dc 20 08 00 45 00
0010   00 33 b4 66 00 ba 3f 01 c1 a5 01 01 01 01 02 01
0020   01 02 c0 c1 c2 c3 c4 c5 c6 c7 00 00 00 00 00 00
0030   00 00 00 00 00 00 00 00 00 00 00 00 c8 c9 ca cb
0040   cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db
0050   dc dd de df e0 e1 e2 e3 e4 e5 e6

So, we would calculate the length of padding, and remove
the padding in pkt_len and data_len before aggregation.
And also we have the fix for both ipv4 and ipv6.

Fixes: 7f0983ee33 ("ip_frag: check fragment length of incoming packet")
Cc: stable@dpdk.org

Signed-off-by: Yicai Lu <luyicai@huawei.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2021-01-15 11:31:28 +01:00
Yi Yang
76f093948f gso: support VXLAN UDP/IPv4
As most NICs do not support segmentation for VXLAN-encapsulated
UDP/IPv4 packets, this patch adds VXLAN UDP/IPv4 GSO support.

Signed-off-by: Yi Yang <yangyi01@inspur.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
2021-01-15 11:31:28 +01:00
Pallavi Kadam
b9d60b5434 drivers/net: build i40e and mlx5 on Windows
Allows i40e and mlx5 PMDs to compile on Windows and disable other drivers.

Disable few i40e warnings with Clang such as comparison of integers of
different signs and macro redefinitions.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Tal Shnaiderman <talshn@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-01-14 23:51:24 +01:00
Pallavi Kadam
edd66d57d5 eal/windows: add random function
The file rte_random.c is required to build i40e PMD on Windows.
Add rte_rand variable to export file.

Redefine _m_prefetchw for Clang toolchain due to following error
with respect to conflicting types:

FAILED: lib/76b5a35@@rte_eal@sta/librte_eal_common_rte_random.c.obj
clang @lib/76b5a35@@rte_eal@sta/librte_eal_common_rte_random.c.obj.rsp
In file included from ../lib/librte_eal/common/rte_random.c:13:
In file included from ..\lib/librte_eal/include\rte_eal.h:20:
In file included from ..\lib/librte_eal/include\rte_per_lcore.h:25:
In file included from ..\lib/librte_eal/windows/include\pthread.h:21:
In file included from ..\lib/librte_eal/windows/include\rte_windows.h:27:
In file included from C:\Program Files (x86)\Windows Kits\10\include\
10.0.18362.0\um\windows.h:171:
In file included from C:\Program Files (x86)\Windows Kits\10\include\
10.0.18362.0\shared\windef.h:24:
In file included from C:\Program Files (x86)\Windows Kits\10\include\
10.0.18362.0\shared\minwindef.h:182:
C:\Program Files (x86)\Windows Kits\10\include\10.0.18362.0\um\
winnt.h:3324:1: error: conflicting types for '_m_prefetchw'
_m_prefetchw (
^
C:\Program Files\LLVM\lib\clang\10.0.0\include\prfchwintrin.h:50:1:
note: previous definition is here
_m_prefetchw(void *__P)
^
1 error generated.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
2021-01-14 23:21:40 +01:00
Tal Shnaiderman
5881b2d2d9 doc: add Windows support for mlx5
Windows is supported by mlx5 PMD.
The mlx5 guide is updated with the needed information.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
2021-01-14 10:12:37 +01:00
Ophir Munk
510893b3dc common/mlx5: enable compilation on Windows
Enable mlx5 common driver on Windows with clang compilation.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:37 +01:00
Tal Shnaiderman
5a90a6e40d common/mlx5: fix pointer cast on Windows
While compiling with clang 11 the callers of the
__mlx5_bit_off macro warns on the cast of pointers to
unsigned long which is a smaller int type in Windows.

warning: cast to smaller integer type 'unsigned long'
from 'u8 (*)[16]' [-Wpointer-to-int-cast]

To resolve it the type is changed to uintptr_t to be
compatible for both Linux and Windows.

Fixes: 865a0c1567 ("net/mlx5: add Direct Verbs prepare function")
Cc: stable@dpdk.org

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:37 +01:00
Michael Baum
7819b8fb9a common/mlx5: remove doorbell allocation functions
The mlx5_devx_dbr_page structure was used to allocate and release the
umem of the doorbells.
Since doorbell and buffer have used same umem, this structure is
useless.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:37 +01:00
Michael Baum
6e0a3637d8 net/mlx5: move Rx RQ creation to common
Using common function for Rx RQ creation.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
edb704da80 common/mlx5: share DevX RQ creation
The RQ object in DevX is used currently only in net driver, but it is
shared for future.

Add a structure that contains all the resources, and provide creation
and release functions for it.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
389ab7f5fd net/mlx5: move ASO SQ creation to common
Using common function for ASO SQ creation.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
74e918604a net/mlx5: move Tx SQ creation to common
Using common function for Tx SQ creation.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
71011bd56b net/mlx5: move rearm and clock queue SQ creation to common
Using common function for DevX SQ creation for rearm and clock queue.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
9de7b16015 regex/mlx5: move DevX SQ creation to common
Using common function for DevX SQ creation.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
38f537635c common/mlx5: share DevX SQ creation
The SQ object in DevX is created in several places and in several
different drivers.
In all places almost all the details are the same, and in particular the
allocations of the required resources.

Add a structure that contains all the resources, and provide creation
and release functions for it.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
f002358cef common/mlx5: enhance page size configuration
The PRM calculates page size in 4K, so need to reduce the log_wq_pg_sz
attribute.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
5cd33796dd net/mlx5: move Rx CQ creation to common
Using common function for Rx CQ creation.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
5f04f70ccf net/mlx5: move Tx CQ creation to common
Using common function for Tx CQ creation.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
c7d41d98a7 net/mlx5: move ASO CQ creation to common
Use common function for ASO CQ creation.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
a7787bb0b7 net/mlx5: move rearm and clock queue CQ creation to common
Using common function for CQ creation at rearm queue and clock queue.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
0e41abd198 vdpa/mlx5: move DevX CQ creation to common
Using common function for DevX CQ creation.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
3ddf57069b regex/mlx5: move DevX CQ creation to common
Using common function for DevX CQ creation.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
9dab4d62b4 common/mlx5: share DevX CQ creation
The CQ object in DevX is created in several places and in several
different drivers.
In all places almost all the details are the same, and in particular the
allocations of the required resources.

Add a structure that contains all the resources, and provide creation
and release functions for it.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
0e8273176e net/mlx5: fix leak on ASO SQ creation failure
In ASO SQ creation, the PMD allocates umem buffer for SQ.

When umem buffer allocation fails, the MR and CQ memory are not freed
what caused a memory leak.

Free it.

Fixes: f935ed4b64 ("net/mlx5: support flow hit action for aging")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
4a7f979af2 net/mlx5: remove CQE padding device argument
The data-path code doesn't take care on 'rxq_cqe_pad_en' and use padded
CQE for any case when the system cache-line size is 128B.

This makes the argument redundant.

Remove it.

Fixes: bc91e8db12 ("net/mlx5: add 128B padding of Rx completion entry")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
a2521c8f98 common/mlx5: fix completion queue entry size configuration
According to the current data-path implementation in the PMD the CQE
size must follow the cache-line size.
So, the configuration of the CQE size should be depended in
RTE_CACHE_LINE_SIZE.

Wrongly, part of the CQE creations didn't follow it exactly what caused
an incompatibility between HW and SW in the data-path when working in
128B cache-line size systems.

Adjust the rule for any CQE creation.
Remove the cqe_size attribute from the DevX CQ creation command and set
it inside the command translation according to the cache-line size.

Fixes: 79a7e409a2 ("common/mlx5: prepare support of packet pacing")
Fixes: 5cd0a83f41 ("common/mlx5: support more fields in DevX CQ create")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Dekel Peled
19e13263ed net/mlx5: fix hairpin flow split decision
Previously, the identification of hairpin queue was done using
mlx5_rxq_get_type() function.
Recent patch replaced it with use of mlx5_rxq_get_hairpin_conf(),
and check of the return value conf != NULL.
The case of return value is NULL (queue is not hairpin) was not handled.
As result, non-hairpin flows were wrongly handled.
This patch adds the required check for return value is NULL.

Fixes: 509f8470de ("net/mlx5: do not split hairpin flow in explicit mode")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-13 19:45:30 +01:00
Tal Shnaiderman
5d55a494f4 net/mlx5: split multi-thread flow handling per OS
multi-threaded flows feature uses pthread function pthread_key_create
but for Windows the destruction option in the function is unimplemented.

To resolve it, Windows will implement destruction mechanism to cleanup
mlx5_flow_workspace object for each terminated thread.

Linux flow will keep the current behavior.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Khoa To <khot@microsoft.com>
2021-01-13 19:45:30 +01:00
Kiran Kumar K
fc4a83e6b8 net/octeontx2: support 24B custom L2 header parsing
Adding support to parse 24B custom L2 header. Added devargs support to
configure the PKIND, and removed the restriction to support custom
headers on non SDP interface.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-01-13 19:39:08 +01:00
Sunil Kumar Kori
54b79ac220 net/octeontx2: fix corruption in segments list
On Tx, lastseg->next is not being reset to null for multi segmented
packet and same mbuf can be used on Rx which has a stale mbuf entry into
mbuf->next.

On Rx, application receives mbuf with mbuf->next uninitialized though
mbuf->nb_segs is correct. Application iterates over all segments using
mbuf->next ignoring mbuf->nb_segs which leads to undefined behavior.

So earlier assumption of just having right value in mbuf->nb_segs is
enough, is incorrect. Mbuf must contain valid and synced value in
nb_segs and next pointer.

Fixes: 364eb0e466 ("net/octeontx2: avoid per packet barrier with multi segment")
Cc: stable@dpdk.org

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-01-13 19:39:08 +01:00
Yunjian Wang
565789662e net/mvneta: check allocation in Rx queue flush
The function rte_malloc() could return NULL, the return value
need to be checked.

Fixes: ce7ea76459 ("net/mvneta: support Rx/Tx")
Cc: stable@dpdk.org

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Acked-by: Liron Himi <lironh@marvell.com>
2021-01-13 19:39:08 +01:00