Initial support for the method. Later patches will extend it to
make FLAG and MARK delivery available on EF100 native datapath.
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Provide an API to let the application control the NIC's ability
to deliver specific kinds of per-packet metadata to the PMD.
Checks for the NIC's ability to set these kinds of metadata
in the first place (support for the flow actions) belong in
flow API responsibility domain (flow validate mechanism).
This topic is out of scope of the new API in question.
The PMD's ability to deliver received metadata to the user
by virtue of mbuf fields should be covered by mbuf library.
It is also out of scope of the new API in question.
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Somnath Kotur <somnath.kotur@broadcom.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Wisam Jaddo <wisamm@nvidia.com>
Enhance support for RSS action in the non-TruFlow path.
This will allow the user or application to update the RSS settings
using RTE_FLOW API.
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Fix Rx queue state on device start.
The state of Rx queues could be incorrect in some cases
because instead of updating the state for all the Rx queues,
we are updating it for queues in a VNIC.
Fixes: 0105ea1296 ("net/bnxt: support runtime queue setup")
Cc: stable@dpdk.org
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
Aggregation rings are needed when PMD needs to support jumbo frames, LRO.
Currently we are creating the aggregation rings whether jumbo frames or
LRO has been enabled or disabled. This causes unnecessary allocation of
mbufs needing larger mbuf pool which is not used at all.
This patch modifies the code to create aggregation rings only when
needed.
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Support of the keep-CRC offloading by checking
the relevant FW capability (scatter_fcs) for NIC support.
Supported offload:
DEV_RX_OFFLOAD_KEEP_CRC
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
mlx5 in Windows needs the hca capability scatter_fcs
to query the NIC support for the CRC keeping offload.
Added the capability as part of the capabilities
queried by the PMD using DevX.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
Support of the VLAN stripping offloading by checking
the relevant FW capability (vlan_cap) for NIC support.
Supported offload:
DEV_RX_OFFLOAD_VLAN_STRIP
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
mlx5 in Windows needs the hca capability vlan_cap
to query the NIC for VLAN stripping support
Added the capability as part of the capabilities
queried by the PMD using DevX.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
Support of the TSO offloading by checking
the relevant FW capability for NIC support.
Supported offloads:
DEV_TX_OFFLOAD_TCP_TSO
DEV_TX_OFFLOAD_VXLAN_TNL_TSO
DEV_TX_OFFLOAD_GRE_TNL_TSO
DEV_TX_OFFLOAD_GENEVE_TNL_TSO
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
mlx5 in Windows needs the hca capability max_lso_cap
to query the NIC for TSO offloading support.
Added the capability as part of the capabilities
queried by the PMD using DevX.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
Query tunneling supported on the NIC.
Save the offloads values in a config parameter.
This is needed for the following TSO support:
DEV_TX_OFFLOAD_VXLAN_TNL_TSO
DEV_TX_OFFLOAD_GRE_TNL_TSO
DEV_TX_OFFLOAD_GENEVE_TNL_TSO
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
mlx5 in Windows needs the tunneling hca capabilities
to query the NIC for Inner TSO offloading support.
Added the capability as part of the capabilities
queried by the PMD using DevX.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
Currently, the PMD decides if the tunneling offload
can enable VXLAN/GRE/GENEVE tunneled TSO support by checking
config->tunnel_en (single bit) and config->tso.
This is incorrect, the right way is to check the following
flags returned by the mlx5dv_query_device function:
MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN - if supported the offload
DEV_TX_OFFLOAD_VXLAN_TNL_TSO can be enabled.
MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE - if supported the offload
DEV_TX_OFFLOAD_GRE_TNL_TSO can be enabled.
MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE - if supported the offload
DEV_TX_OFFLOAD_GENEVE_TNL_TSO can be enabled.
The fix enables the offloads according to the correct
flags returned by the kernel.
Fixes: dbccb4cddc ("net/mlx5: convert to new Tx offloads API")
Cc: stable@dpdk.org
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
Query software parsing supported on the NIC.
Save the offloads values in a config parameter.
This is needed for the outer IPv4 checksum and
IP and UDP tunneled packet TSO support.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
mlx5 in Windows needs the software parsing hca capabilities
to query the NIC for TSO and Checksum offloading support.
Added the capability as part of the capabilities
queried by the PMD using DevX.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
Currently, the PMD decides if the software parsing
offload can enable outer IPv4 checksum and tunneled
TSO support by checking config->hw_csum and config->tso
respectively.
This is incorrect, the right way is to check the following
flags returned by the mlx5dv_query_device function:
MLX5DV_SW_PARSING - check general swp support.
MLX5DV_SW_PARSING_CSUM - check swp checksum support.
MLX5DV_SW_PARSING_LSO - check swp LSO/TSO support.
The fix enables the offloads according to the correct
flags returned by the kernel.
Fixes: e46821e9fc ("net/mlx5: separate generic tunnel TSO from the standard one")
Cc: stable@dpdk.org
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
Common octeontx2 code shares some of the PCI identifiers
with cn10k platform and if built wrong drivers may be probed.
octeontx2 configuration disables common cn10k code so disable
common octeontx2 on cn10k.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Add helper functions that allow one to check platform
ROC is running on. Platform type is retrieved from device
tree attribute runplatform which is updated by EBF accordingly.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Maximum interrupt number function used direct access to
structure field while ROC helper exists and serves the
same purpose.
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
One sends commands and receive responses by enqueuing or dequeuing
custom messages. In order to simplify this scheme simple wrappers
were added which take care of all the heavy lifting.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
When the iavf_adapter instance is not initialized completely in the
primary process, the secondary process accesses its "rte_eth_dev"
member, it causes secondary process crash.
This patch replaces eth_dev with eth_dev_data in iavf_adapter.
Fixes: f978c1c9b3 ("net/iavf: add RSS hash parsing in AVX path")
Fixes: 9c9aa00403 ("net/iavf: add offload path for Rx AVX512 flex descriptor")
Fixes: 63660ea3ee ("net/iavf: add RSS hash parsing in SSE path")
Cc: stable@dpdk.org
Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
This patch adds some defines related to DDP Track ID.
Signed-off-by: Artur Tyminski <arturx.tyminski@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Update FVL FW API version to 1.15
Signed-off-by: Maciej Paczkowski <maciej.paczkowski@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Add raw format for i40e_32byte_rx_desc, right now this only be used
by kernel driver, the commit is just to sync with kernel driver.
Signed-off-by: Björn Töpel <bjorn.topel@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Add macros and structures for MAC frequency calculation in case the link
is not present.
Remove duplicate definition in i40e_ethdev.c
Signed-off-by: Piotr Kwapulinski <piotr.kwapulinski@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
The variable checksum from i40e_calc_nvm_checksum is used before return
value is checked. Fix this logic.
Fixes: 8db9e2a1b2 ("i40e: base driver")
Fixes: 3ed6c3246f ("i40e/base: handle AQ timeout when releasing NVM")
Cc: stable@dpdk.org
Signed-off-by: Christopher Pau <christopher.pau@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
The status of i40e_read_nvm_word is not checked, so variables set
from this function could be used uninitialized. In this case, preserve
the existing flow that does not block initialization by initializing
these values from the start.
Fixes: 8d6c51fcd2 ("i40e/base: get OEM version")
Fixes: 2db7057424 ("net/i40e/base: limit PF/VF specific code to that driver only")
Cc: stable@dpdk.org
Signed-off-by: Christopher Pau <christopher.pau@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Fix mismatched function name in comments.
Fixes: 8db9e2a1b2 ("i40e: base driver")
Fixes: 842ea19963 ("i40e/base: save link module type")
Fixes: fd72a2284a ("i40e/base: support LED blinking with new PHY")
Fixes: 788fc17b2d ("i40e/base: support proxy config for X722")
Cc: stable@dpdk.org
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Add flags for outer VLAN and include set port parameters.
Add flags, which describe port and switch state for both double VLAN
functionality and outer VLAN processing.
Signed-off-by: Przemyslaw Patynowski <przemyslawx.patynowski@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
For Active Optical Cable (AOC) the correct media type is "Fibre",
not "Direct Attach Copper".
Fixes: d749d4d899 ("i40e/base: add AOC PHY types")
Fixes: aa153cc89f ("net/i40e/base: add new PHY types for 25G AOC and ACC")
Cc: stable@dpdk.org
Signed-off-by: Dawid Lukwinski <dawid.lukwinski@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
The X722 card has 'Link Type' information elsewhere than the X710.
Previously, for all cards, the 'Link Type' information was retrieved by
opcode 0x0607 and this value was wrong for all X722 cards.
Now this information for X722 only is taken by opcode 0x0600
(function: i40e_aq_get_phy_capabilities) instead of an opcode
0x0607 (function: i40e_aq_get_link_info).
All other parameters read by opcode 0x0607 unchanged.
Fixes: e6691b428e ("i40e/base: fix PHY NVM interaction")
Fixes: 75c3de654e ("net/i40e/base: fix long link down notification time")
Cc: stable@dpdk.org
Signed-off-by: Jaroslaw Gawin <jaroslawx.gawin@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
PF has to delete all the filters during reset.
If it is fully loaded with filters then it is possible that it will take
more than 200 ms to finish the reset resulting in timeout during pf_reset
and PF reset failed, -15 error indication.
Increasing the timeout value for PF reset from 200 to 1000 to give PF
more time to finish reset if it is loaded with filters.
Fixes: 1e32378f07 ("i40e/base: increase PF reset max loop limit")
Cc: stable@dpdk.org
Signed-off-by: Sylwester Dziedziuch <sylwesterx.dziedziuch@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Unlike other supported adapters, 2.5G and 5G use different PHY type
identifiers for reading/writing PHY settings and for reading link status.
This commit introduces separate PHY identifiers for these two operation
types.
Fixes: 988ed63c74 ("net/i40e/base: add support for Carlsville device")
Cc: stable@dpdk.org
Signed-off-by: Dawid Lukwinski <dawid.lukwinski@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Add definitions for Shadow RAM pointers: 6th FPA (Free Provisioning Area)
module, 5th FPA module in X722 and Preservation Rules module.
These definitions are not using by DPDK now, the purpose of this commit
is to sync base code with kernel driver.
Signed-off-by: Stanislaw Grzeszczak <stanislaw.a.grzeszczak@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Some customers want to downgrade to an earlier FW security revision, this
already implemented by FW so that customers can have more control over
the security revisions they can use. FW also implemented a mechanism via
NVMupdate to allow the users to accept or not a baseline Min SRev version
that will limit the secure version rollback only down to that level.
This commit increments X722 API version and adds new minimal rollback
revision that related to the extended implementation of Security Revision
Opt-In for 4 more X722 modules.
These definitions are not using by DPDK now, the purpose of this commit
is sync with latest share code.
Signed-off-by: Stanislaw Grzeszczak <stanislaw.a.grzeszczak@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
ASQ(Admin Send Queue) send command functions are returning only i40e
status codes yet some calling functions also need Admin Queue status that
is stored in hw->aq.asq_last_status. Since hw object is stored on a heap
it introduces a possibility for a race condition in access to hw if
calling function is not fast enough to read hw->aq.asq_last_status before
next send ASQ command is executed.
Added new versions of send ASQ command functions that return Admin Queue
status on the stack to avoid race conditions in access to
hw->aq.asq_last_status.
Added new _v2 version of i40e_aq_remove_macvlan and i40e_aq_add_macvlan
that is using new _v2 versions of ASQ send command functions and returns
the Admin Queue status on the stack.
Signed-off-by: Sylwester Dziedziuch <sylwesterx.dziedziuch@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
On the vector implementation, during the tear-down, the mbufs not
drained in the RxQ and TxQ are freed based on an algorithm which
supposed that the number of descriptors is a power of 2 (max_desc).
Based on this hypothesis, this algorithm uses a bitmask in order to
detect an index overflow during the iteration, and to restart the loop
from 0.
However, there is no such power of 2 requirement in the ixgbe for the
number of descriptors in the RxQ / TxQ. The only requirement is to have
a number correctly aligned.
If a user requested to configure a number of descriptors which is not a
power of 2, as a consequence, during the tear-down, it was possible to
be in an infinite loop, and to never reach the exit loop condition.
By removing the bitmask and changing the loop method, we can avoid this
issue, and allow the user to configure a RxQ / TxQ which is not a power
of 2.
Fixes: c95584dc2b ("ixgbe: new vectorized functions for Rx/Tx")
Cc: stable@dpdk.org
Signed-off-by: Julien Meunier <julien.meunier@nokia.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Some packets are discarded by the NIC because they are larger than
the MTU, these packets should be counted as "RX error" instead of
"RX packet", for example:
pkt1 = Ether()/IP()/Raw('x' * 1400)
pkt2 = Ether()/IP()/Raw('x' * 1500)
---------------- Forward statistics for port 0 -----------------
RX-packets: 2 RX-dropped: 0 RX-total: 2
TX-packets: 1 TX-dropped: 0 TX-total: 1
----------------------------------------------------------------
Here the packet pkt2 has been discarded, but still was counted
by "RX-packets"
The register 'GL_RXERR1' can count above discarded packets.
This patch adds reading and calculation of the 'GL_RXERR1' counter
when reporting DPDK statistics.
Fixes: f4a91c38b4 ("i40e: add extended stats")
Cc: stable@dpdk.org
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
If GTPU Extension header has no pdu_type setting, the parsed value of
gtp_psc_spec->hdr.type will be 0, which is same as IAVF_GTPU_EH_DWLINK.
Thus, for this case, we should check gtp_psc_mask->hdr.type instead,
to set QFI field bit of GTPU_EH first.
Fixes: cd212c4669 ("net/iavf: fix QFI fields of GTPU UL/DL for flow director")
Cc: stable@dpdk.org
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Indirect actions should be used to do shared counters.
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Somnath Kotur <somnath.kotur@broadcom.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Make it simpler to debug configurations and code related to the representor
info API.
Signed-off-by: Viacheslav Galaktionov <viacheslav.galaktionov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
The representor support has been implemented to some extent, and the fact
that ethdev mport is equivalent to entity mport is by design.
Fixes: 1fb65e4dae ("net/sfc: support flow action port ID in transfer rules")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Galaktionov <viacheslav.galaktionov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Let the driver provide the user with information about available
representors by implementing the representor_info_get operation.
Due to the lack of any structure to representor IDs, every ID range
describes exactly one representor.
Signed-off-by: Viacheslav Galaktionov <viacheslav.galaktionov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Representor IDs must be unique for each representor. VFs, which are
currently used, are not unique as they may repeat in combination with
different PCI controllers and PFs. On the other hand, switch port IDs
are unique, so they are a better fit for this role.
Signed-off-by: Viacheslav Galaktionov <viacheslav.galaktionov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Allow the user to specify representor entities using the structured
parameter values.
Signed-off-by: Viacheslav Galaktionov <viacheslav.galaktionov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Make representor names unique on multi-host configurations.
Signed-off-by: Viacheslav Galaktionov <viacheslav.galaktionov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
This information will be useful when representor info API is implemented.
Signed-off-by: Viacheslav Galaktionov <viacheslav.galaktionov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
