Commit Graph

2918 Commits

Author SHA1 Message Date
Wojciech Macek
5c3e53ef19 PowerNV: make PowerNV PCIe working on a real hardware
Fixes:
- map all devices to PE0
- use 1:1 TCE mapping
- provide the same TCE mapping for all PEs (not only PE0)
- add TCE reset and alignment (required by OPAL)

Created by:            Wojciech Macek <wma@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          QCM Technologies
2018-01-17 07:39:11 +00:00
Wojciech Macek
8fc8068eba PowerNV: XICS support for PowerNV/OPAL
Make XICS to be OPAL-aware.

Created by:            Nathan Whitehorn <nwhitehorn@freebsd.org>
Submitted by:          Wojciech Macek <wma@semihalf.com>
Sponsored by:          FreeBSD Foundation
2018-01-16 06:24:19 +00:00
Justin Hibbits
e64428edf7 Make fsl_sata driver work on P1022
P1022 SATA controller may set the wrong CCR bit for a command completion.
This would previously cause an interrupt storm.  Solve this by marking all
commands complete, and letting the end_transaction deal with the successes.
Causes no problems on P5020.

While here, fix a minor bug in collision detection.  The Freescale SATA
controller only has 16 slots, not 32.
2018-01-16 04:50:23 +00:00
Pedro F. Giffuni
6d5bc1bcab powerpc: make some use of mallocarray(9).
Focus on code where we are doing multiplications within malloc(9). None of
these ire likely to overflow, however the change is still useful as some
static checkers can benefit from the allocation attributes we use for
mallocarray.

This initial sweep only covers malloc(9) calls with M_NOWAIT. No good
reason but I started doing the changes before r327796 and at that time it
was convenient to make sure the sorrounding code could handle NULL values.

X-Differential revision: https://reviews.freebsd.org/D13837
2018-01-15 21:10:40 +00:00
Nathan Whitehorn
fc8ea4be2a Install the SLB miss trap-handling code in the SLB-based MMU driver set up,
to which it is specific, rather than in the generic AIM startup code. This
will be required to support the radix-table-based MMU introduced with POWER9.
2018-01-15 16:08:34 +00:00
Nathan Whitehorn
04329fa708 Move the pmap-specific code in copyinout.c that gets pointers to userland
buffers into a new pmap-module function pmap_map_user_ptr() that can
be implemented by the respective modules. This is required to implement
non-segment-based AIM-ish MMU systems such as the radix-tree page tables
introduced by POWER ISA 3.0 and present on POWER9.

Reviewed by:	jhibbits
2018-01-15 06:46:33 +00:00
Nathan Whitehorn
68b9c019aa Document places we assume that physical memory is direct-mapped at zero by
using a new macro PHYS_TO_DMAP, which deliberately has the same name as the
equivalent macro on amd64. This also sets the stage for moving the direct
map to another base address.
2018-01-13 23:14:53 +00:00
Justin Hibbits
4a20766452 Include only the headers needed
The extra headers came through evolution of the file.
2018-01-13 21:10:42 +00:00
Justin Hibbits
8e14018389 Add SPDX identifier to header
Reported by:	pfg
2018-01-13 17:25:48 +00:00
Nathan Whitehorn
222393d5ca Chase removal of FDT fixup code on PowerPC in r327907. 2018-01-13 03:09:05 +00:00
Justin Hibbits
e9f96ff457 Enable L2 cache on supported PowerQUICC and QorIQ platforms
Some PowerQUICC and QorIQ platforms have a L2 cache managed via the
memory-mapped configuration registers, and appear as a node in the device
tree.  This adds basic support to enable the cache.
2018-01-13 01:36:37 +00:00
Jeff Roberson
6f4acaf4c9 Add support for NUMA domains to bus dma tags. This causes all memory
allocated with a tag to come from the specified domain if it meets the
other constraints provided by the tag.  Automatically create a tag at
the root of each bus specifying the domain local to that bus if
available.

Reviewed by:	jhb, kib
Tested by:	pho
Sponsored by:	Netflix, Dell/EMC Isilon
Differential Revision:	https://reviews.freebsd.org/D13545
2018-01-12 23:34:16 +00:00
Jeff Roberson
ab3185d15e Implement NUMA support in uma(9) and malloc(9). Allocations from specific
domains can be done by the _domain() API variants.  UMA also supports a
first-touch policy via the NUMA zone flag.

The slab layer is now segregated by VM domains and is precise.  It handles
iteration for round-robin directly.  The per-cpu cache layer remains
a mix of domains according to where memory is allocated and freed.  Well
behaved clients can achieve perfect locality with no performance penalty.

The direct domain allocation functions have to visit the slab layer and
so require per-zone locks which come at some expense.

Reviewed by:	Attilio (a slightly older version)
Tested by:	pho
Sponsored by:	Netflix, Dell/EMC Isilon
2018-01-12 23:25:05 +00:00
Wojciech Macek
504d9b6029 PowerNV: update OPAL driver
Update OPAL driver with:
- better console support
- proper AP configuration
- enhanced IRQ/OFW mapping
- RTC support

Created by:            Nathan Whitehorn <nwhitehorn@freebsd.org>
Submitted by:          Wojciech Macek <wma@semihalf.com>
Sponsored by:          FreeBSD Foundation
2018-01-12 12:14:52 +00:00
Wojciech Macek
ac9b43252a PowerNV: initial support for PCIe host controller
Provide initial support for PCIe host controller as
well as for IOMMU mapping. This commit allows proper
bus enumeration, but does not guarantee DMA operations
are working.

Created by:            Nathan Whitehorn <nwhitehorn@freebsd.org>
Submitted by:          Wojciech Macek <wma@semihalf.com>
Sponsored by:          FreeBSD Foundation
2018-01-12 07:55:49 +00:00
Wojciech Macek
fc1689021f PowerNV: add buffer for OPAL console
Avoid the lock in vtophys() by providing a static direct-mapped
spinlock- protected output buffer to use when the console driver
cannot acquire locks for some reason. This allows the idle thread
to use printf() (e.g. the SMP startup messages) without crashing
the kernel.

Created by:            Nathan Whitehorn <nwhitehorn@freebsd.org>
Submitted by:          Wojciech Macek <wma@freebsd.org>
Sponsored by:          FreeBSD Foundation
2018-01-11 09:42:24 +00:00
Wojciech Macek
c024897601 PowerNV: set LPCR[LPES] correctly
Make sure to set LPCR[LPES] so that external interrupts set SRR0 and SRR1
instead of HSRR0 and HSRR1. Without this, external interrupt handlers would
get the wrong MSR value when executing, causing eventual madness.

Created by:            Nathan Whitehorn <nwhitehorn@freebsd.org>
Submitted by:          Wojciech Macek <wma@freebsd.org>
Sponsored by:          FreeBSD Foundation
2018-01-11 09:39:38 +00:00
Wojciech Macek
01d7bda7b7 PowerNV: correctly start secondary CPUs
Fix AP startup, which was broken.

Created by:            Nathan Whitehorn <nwhitehorn@freebsd.org>
Submitted by:          Wojciech Macek <wma@freebsd.org>
Sponsored by:          FreeBSD Foundation
2018-01-11 09:34:33 +00:00
Wojciech Macek
32d1354a39 PowerNV: add reset, poweroff, OPAL console
Add basic power control (reset, power off) and bind
ttyuX to opal console so that init will start login there.

Created by:            Nathan Whitehorn <nw@freebsd.org>
Submitted by:          Wojciech Macek <wma@freebsd.org>
Sponsored by:          FreeBSD Foundation
2018-01-11 09:26:28 +00:00
Wojciech Macek
fb3855e0e7 PowerNV: initial support for OPAL
OPAL is a dedicated firmware acting as a hypervisor.
Add generic functions to provide all access.

Created by:            Nathan Whitehorn <nw@freebsd.org>
Submitted by:          Wojciech Macek <wma@freebsd.org>
2018-01-11 07:40:06 +00:00
Landon J. Fuller
a1df0d9592 Fix minor locking issues in the Power Mac Uninorth PCI bridge driver.
- Call resource_int_value() once during attach, rather than within the
  pci_(read|write)_config() code path; this avoids taking a blocking mutex
  to read kenv variables.

- Use a spin lock to protect non-atomic config space accesses; this matches
  the behavior of Darwin's AppleMacRiscPCI driver.

Reviewed by:	jhibbits
Differential Revision:	https://reviews.freebsd.org/D13839
2018-01-10 22:19:11 +00:00
Nathan Whitehorn
566a135bd5 Add XHCI support to powerpc64 GENERIC. This is useful to get input devices
supported on newer POWER hardware and in graphical VMs run on the same,
which are typically XHCI-only. The 32-bit GENERIC kernel, which
does not run on hardware made in the last decade and is unlikely to
encounter XHCI devices, is left unchanged.

PR:		kern/224940
Submitted by:	Gustavo Romero
MFC after:	1 week
2018-01-09 19:41:10 +00:00
Nathan Whitehorn
09f07b0017 Revert r327360, which can cause boot problems on high-CPU-count (>60)
POWER8 and POWER9 systems, pending further analysis.

PR:		224841
2018-01-04 23:07:51 +00:00
Andreas Tobler
7e792cb8f5 The recent bump of MAXDSIZ made 32-bit binary execution on 64-bit powerpc fail.
The data segement was too big.

Add a fix-up function like on ia32 for MAXDSIZ.

While here, bring also the MAXSSIZ closer to amd64 and add an equal fix-up
function for MAXSSIZ.

Reviewed by:	jhibbits@
Obtained from:  jhibbits@
Differential Revision:	https://reviews.freebsd.org/D13753
2018-01-03 20:20:43 +00:00
Nathan Whitehorn
67530f82dd Fix reversed endianness that crept in at some point. Blue is now blue
instead of pink.

MFC after:	3 days
2018-01-02 03:59:46 +00:00
Nathan Whitehorn
3972f4c1d4 Remove PIR from PCPU data. It has an implementation-defined meaning that
is of limited utility outside of platform-specific code and can vary
at runtime when running as a hypervisor guest, so does not even have the
virtue of being a static identifier.

Reviewed by:	jhibbits
2017-12-31 20:23:39 +00:00
Nathan Whitehorn
4e05ac247c Fix 32-bit build. 2017-12-31 20:20:55 +00:00
Nathan Whitehorn
f81dfc7f6b Make newer binutils happy by using a bl-type branch instead of b, which
displeases it for some reason. LR is not relevant in this code, so just
do what it wants.
2017-12-31 20:10:08 +00:00
Nathan Whitehorn
ec75f647cc Provide relative, as well as absolute, addresses in trap panic panics. This
makes it easier to cross-correlate them with instruction listings without
worrying about where the kernel was relocated to.

MFC after:	1 week
2017-12-31 20:08:16 +00:00
Colin Percival
d5d7606c0c Use the TSLOG framework to record entry/exit timestamps for DELAY and
_vprintf; these functions are called in many places and can contribute
meaningfully to the total time spent booting.
2017-12-31 09:24:41 +00:00
Nathan Whitehorn
5261ac0eda Use data from the boot loader to pick the appropriate output graphics mode
instead of hard-coding a default. This information is passed implicitly by
the PS3 firmware and can be relied upon. Also adjust the default mode, if
somehow firmware doesn't pass one, to 1920x1080 from 720x480 since it is
2017.

MFC after:	2 weeks
2017-12-31 06:10:07 +00:00
Nathan Whitehorn
a891d21aac Make sure the first instruction of the low-memory spinloop is in the
cacheline being invalidated.

MFC after:	1 month
2017-12-31 05:38:19 +00:00
Nathan Whitehorn
3fca788024 Remove logic for early console with loader.ps3 now that loader.ps3 is dead. 2017-12-30 20:25:33 +00:00
Nathan Whitehorn
ba06dbb874 Change the way SMP startup works to match the new multi-AP features in
locore64.S introduced in r327358.

MFC after:	3 weeks
2017-12-30 20:24:33 +00:00
Nathan Whitehorn
f9d6e0a5d0 Enhance the CHRP/pSeries platform layer:
- Densely number CPUs to avoid systems with CPUs with very high ID numbers
- Always have the BSP be CPU 0 to avoid remnant brokenness with non-0 BSPs
  in other parts of the kernel.
- Improve parsing of the device tree CPU listings on SMT systems.
- Allow reboot via RTAS as well as OF for pSeries systems booted by FDT
  without functioning Open Firmware.

Obtained from:	projects/powernv
MFC after:	3 weeks
2017-12-29 21:09:17 +00:00
Nathan Whitehorn
70f654991a Add support for 64-bit PowerPC kernels to be directly loaded by kexec, which
is used as the bootloader on a number of PPC64 platforms. This involves the
following pieces:
- Making the first instruction a valid kernel entry point, since kexec
  ignores the ELF entry value. This requires a separate section and linker
  magic to prevent the linker from filling the beginning of the section
  with stubs.
- Adding an entry point at 0x60 past the first instruction for systems
  lacking firmware CPU shutdown support (notably PS3).
- Linker script changes to support the above.

MFC after:	1 month
2017-12-29 20:30:10 +00:00
Nathan Whitehorn
8469e0fe35 Maintain alignment of in-code 64-bit quantities by design rather than luck.
If these are not aligned, the linker has to emit a different type of
relocation that the early boot self-relocation code cannot handle, even
in principle, resulting in them being set to zero and the kernel crashing.

MFC after:	1 week
2017-12-29 20:25:15 +00:00
Nathan Whitehorn
2ad331874e Remove ELF note for Open Firmware. It is marked optional in a single 1996
draft of a never-finalized standard (CHRP) and is irrelevant in practice
on FreeBSD since we load the kernel with loader(8) on Open Firmware
platforms anyway. Moreover, loader(8), which is directly loaded by Open
Firmware, has never had an equivalent note.

MFC after:	2 weeks
2017-12-28 23:49:53 +00:00
Eitan Adler
caa7e52f3f kernel: Fix several typos and minor errors
- duplicate words
- typos
- references to old versions of FreeBSD

Reviewed by:	imp, benno
2017-12-27 03:23:21 +00:00
Justin Hibbits
87879ba805 Increase default MAXDSIZ to 32G on powerpc64
Linking LLVM now seems to require more than 1GB data size, so increase the
default to 32G, which matches amd64.

Reviewed by:	nwhitehorn
2017-12-20 16:49:45 +00:00
Nathan Whitehorn
d6716aa2af The highest-order bit of the bootloader cookie is 1, with the result that
the 32-bit cookie can be sign-extended on its way out of the loader and
through Open Firmware. If sign-extended, the in-kernel check of its value
would fail on 64-bit systems, resulting in a mountroot prompt. Solve this
by telling the kernel to ignore the high-order bits.

PR:		kern/224437
Submitted by:	Gustavo Romero
2017-12-19 16:45:40 +00:00
Konstantin Belousov
30d4f9e888 Add atomic_load(9) and atomic_store(9) operations.
They provide relaxed-ordered atomic access semantic.  Due to the
FreeBSD memory model, the operations are syntaxical wrappers around
the volatile accesses.  The volatile qualifier is used to ensure that
the access not optimized out and in turn depends on the volatile
semantic as implemented by supported compilers.

The motivation for adding the operation is to help people coming from
other systems or knowing the C11/C++ standards where atomics have
special type and require use of the special access operations.  It is
still the case that FreeBSD requires plain load and stores of aligned
integer types to be atomic.

Suggested by:	jhb
Reviewed by:	alc, jhb
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D13534
2017-12-19 09:59:20 +00:00
Justin Hibbits
7cd4e55c43 Handle the Facility Unavailable exception as a SIGILL
Currently Facility Unavailable is absent and once an application
tries to use or access a register from a feature disabled in the
CPU it causes a kernel panic.

A simple test-case is:

int main() { asm volatile ("tbegin.;"); }

which will use TM (Hardware Transactional Memory) feature which
is not supported by the kernel and so will trigger the following
kernel panic:

----

fatal user trap:

    exception       = 0xf60 (unknown)
    srr0            = 0x10000890
    srr1            = 0x800000000000f032
    lr              = 0x100004e4
    curthread       = 0x5f93000
    pid = 1021, comm = htm

panic: unknown trap
cpuid = 40
KDB: stack backtrace:
Uptime: 3m18s
Dumping 10 MB (3 chunks)
    chunk 0: 11MB (2648 pages) ... ok
    chunk 1: 1MB (24 pages) ... ok
    chunk 2: 1MB (2 pages)panic: IOMMU mapping error: -4

cpuid = 40
Uptime: 3m18s

----

Since Hardware Transactional Memory is not yet supported by FreeBSD, treat
this as an illegal instruction.

PR:		224350
Submitted by:	Gustavo Romero <gromero_AT_ibm_DOT_com>
MFC after:	2 weeks
2017-12-15 04:11:20 +00:00
Justin Hibbits
9ee02cd6f8 Add identifier for POWER9 CPU to CPU list
Without the identifier in the list booting FreeBSD results in printing the
following (from a PowerKVM boot):

cpu0: Unknown PowerPC CPU revision 0x1201, 2550.00 MHz

For now, add the same feature list as POWER8.  As new capabilities are added to
support POWER9 specific features, they will be added to this.

PR:		224344
Submitted by:	Breno Leitao <breno_DOT_leitao_AT_gmail_DOT_com>
2017-12-14 20:01:04 +00:00
Justin Hibbits
bf1b92967f Decode some PowerPC trap registers
Decode on Book-E:
* ESR (Exception Syndrome Register)
* MCSR (Machine Check Status Register)

On AIM:
* MSSSR (Memory Subsystem Status Register)

Makes it easier to tell at a glance the type of trap and machine check
conditions now.
2017-12-12 03:16:10 +00:00
Mark Johnston
5bab623438 Pass the trap frame to fasttrap hooks.
The DTrace fasttrap entry points expect a struct reg containing the
register values of the calling thread. Perform the conversion in
fasttrap rather than in the trap handler: this reduces the number of
ifdefs and avoids wasting stack space for traps that don't involve
DTrace.

MFC after:	2 weeks
2017-12-11 19:21:39 +00:00
Justin Hibbits
713e844971 Retrieve the page outside of holding locks
pmap_track_page() only works with physical memory pages, which have a
constant vm_page_t address.  Microoptimize pmap_track_page() to perform one
less operation under the lock.
2017-12-10 04:43:27 +00:00
Justin Hibbits
94a9d7c3b9 Remove PTE VA mappings for tracked pages in 64-bit mode
This was done in 32-bit mode, but not duplicated when 64-bit mode was
brought in.  Without this, stale mappings can be left, leading to odd
crashes when the wrong VA is checked in XX_PhysToVirt() (dpaa(4)).
2017-12-08 03:49:53 +00:00
Bruce Evans
fb3cc1c37d Move instantiation of msgbufp from 9 MD files to subr_prf.c.
This variable should be pure MI except possibly for reading it in MD
dump routines.  Its initialization was pure MD in 4.4BSD, but FreeBSD
changed this in r36441 in 1998.  There were many imperfections in
r36441.  This commit fixes only a small one, to simplify fixing the
others 1 arch at a time.  (r47678 added support for
special/early/multiple message buffer initialization which I want in
a more general form, but this was too fragile to use because hacking
on the msgbufp global corrupted it, and was only used for 5 hours in
-current...)
2017-12-07 07:55:38 +00:00
Justin Hibbits
89c3a53299 Override memattr for mmap on the Freescale DIU driver
The Display Interface Unit (DIU) uses main memory for the framebuffer, which
is already mapped as cache coherent physical memory.  Prevent mmap() from
using its own attributes which may otherwise conflict.
2017-12-02 01:42:07 +00:00
Pedro F. Giffuni
796df753f4 SPDX: Consider code from Carnegie-Mellon University.
Interesting cases, most likely from CMU Mach sources.
2017-11-30 15:48:35 +00:00
Scott Long
c15269ccb8 It's time to retire AHC_REG_PRETTY_PRINT and AHD_REG_PRETTY_PRINT from
the standard kernels.  They are still available as custom compile
options.
2017-11-29 23:41:49 +00:00
Justin Hibbits
3de971a61a Only check the page tables if within the KVA.
Devices aren't mapped within the KVA, and with the way 64-bit hashes the
addresses pte_vatopa() may not return a 0 physical address for a device.

MFC after:	1 week
2017-11-29 01:26:07 +00:00
Nathan Whitehorn
2bfca5775b Back out OF module installation in the event of failure. PS3 firmware gives
some ancient FDT version (2) that fails the init check in OFW_FDT. It is
still possible to make progress, but not while the OF layer is going crazy.
2017-11-28 06:31:39 +00:00
Pedro F. Giffuni
71e3c3083b sys/powerpc: further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
2017-11-27 15:09:59 +00:00
Justin Hibbits
41eeef87ca Synchronize TLB1 mappings when created
This allows modules creating mappings to be loaded post-boot, after SMP has
started.  Without this, the TLB1 mappings can become unsynchronized and lead
to kernel page faults when accessed on the alternate CPUs.

MFC after:	3 weeks
2017-11-26 20:30:02 +00:00
Nathan Whitehorn
b78f74e564 Remove another extern int n_slbs made redundant by declaring this in
mmu_oea64.h.

MFC after:	3 weeks
2017-11-26 04:34:13 +00:00
Nathan Whitehorn
47f69f4f2b Use the cookie now set by loader to determine whether the value passed to
PowerPC kernels in r6 is actually metadata from loader(8) or gibberish
left in r6, which is not required to be anything under the
PAPR/ePAPR/CHRP/OF standards, by another boot loader.

Note that, as a result, systems need a new boot loader to boot PPC kernels
after this revision without ending up at a mountroot prompt. New boot
loaders are backwards compatible and can boot older kernels.

Reviewed by:	jhibbits
MFC after:	2 months
2017-11-26 03:53:20 +00:00
Nathan Whitehorn
91419bdafd Avoid assumptions about the BSP being CPU 0.
MFC after:	3 weeks
2017-11-25 23:23:24 +00:00
Nathan Whitehorn
8a92c52a84 On AIM systems, it is not actually possible to stop the CPU timer, so we
just set it to a large default value (and inherit any previously existing
value), hoping it never turns over. Instead, silently allow spurious
one-shots from rollovers.

MFC after:	10 days
2017-11-25 22:43:52 +00:00
Nathan Whitehorn
e54979488d Return base IRQ of PIC when added and massively increase the number of
available IRQs per PIC for large systems.

MFC after:	3 weeks
2017-11-25 22:42:05 +00:00
Nathan Whitehorn
50d82d6f6a Missed gate on __powerpc64__ for setting LPCR in r326207.
MFC after:	3 weeks
X-MFC-with:	r326207
2017-11-25 22:15:56 +00:00
Nathan Whitehorn
c0650b2f69 When booting from an FDT, make sure the FDT itself isn't included the range
of available memory. Boot loaders are supposed to add a reserved entry for
it, but not all do.

MFC after:	2 weeks
2017-11-25 22:14:30 +00:00
Nathan Whitehorn
5bcc3e4277 Allow platform modules to set the size of large pizes, as potentially
discovered from firmware, and better handle highly-discontiguous memory
and CPU maps.

MFC after:	3 weeks
2017-11-25 22:13:19 +00:00
Nathan Whitehorn
312fb3d8dd Invalidate TLB at boot using the correct IS settings on newer-than-POWER5
CPUs.

MFC after:	3 weeks
2017-11-25 22:10:10 +00:00
Nathan Whitehorn
d225a2a9c9 Definitions for registers and trap types found on new POWER CPUs.
MFC after:	3 weeks
2017-11-25 22:08:40 +00:00
Nathan Whitehorn
66d6978c27 Missed platform_smp_timebase_sync() in r326205.
MFC after:	3 weeks
X-MFC-With:	r326205
2017-11-25 22:06:40 +00:00
Nathan Whitehorn
5d7c76afc6 Make n_slbs public in a more straightforward way. Some platforms (like
PowerNV) use firmware-assisted mechanisms to discover it and need access
to the variable.

MFC after:	3 weeks
2017-11-25 22:05:05 +00:00
Nathan Whitehorn
cb74659e0c Preserve the LPCR on new-ish (POWER7 and POWER8) CPUs, preventing exceptions
and such from ending on the wrong CPU on SMP systems. It would be good to
have this be more generic somehow as POWER9s appear, but PPC does not
have features bits, unfortunately.

MFC after:	3 weeks
2017-11-25 22:03:25 +00:00
Nathan Whitehorn
f04a8fd6a9 Yield while spinning on APs and avoid announcing all CPUs unless bootverbose
is set. These improve startup performance on massively multithreaded systems
with 8-way SMT and dozens to hundreds of CPUs.

MFC after:	3 weeks
2017-11-25 22:01:55 +00:00
Nathan Whitehorn
de2dd83fb9 Whether you can use mttb() or not is more complicated than whether PSL_HV
is set and the right thing to do may be platform-dependent (it requires
firmware on PowerNV, for instance). Make it a new platform method called
platform_smp_timebase_sync().

MFC after:	3 weeks
2017-11-25 21:59:59 +00:00
Ed Schouten
814629dd64 Don't let cpu_set_syscall_retval() clobber exec_setregs().
Upon successful completion, the execve() system call invokes
exec_setregs() to initialize the registers of the initial thread of the
newly executed process. What is weird is that when execve() returns, it
still goes through the normal system call return path, clobbering the
registers with the system call's return value (td->td_retval).

Though this doesn't seem to be problematic for x86 most of the times (as
the value of eax/rax doesn't matter upon startup), this can be pretty
frustrating for architectures where function argument and return
registers overlap (e.g., ARM). On these systems, exec_setregs() also
needs to initialize td_retval.

Even worse are architectures where cpu_set_syscall_retval() sets
registers to values not derived from td_retval. On these architectures,
there is no way cpu_set_syscall_retval() can set registers to the way it
wants them to be upon the start of execution.

To get rid of this madness, let sys_execve() return EJUSTRETURN. This
will cause cpu_set_syscall_retval() to leave registers intact. This
makes process execution easier to understand. It also eliminates the
difference between execution of the initial process and successive ones.
The initial call to sys_execve() is not performed through a system call
context.

Reviewed by:	kib, jhibbits
Differential Revision:	https://reviews.freebsd.org/D13180
2017-11-24 07:35:08 +00:00
Justin Hibbits
1ccb14588b Check the page table before TLB1 in pmap_kextract()
The vast majority of pmap_kextract() calls are looking for a physical memory
address, not a device address.  By checking the page table first this saves
the formerly inevitable 64 (on e500mc and derivatives) iteration loop
through TLB1 in the most common cases.

Benchmarking this on the P5020 (e5500 core) yields a 300% throughput
improvement on dtsec(4) (115Mbit/s -> 460Mbit/s) measured with iperf.

Benchmarked on the P1022 (e500v2 core, 16 TLB1 entries) yields a 50%
throughput improvement on tsec(4) (~93Mbit/s -> 165Mbit/s) measured with
iperf.

MFC after:	1 week
Relnotes:	Maybe (significant performance improvement)
2017-11-21 03:12:16 +00:00
Pedro F. Giffuni
51369649b0 sys: further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 3-Clause license.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.

Special thanks to Wind River for providing access to "The Duke of
Highlander" tool: an older (2014) run over FreeBSD tree was useful as a
starting point.
2017-11-20 19:43:44 +00:00
Pedro F. Giffuni
df57947f08 spdx: initial adoption of licensing ID tags.
The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.

Special thanks to Wind River for providing access to "The Duke of
Highlander" tool: an older (2014) run over FreeBSD tree was useful as a
starting point.

Initially, only tag files that use BSD 4-Clause "Original" license.

RelNotes:	yes
Differential Revision:	https://reviews.freebsd.org/D13133
2017-11-18 14:26:50 +00:00
Justin Hibbits
bb7137e1a3 Stop special casing 32-bit AIM in memory parsing
There's no need to special case 32-bit AIM to short circuit processing.
Some AIM CPUs can handle 36 bit addresses, and 64-bit CPUs can run 32-bit
OSes, so this will allow us to expand for that in the future if we desire.
2017-11-17 04:10:52 +00:00
Justin Hibbits
27353776c4 Expand the Freescale PCIe root complex driver with the ofw_pcib_pci
The interrupt map wasn't being allocated properly, preventing IRQs from being
allocated to children of the PCIe bus.  Fix this by cloning the ofw_pcib_pci
code, which handles all cases -- device tree and probed.

In the future this may become a subclass of the ofw_pcib_pci driver, but as
that's not an exported class, it's cloned for now.

MFC after:	3 weeks
2017-11-14 03:53:15 +00:00
Justin Hibbits
2d968f6dd4 Properly initialize the full md_page structure 2017-11-10 04:23:58 +00:00
Justin Hibbits
06ba753a7a Book-E pmap_mapdev_attr() improvements
* Check TLB1 in all mapdev cases, in case the memattr matches an existing
  mapping (doesn't need to be MAP_DEFAULT).
* Fix mapping where the starting address is not a multiple of the widest size
  base.  For instance, it will now properly map 0xffffef000, size 0x11000 using
  2 TLB entries, basing it at 0x****f000, instead of 0x***00000.

MFC after:	2 weeks
2017-11-10 04:14:48 +00:00
Jeff Roberson
8d6fbbb867 Replace manyinstances of VM_WAIT with blocking page allocation flags
similar to the kernel memory allocator.

This simplifies NUMA allocation because the domain will be known at wait
time and races between failure and sleeping are eliminated.  This also
reduces boilerplate code and simplifies callers.

A wait primitive is supplied for uma zones for similar reasons.  This
eliminates some non-specific VM_WAIT calls in favor of more explicit
sleeps that may be satisfied without new pages.

Reviewed by:	alc, kib, markj
Tested by:	pho
Sponsored by:	Netflix, Dell/EMC Isilon
2017-11-08 02:39:37 +00:00
Justin Hibbits
81d7ebb695 Add the ISEL feature macro for those powerpc cores that have it
This is mostly for completeness, we don't currently use it for anything else.
2017-11-08 01:26:44 +00:00
Justin Hibbits
bc3acf82cc Clear the WE bit in C code rather than the asm
According to EREF rlwinm is supposed to clear the upper 32 bits of the
register of 64-bit cores.  However, from experience it seems there's a bug
in the e5500 which causes the result to be duplicated in the upper bits of
the register.  This causes problems when applied to stashed SRR1 accessed
to retrieve context, as the upper bits are not masked out, so a
set_mcontext() fails.  This causes sigreturn() to in turn return with
EINVAL, causing make(1) to exit with error.

This bit is unused in e500mc derivatives (including e5500), so could just be
conditional on non-powerpc64, but there may be other non-Freescale cores
which do use it.  This is also the same as the POW bit on Book-S, so could
be cleared unconditionally with the only penalty being a few clock cycles
for these two interrupts.
2017-11-08 01:23:37 +00:00
Justin Hibbits
37f275860c Set the PRD extension list base address in little endian
All data accesses with the SATA controller are little endian.  This was
missed when writing the extension code.
2017-11-06 05:09:18 +00:00
Justin Hibbits
78220c7be8 Fix an off-by-one error missed in the initial commit of this driver
When the segment count is > 16 it spills into an 'indirect descriptor list',
which immediately follows the main table, but the indirect list is entry 15, so
needs to be skipped for the general list.
2017-11-05 22:09:59 +00:00
Justin Hibbits
809cd50ff5 Add Freescale QorIQ SATA controller support.
The Freescale SATA controller has many similarities to AHCI controllers, so
this driver is a heavily modified AHCI driver.  Currently it seems to only
do SATA 1.0 speeds (~100-150MB/s), so there is still room for improvement.

Still to be done:
* Address erratum SATA-A-006187 -- Spread Spectrum Support (intermittent
  non-recoverable transient data integrity error seen when SSC enabled).
* Linux doesn't read the log page as it hangs on the P1022.  See if that's
  applicable to this, and address accordingly.
* Try to determine what's holding back performance, and address it.

MFC after:	3 weeks
Differential Revision:	https://reviews.freebsd.org/D6071
2017-11-05 02:47:46 +00:00
Justin Hibbits
51cfee5d13 Stop passing -me500 to the assembler for Book-E kernels
We already pass -many to the assembler, and -me500 drops 64-bit instruction
handling, for some reason only breaking module building for 64-bit kernels.

Additionally, build with CTF for dtrace.
2017-11-04 00:47:21 +00:00
Justin Hibbits
8c6037c4f8 Fix integer type and format in debug print
gcc complains "cast to pointer from integer of different size".  phandle_t is
*always* a uint32_t, so treat it as such, not as a pointer.  Fixes 64-bit build.
2017-11-03 03:13:15 +00:00
Justin Hibbits
140db60323 Enable a bunch more options in the QORIQ64 kernel
This brings it closer to par with GENERIC64.  In the future I hope to have a
GENERIC64-E and GENERIC-E kernels as Book-E analogues to the GENERIC64/GENERIC
AIM kernels.
2017-11-01 03:54:07 +00:00
Justin Hibbits
7561a31ed9 Rename a couple files to not conflict with ZFS filenames
Now a kernel can be built with both ZFS and DPAA compiled in.
2017-11-01 03:09:16 +00:00
Justin Hibbits
8ccebb4435 Add Guest State (GS) bit to MSR bits
For completeness only.  It will be used by a hypervisor if/when one is written.
While here, sort the MSR bits into the proper categories.
2017-11-01 02:54:48 +00:00
Justin Hibbits
61b9e7ef6a Fix debug interrupts on 64-bit Book-E
Use a WORD_SIZE macro to define the correct offset to the second word
needed.  This corrects the offset calculation in 64-bit builds.
2017-11-01 02:40:15 +00:00
Justin Hibbits
a32b54357f Make DPAA work in 64-bit mode
Rework the dTSEC and FMan drivers to be more like a full bus relationship,
so that dtsec can use bus_alloc_resource() instead of trying to handle the
offset from the dts.  This required taking some code from the sparc64 ebus
driver to allow subdividing the fman region for the dTSEC devices.
2017-10-31 02:53:50 +00:00
Justin Hibbits
852ba10081 Update DPAA SDK to SDK 2.0
This adds some support for ARM as well as 64-bit.  64-bit on PowerPC is
currently not working, and ARM support has not been completed or tested on the
FreeBSD side.

As this was imported from a Linux tree, it includes some Linux-isms
(ioread/iowrite), so compile with the LinuxKPI for now.  This may change in the
future.
2017-10-30 03:41:04 +00:00
Justin Hibbits
f6bd9666a5 Add P5010/P5010E for completeness 2017-10-30 01:55:38 +00:00
Eitan Adler
a2aef24aa3 Update several more URLs
- Primarily http -> https
- Primarily FreeBSD project URLs
2017-10-29 08:17:03 +00:00
Michal Meloun
904d8c492f Add AT_HWCAP2 ELF auxiliary vector.
- allocate value for new AT_HWCAP2 auxiliary vector on all platforms.
 - expand 'struct sysentvec' by new 'u_long *sv_hwcap2', in exactly
   same way as for AT_HWCAP.

MFC after:	1 month
Reviewed by:	kib
Differential Revision:	https://reviews.freebsd.org/D12699
2017-10-21 12:05:01 +00:00
Bjoern A. Zeeb
8e94025b41 With r181803 on 2008-08-17 23:27:27Z the first VIMAGE commit went into
HEAD.  Enable VIMAGE in GENERIC kernels and some others (where GENERIC does
not exist) on HEAD.

Disable building LINT-VIMAGE with VIMAGE being default.

This should give it a lot more exposure in the run-up to 12 to help
us evaluate whether to keep it on by default or not.
We are also hoping to get better performance testing.
The feature can be disabled using nooptions.

Requested by:		many
Reviewed by:		kristof, emaste, hiren
X-MFC after:		never
Relnotes:		yes
Differential Revision:	https://reviews.freebsd.org/D12639
2017-10-20 21:40:59 +00:00
Justin Hibbits
d41742b585 Expand the TLB nest level mask to 3 bits to match the 32-bit mask
This really doesn't change anything right now, because BOOKE_TLB_MAXNEST is only
3, which fits into the 2 bits currently used.
2017-10-20 03:31:23 +00:00
Justin Hibbits
95ce4c00ec No need to check for AIM here
This block is already in a #ifdef AIM block.
2017-10-20 03:13:31 +00:00
Justin Hibbits
15f9620e36 Book-E debug trace fixes
* Book-E can have Altivec exceptions, so move it out of the AIM-only block.
* Print the right DSI trap mode (read vs write) for Book-E

While here, fix some whitespace found while reviewing other diffs.
2017-10-20 03:03:04 +00:00
Justin Hibbits
12accff186 Add some more devices to the MPC85XX-based configs
These devices bring the configs closer to a desktop-like (GENERIC) kernel
config.
* The Freescale DIU support was added to the config in r306358.
  Without keyboard support video support is nearly pointless, so add ukbd and
  ums.
* The AmigaOne X5000, and P1022 devboard, both use a variant of the ds1307 RTC
* cpufreq scaling is currently supported by the p1022.  More SoCs will be added
  eventually.
2017-10-19 03:38:53 +00:00
Justin Hibbits
5ff24e4eb4 Remove some unnecessary includes 2017-10-19 02:14:39 +00:00
Wojciech Macek
10b980e75b PPC: increase MAX_PICS to 32
Previous value was too low on dual-socket POWER8 system.

Submitted by:          Wojciech Macek <wma@freebsd.org>
Reviewed by:           nwhitehorn
Obtained from:         Semihalf
Sponsored by:          QCM Technologies
Differential revision: https://reviews.freebsd.org/D12540
2017-10-02 06:05:19 +00:00
Josh Paetzel
c77037f16f Fix indentation for r323068
PR:	220170
Reported by:	lidl
MFC after:	3 days
Pointyhat to:	jpaetzel
2017-09-19 20:40:05 +00:00
Justin Hibbits
d11e86549e Don't use a non-zero argument for __builtin_frame_address
__builtin_frame_address with a non-zero argument is unsafe and rejected by
newer gcc.  Since it doesn't seem to impact the stacktrace, don't bother
with gymnastics to unwind to a different frame for starting.

PR:		kern/220118
MFC after:	2 weeks
2017-09-17 20:07:20 +00:00
Justin Hibbits
6b7530563b Print the correct bitmask for the running Book-E CPU
All the Book-E world is no longer e500v{1,2}.  e500mc the 64-bit derivatives do
not use the DOZE/NAP bits with MSR[WE], instead using the `wait' instruction to
wait for interrupts, and SoC plane controls (via CCSR) for power management.

MFC after:	1 week
2017-09-17 19:40:17 +00:00
Mark Johnston
b999e9c813 Implement mmu_page_init for AIM platforms.
As of r323290 we cannot rely on the vm_page array being
zero-initialized.

Reported and tested by:	andreast
MFC after:	1 week
2017-09-17 15:40:12 +00:00
John Baldwin
c2f37b9245 Add AT_HWCAP and AT_EHDRFLAGS on all platforms.
A new 'u_long *sv_hwcap' field is added to 'struct sysentvec'.  A
process ABI can set this field to point to a value holding a mask of
architecture-specific CPU feature flags.  If an ABI does not wish to
supply AT_HWCAP to processes the field can be left as NULL.

The support code for AT_EHDRFLAGS was already present on all systems,
just the #define was not present.  This is a step towards unifying the
AT_* constants across platforms.

Reviewed by:	kib
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D12290
2017-09-14 14:26:55 +00:00
Mateusz Guzik
4dabeda46c Fix riscv and powerpc compilation after r323329.
On these archs bzero is a C function, which triggers a compilation error
as the compiler tries to expand the macro.
2017-09-09 05:56:04 +00:00
Justin Hibbits
c5fea8adf0 Add P5021 and P5040 conditions for LAW count check.
P5040/P5021 have the same number of LAWs as P5020.  There may be a better way of
getting the count from the FDT (fsl,num-laws property on soc/corenet-law or
soc/ecm-law), but that's not supported everywhere, so we still need this check
for those other cases.
2017-09-09 02:19:44 +00:00
Justin Hibbits
dc72081153 Add some more PVR and SVR defines
These processors may not be supported yet, but add them for completion.

POWER9 is planned for support.  e300 may work (based on 603e core).
P5040/P5021 are similar to P5020, so should work as well.  One addition is
needed for P5040, to support the number of LAWs, and will be a separate commit.
2017-09-09 02:08:22 +00:00
Josh Paetzel
9d0ec2a920 Revert r323087
This needs more thinking out and consensus, and the commit message
was wrong AND there was a typo in the commit.

pointyhat:	jpaetzel
2017-09-01 17:03:48 +00:00
Josh Paetzel
0be04b100c Take options IPSEC out of GENERIC
PR:	220170
Submitted by:	delphij
Reviewed by:	ae, glebius
MFC after:	2 weeks
Differential Revision:	D11806
2017-09-01 15:54:53 +00:00
Josh Paetzel
3b65550eec Allow kldload tcpmd5
PR:	220170
MFC after:	2 weeks
2017-08-31 20:16:28 +00:00
Bruce Evans
7692d200c1 Use better hard-coded defaults for the cursor shape, and remove nearby
redundant initializations.

Hard-code base = 0, height = (approx. 1/8 of the boot-time font height)
in all cases, and remove the BIOS/MD support for setting these values.
This asks for an underline cursor sized for the boot-time font instead
of various less hard-coded but worse values.  I used that think that
the x86 BIOS always gave the same values as the above hard-coding, but
on 1 of my systems it gives the wrong value of base = 1.

The remaining BIOS fields are shift_state and bell_pitch.  These are now
consistently not explicitly reinitialized to 0.  All sc_get_bios_value()
functions except x86's are now empty, and the only useful thing that x86
returns is shift_state.  This really belongs in atkbdc, but heavier
use of the BIOS to read the more useful typematic rate has been removed
there.  fb still makes much heavier use of the BIOS.
2017-08-19 19:33:16 +00:00
Justin Hibbits
452adeee95 Add cpufreq support for P1022 and MPC8536
P1022 and MPC8536  include a 'jog' feature for clock control
(jog being a slower form of run mode).  This is done by changing the
PLL multiplier, and cannot be done if any core is in doze or sleep mode.
2017-07-21 03:40:05 +00:00
Justin Hibbits
da7266dd6b Remove an obsolete comment
This has been wrong for well over a year, we support the full 36-bit
(or more) PA space.
2017-07-05 02:20:03 +00:00
Jason A. Harmening
eb36b1d0bc Clean up MD pollution of bus_dma.h:
--Remove special-case handling of sparc64 bus_dmamap* functions.
  Replace with a more generic mechanism that allows MD busdma
  implementations to generate inline mapping functions by
  defining WANT_INLINE_DMAMAP in <machine/bus_dma.h>.  This
  is currently useful for sparc64, x86, and arm64, which all
  implement non-load dmamap operations as simple wrappers
  around map objects which may be bus- or device-specific.

--Remove NULL-checked bus_dmamap macros.  Implement the
  equivalent NULL checks in the inlined x86 implementation.
  For non-x86 platforms, these checks are a minor pessimization
  as those platforms do not currently allow NULL maps.  NULL
  maps were originally allowed on arm64, which appears to have
  been the motivation behind adding arm[64]-specific barriers
  to bus_dma.h, but that support was removed in r299463.

--Simplify the internal interface used by the bus_dmamap_load*
  variants and move it to bus_dma_internal.h

--Fix some drivers that directly include sys/bus_dma.h
  despite the recommendations of bus_dma(9)

Reviewed by:	kib (previous revision), marius
Differential Revision:	https://reviews.freebsd.org/D10729
2017-07-01 05:35:29 +00:00
Justin Hibbits
d7fd731d06 Use the more common Book-E idiom for disabling interrupts.
Book-E has the wrteei/wrtee instructions for writing the PSL_EE bit, ignoring
all others.  Use this instead of the AIM-typical mtmsr.

MFC with:	r320392
2017-06-30 02:11:32 +00:00
Justin Hibbits
3d1357108a Disable interrupts when updating the TLB
Without disabling interrupts it's possible for another thread to preempt
and update the registers post-read (tlb1_read_entry) or pre-write
(tlb1_write_entry), and confuse the kernel with mixed register states.

MFC after:	2 weeks
2017-06-27 01:57:22 +00:00
Justin Hibbits
fbcf7bcdf4 Solve the y2038 problem for powerpc
AKA Make time_t 64 bits on powerpc(32).

PowerPC currently (until now) was one of two architectures with a 32-bit time_t
on 32-bit archs (the other being i386).  This is an ABI breakage, so all ports,
and all local binaries, *must* be recompiled.

Tested by:	andreast, others
MFC after:	Never
Relnotes:	Yes
2017-06-26 02:25:19 +00:00
Justin Hibbits
37ea599bf7 Actually add the mpc85xx_get_platform_clock() function.
Follow up r319935 by actually committing the mpc85xx_get_platform_clock()
function.  This function was created to facilitate other development, and I
thought I had committed it earlier.

Some blocks depend on the platform clock rather than the system clock.
The System clock is derived from the platform clock as one-half the
platform clock.  Rewrite mpc85xx_get_system_clock() to use the new
function.

Pointy-hat to:	jhibbits
2017-06-14 04:26:37 +00:00
Justin Hibbits
3c804fef82 Use mpc85xx_get_platform_clock() instead of rolling our own.
Now that we have a single source for the platform clock, we don't need to
roll our own in every user.
2017-06-14 04:16:37 +00:00
Konstantin Belousov
2d88da2f06 Move struct syscall_args syscall arguments parameters container into
struct thread.

For all architectures, the syscall trap handlers have to allocate the
structure on the stack.  The structure takes 88 bytes on 64bit arches
which is not negligible.  Also, it cannot be easily found by other
code, which e.g. caused duplication of some members of the structure
to struct thread already.  The change removes td_dbg_sc_code and
td_dbg_sc_nargs which were directly copied from syscall_args.

The structure is put into the copied on fork part of the struct thread
to make the syscall arguments information correct in the child after
fork.

This move will also allow several more uses shortly.

Reviewed by:	jhb (previous version)
Sponsored by:	The FreeBSD Foundation
MFC after:	3 weeks
X-Differential revision:	https://reviews.freebsd.org/D11080
2017-06-12 21:03:23 +00:00
Konstantin Belousov
43f41dd393 Make struct syscall_args visible to userspace compilation environment
from machine/proc.h, consistently on all architectures.

Reviewed by:	jhb
Sponsored by:	The FreeBSD Foundation
MFC after:	3 weeks
X-Differential revision:	https://reviews.freebsd.org/D11080
2017-06-12 20:53:44 +00:00
John Baldwin
5033c43b7a Add a driver for the Chelsio T6 crypto accelerator engine.
The ccr(4) driver supports use of the crypto accelerator engine on
Chelsio T6 NICs in "lookaside" mode via the opencrypto framework.

Currently, the driver supports AES-CBC, AES-CTR, AES-GCM, and AES-XTS
cipher algorithms as well as the SHA1-HMAC, SHA2-256-HMAC, SHA2-384-HMAC,
and SHA2-512-HMAC authentication algorithms.  The driver also supports
chaining one of AES-CBC, AES-CTR, or AES-XTS with an authentication
algorithm for encrypt-then-authenticate operations.

Note that this driver is still under active development and testing and
may not yet be ready for production use.  It does pass the tests in
tests/sys/opencrypto with the exception that the AES-GCM implementation
in the driver does not yet support requests with a zero byte payload.

To use this driver currently, the "uwire" configuration must be used
along with explicitly enabling support for lookaside crypto capabilities
in the cxgbe(4) driver.  These can be done by setting the following
tunables before loading the cxgbe(4) driver:

    hw.cxgbe.config_file=uwire
    hw.cxgbe.cryptocaps_allowed=-1

MFC after:	1 month
Relnotes:	yes
Sponsored by:	Chelsio Communications
Differential Revision:	https://reviews.freebsd.org/D10763
2017-05-17 22:13:07 +00:00
Justin Hibbits
611aec2545 Correct pa argument type for pmap_kenter_attr()
Physical addresses are vm_paddr_t, not vm_offset_t.  This can make a difference
when sizeof(vm_offset_t) != sizeof(vm_paddr_t).
2017-05-16 03:31:49 +00:00
Justin Hibbits
675cad71e7 Fix stack tracing in dtrace for powerpc
The current method only sort of works, and usually doesn't work reliably.
Also, on Book-E the return address from DEBUG exceptions is not the sentinel
addresses, so it won't exit the loop correctly.

Fix this by better handling trap frames during unwinding, and using the
common trap handler for debug traps, as the code in that segment is
identical between the two.

MFC after:	1 week
2017-05-11 00:23:51 +00:00
Gleb Smirnoff
83c9dea1ba - Remove 'struct vmmeter' from 'struct pcpu', leaving only global vmmeter
in place.  To do per-cpu stats, convert all fields that previously were
  maintained in the vmmeters that sit in pcpus to counter(9).
- Since some vmmeter stats may be touched at very early stages of boot,
  before we have set up UMA and we can do counter_u64_alloc(), provide an
  early counter mechanism:
  o Leave one spare uint64_t in struct pcpu, named pc_early_dummy_counter.
  o Point counter(9) fields of vmmeter to pcpu[0].pc_early_dummy_counter,
    so that at early stages of boot, before counters are allocated we already
    point to a counter that can be safely written to.
  o For sparc64 that required a whole dummy pcpu[MAXCPU] array.

Further related changes:
- Don't include vmmeter.h into pcpu.h.
- vm.stats.vm.v_swappgsout and vm.stats.vm.v_swappgsin changed to 64-bit,
  to match kernel representation.
- struct vmmeter hidden under _KERNEL, and only vmstat(1) is an exclusion.

This is based on benno@'s 4-year old patch:
https://lists.freebsd.org/pipermail/freebsd-arch/2013-July/014471.html

Reviewed by:	kib, gallatin, marius, lidl
Differential Revision:	https://reviews.freebsd.org/D10156
2017-04-17 17:34:47 +00:00
Gleb Smirnoff
9ed01c32e0 All these files need sys/vmmeter.h, but now they got it implicitly
included via sys/pcpu.h.
2017-04-17 17:07:00 +00:00
Patrick Kelsey
67d955aab4 Corrected misspelled versions of rendezvous.
The MFC will include a compat definition of smp_no_rendevous_barrier()
that calls smp_no_rendezvous_barrier().

Reviewed by:	gnn, kib
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D10313
2017-04-09 02:00:03 +00:00
Justin Hibbits
d139c624a9 Add Freescale eSPI driver found on QorIQ SoCs 2017-04-02 01:21:35 +00:00
Justin Hibbits
bba2d2bd51 Add a helper function to get system reference clock
Many devices are clocked from the SoC's platform clock / 2.  Some device nodes
include their own clock-frequency property, while others are dependent on the
SoC's bus-frequency property instead.  To simplify, add a helper function to get
this clock.
2017-04-01 22:29:11 +00:00
Bruce Evans
f434f3515b Fix printing of negative offsets (typically from frame pointers) again.
I fixed this in 1997, but the fix was over-engineered and fragile and
was broken in 2003 if not before.  i386 parameters were copied to 8
other arches verbatim, mostly after they stopped working on i386, and
mostly without the large comment saying how the values were chosen on
i386.  powerpc has a non-verbatim copy which just changes the uncritical
parameter and seems to add a sign extension bug to it.

Just treat negative offsets as offsets if they are no more negative than
-db_offset_max (default -64K), and remove all the broken parameters.

-64K is not very negative, but it is enough for frame and stack pointer
offsets since kernel stacks are small.

The over-engineering was mainly to go more negative than -64K for the
negative offset format, without affecting printing for more than a
single address.

Addresses in the top 64K of a (full 32-bit or 64-bit) address space
are now printed less well, but there aren't many interesting ones.
For arches that have many interesting ones very near the top (e.g.,
68k has interrupt vectors there), there would be no good limit for
the negative offset format and -64K is a good as anything.
2017-03-26 18:46:35 +00:00
Justin Hibbits
457797001e Don't bother checking core version
We already constrain by SoC, so there's no need to check the core version, too.
2017-03-24 01:52:10 +00:00
Justin Hibbits
52f0686952 Switch qoriq_gpio over to using ofw_bus_search_compatible
This will make it easier to add more compatibility strings in the future, if
necessary.
2017-03-24 01:30:18 +00:00
Justin Hibbits
e683c328f8 Introduce 64-bit PowerPC Book-E support
Extend the Book-E pmap to support 64-bit operation.  Much of this was taken from
Juniper's Junos FreeBSD port.  It uses a 3-level page table (page directory
list -- PP2D, page directory, page table), but has gaps in the page directory
list where regions will repeat, due to the design of the PP2D hash (a 20-bit gap
between the two parts of the index).  In practice this may not be a problem
given the expanded address space.  However, an alternative to this would be to
use a 4-level page table, like Linux, and possibly reduce the available address
space; Linux appears to use a 46-bit address space.  Alternatively, a cache of
page directory pointers could be used to keep the overall design as-is, but
remove the gaps in the address space.

This includes a new kernel config for 64-bit QorIQ SoCs, based on MPC85XX, with
the following notes:
* The DPAA driver has not yet been ported to 64-bit so is not included in the
  kernel config.
* This has been tested on the AmigaOne X5000, using a MD_ROOT compiled in
  (total size kernel+mdroot must be under 64MB).
* This can run both 32-bit and 64-bit processes, and has even been tested to run
  a 32-bit init with 64-bit children.

Many thanks to stevek and marcel for getting Juniper's FreeBSD patches open
sourced to be used here, and to stevek for reviewing, and providing some
historical contexts on quirks of the code.

Reviewed by:	stevek
Obtained from:	Juniper (in part)
MFC after:	2 months
Relnotes:	yes
Differential Revision:	https://reviews.freebsd.org/D9433
2017-03-17 21:40:14 +00:00
Justin Hibbits
62c6b30e5c Fix booting with >4GB RAM on PowerMac G5 hardware
===
From Nathan Whitehorn:

Open Firmware runs in virtual mode on the Powermac G5. This runs inside the
kernel page table, which preserves all address translations made by OF before
the kernel starts; as a result, the kernel address space is a strict superset of
OF's.

Where this explodes is if OF uses an unmapped SLB entry. The SLB fault handler
runs in real mode and refers to the PCPU pointer in SPRG0, which blows up the
kernel. Having a value of SPRG0 that works for the kernel is less fatal than
preserving OF's value in this case.

===

The result of this is seemingly random panics from NULL dereferences, or hangs
immediately upon boot.  By not restoring SPRG0 for Open Firmware entry the
kernel PCPU pointer is preserved and SLB faults are successful, resulting in a
stable kernel.

PR:		205458
Reported by:	several (over bugzilla, lists, IRC)
Reviewed by:	andreast
Tested by:	many (various forms)
MFC after:	2 weeks
2017-03-07 22:11:57 +00:00
Warner Losh
fbbd9655e5 Renumber copyright clause 4
Renumber cluase 4 to 3, per what everybody else did when BSD granted
them permission to remove clause 3. My insistance on keeping the same
numbering for legal reasons is too pedantic, so give up on that point.

Submitted by:	Jan Schaumann <jschauma@stevens.edu>
Pull Request:	https://github.com/freebsd/freebsd/pull/96
2017-02-28 23:42:47 +00:00
Justin Hibbits
15fc4ab7fc Make kernel breakpoints work for book-e
Add the necessary bits to enable kernel breakpoints for Book-E.  The entrypoint
for program exception is very trivial, so rather than expand it to be similar to
AIM, add it into the standard trap handler.

This wasn't blocked out as Book-E specific because it is only a minor redundancy
over AIM, which should have already called db_trap_glue() at this point.  If
it's going to panic with a fatal trap anywya, it doesn't matter if it goes
through this path again.
2017-02-28 04:31:28 +00:00
Justin Hibbits
b3ae819e0a Unbreak kernel breakpoints, broken for ~4 years now
When committing DTrace in 2012/2013 era I inadvertently broke breakpoints, by
setting EXC_DTRACE to the same value as BKPT_INST.  Change EXC_DTRACE to a
different, yet logically identical, trap (tw <all>,31,31).

MFC after:	2 weeks
2017-02-28 04:13:20 +00:00
Ruslan Bukin
c214a270f5 Allow setting access-width for UART registers.
This is required for FDT's standard "reg-io-width" property
(similar to "reg-shift" property) found in many DTS files.

This fixes operation on Altera Arria 10 SOC Development Kit,
where standard ns8250 uart allows 4-byte access only.

Reviewed by:	kan, marcel
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D9785
2017-02-27 20:08:42 +00:00
Warner Losh
55157631f1 Include pcib_private.h for prototypes.
Noticed by: rpokala@
Sponsored by: Netflix
2017-02-26 21:33:18 +00:00
Warner Losh
28586889c2 Convert PCIe Hot Plug to using pci_request_feature
Convert PCIe hot plug support over to asking the firmware, if any, for
permission to use the HotPlug hardware. Implement pci_request_feature
for ACPI. All other host pci connections to allowing all valid feature
requests.

Sponsored by: Netflix
2017-02-25 06:11:59 +00:00
Marius Strobl
4874af73c1 - Allow different slicers for different flash types to be registered
with geom_flashmap(4) and teach it about MMC for slicing enhanced
  user data area partitions. The FDT slicer still is the default for
  CFI, NAND and SPI flash on FDT-enabled platforms.
- In addition to a device_t, also pass the name of the GEOM provider
  in question to the slicers as a single device may provide more than
  provider.
- Build a geom_flashmap.ko.
- Use MODULE_VERSION() so other modules can depend on geom_flashmap(4).
- Remove redundant/superfluous GEOM routines that either do nothing
  or provide/just call default GEOM (slice) functionality.
- Trim/adjust includes

Submitted by:	jhibbits (RouterBoard bits)
Reviewed by:	jhibbits
2017-02-22 10:21:39 +00:00
Justin Hibbits
27da2007da Correct the return value for pmap_change_attr()
pmap_change_attr() returns an error code, not a paddr.  This function is
currently unused for powerpc.

MFC after:	2 weeks
2017-02-21 05:08:07 +00:00
Justin Hibbits
d9720179fd Add a driver for the RouterBoard RB800 User LED
This may work on other RouterBoard PPC platforms, but I don't have any to test
with.
2017-02-19 19:56:12 +00:00
Jason A. Harmening
e2a8d17887 Bring back r313037, with fixes for mips:
Implement get_pcpu() for amd64/sparc64/mips/powerpc, and use it to
replace pcpu_find(curcpu) in MI code.

Reviewed by:	andreast, kan, lidl
Tested by:	lidl(mips, sparc64), andreast(powerpc)
Differential Revision:	https://reviews.freebsd.org/D9587
2017-02-19 02:03:09 +00:00
Konstantin Belousov
9fb10d635e Define the vm_ooffset_t and vm_pindex_t types as machine-independend.
The types are for the byte offset and page index in vm object.  They
are similar to off_t, which is defined as 64bit MI integer.  Using MI
definitions will allow to provide consistent MD values of vm
object-related maximum sizes.

Reviewed by:	alc
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2017-02-04 12:26:38 +00:00
Jason A. Harmening
ad62ba6e96 Revert r313037
The switch to get_pcpu() in MI code seems to cause hangs on MIPS.
Back out until we can get a better idea of what's happening there.

Reported by:	kan, lidl
2017-02-04 06:24:49 +00:00
Jason A. Harmening
65ed483615 Implement get_pcpu() for the remaining architectures and use it to
replace pcpu_find(curcpu) in MI code.
2017-02-01 03:32:49 +00:00
Justin Hibbits
91722a2f0f Add Book-E Enhanced Debug (E.D) profile debug support
Freescale added the E.D profile to e500mc and derivative cores.  From
Freescale's EREF reference manual this is enabled by a bit in HID0 and should
otherwise default to traditional debug.  However, none of the Freescale cores
support that bit, and instead always use E.D.  This results in kernel panics
using the standard debug on e500mc+ cores.

Enhanced debug allows debugging of interrupts, including critical interrupts,
as it uses a different save/restore registers (srr*).  At this time we don't use
this ability, so instead share the core of the debug handler code between both
handlers.

MFC after:	3 weeks
2017-02-01 03:29:13 +00:00
Justin Hibbits
d3a8234cef Don't retry a lost reservation in atomic_fcmpset()
The desired behavior of atomic_fcmpset_() is to always exit on error.  Instead
of retrying on lost reservation, leave the retry to the caller, and return
error.

Reported by:	kib
2017-01-31 03:40:13 +00:00
Justin Hibbits
37af2ad077 Drop the __GNUCLIKE_ASM guards around most atomic inlines.
There are no alternatives defined, so there's no point in keeping them.  Also,
they weren't around every inline asm block anyway.  Without __GNUCLIKE_ASM
defined, the guarded functions return garbage.

Reported by:	Andrew Thompson
2017-01-30 02:52:15 +00:00
Justin Hibbits
0624255394 Add a INTR_TRIG_INVALID, and use it in the powerpc interrupt code.
Summary:
Clang throws the following warning in powerpc intr_machdep:

/usr/src/sys/powerpc/powerpc/intr_machdep.c:454:15: warning: comparison of
constant -1 with expression of type 'enum intr_trigger' is always false
[-Wtautological-constant-out-of-range-compare]
    if (i->trig == -1)
        ~~~~~~~ ^  ~~

This may lead to legitimate problems with aggressive optimizations, if not now
then in the future.  To avoid this, add a new enum, INTR_TRIG_INVALID, set to
-1, and use this new enumeration in these checks.

Test Plan: Compile test.

Reviewed By: jhb, kib
Differential Revision: https://reviews.freebsd.org/D9300
2017-01-30 02:21:29 +00:00
Justin Hibbits
02f151d412 Add atomic_fcmpset_*() inlines for powerpc
Summary:
atomic_fcmpset_*() is analogous to atomic_cmpset(), but saves off the read value
from the target memory location into the 'old' pointer in the case of failure.

Requested by:	 mjg
Differential Revision: https://reviews.freebsd.org/D9325
2017-01-30 02:15:54 +00:00
Justin Hibbits
8d2f50dba6 Avoid using non-zero argument for __builtin_frame_address().
Building kernel with devel/powerpc64-gcc (6.2.0) yields the following error:
/usr/src/sys/powerpc/powerpc/db_trace.c:299:20: error: calling
'__builtin_frame_address' with a nonzero argument is unsafe
[-Werror=frame-address]

Work around this by dereferencing the frame address manually instead.

PR:		215600
Reported by:	Mark Millard <markmi AT dsl-only DOT net>
MFC after:	2 weeks
2017-01-23 04:03:12 +00:00
Justin Hibbits
3e7e31bda0 Hide the 'MOREARGS' macro, it conflicts with contrib code, and is only used in one file.
PR:		211818
Reported by:	Mark Millard <markmi AT dsl-only.net>
MFC after:	2 weeks
2017-01-22 06:30:55 +00:00
Justin Hibbits
279ae8fec0 Fix r312613.
Somehow this slipped through my build testing.
2017-01-22 06:17:31 +00:00
Justin Hibbits
5c1f5ea426 Fix use of uninitialized variable.
I don't know how gcc didn't catch this.  This was caught during test building
with clang.
2017-01-22 05:49:43 +00:00
Justin Hibbits
18e367f4aa Use the explicit expanded form of cmp.
Clang apparently requires the explicit form of this instruction, and rejects
uses which ignore the optional cmpD register.  This was the only use of the
shorthand form of the instruction, so just fix it up to match the others.

PR:		kern/215681
Submitted by:	Mark Millard
Reported by:	Mark Millard <markmi _AT_ dsl-only.net>
MFC after:	2 weeks
2017-01-18 03:42:21 +00:00
Justin Hibbits
6b3e2169c5 Force all TOC references in asm to include '@toc'
This reportedly fixes one problem with booting a clang kernel.

PR:		kern/215819
Submitted by:	Mark Millard <markmi AT dsl-only.net>
MFC after:	2 weeks
2017-01-11 02:21:34 +00:00
Sean Bruno
f2d6ace4a6 Migrate e1000 to the IFLIB framework:
- em(4) igb(4) and lem(4)
- deprecate the igb device from kernel configurations
- create a symbolic link in /boot/kernel from if_em.ko to if_igb.ko

Devices tested:
- 82574L
- I218-LM
- 82546GB
- 82579LM
- I350
- I217

Please report problems to freebsd-net@freebsd.org

Partial review from jhb and suggestions on how to *not* brick folks who
originally would have lost their igbX device.

Submitted by:	mmacy@nextbsd.org
MFC after:	2 weeks
Relnotes:	yes
Sponsored by:	Limelight Networks and Dell EMC Isilon
Differential Revision:	https://reviews.freebsd.org/D8299
2017-01-10 03:23:22 +00:00
Justin Hibbits
009dedabb3 Knock a page off VM_MAX_KERNEL_ADDRESS
There are places where checks are made against VM_MAX_KERNEL_ADDRESS, or
virtual_end (set to VM_MAX_KERNEL_ADDRESS).  With 32-bit checks, an address will
always be less than or equal to 0xffffffff.  Drop a page, so those checks can
terminate loops safely.
2017-01-08 21:12:46 +00:00
Alan Somers
4195c7de24 Always null-terminate ccb_pathinq.(sim_vid|hba_vid|dev_name)
The sim_vid, hba_vid, and dev_name fields of struct ccb_pathinq are
fixed-length strings. AFAICT the only place they're read is in
sbin/camcontrol/camcontrol.c, which assumes they'll be null-terminated.
However, the kernel doesn't null-terminate them. A bunch of copy-pasted code
uses strncpy to write them, and doesn't guarantee null-termination. For at
least 4 drivers (mpr, mps, ciss, and hyperv), the hba_vid field actually
overflows. You can see the result by doing "camcontrol negotiate da0 -v".

This change null-terminates those fields everywhere they're set in the
kernel. It also shortens a few strings to ensure they'll fit within the
16-character field.

PR:		215474
Reported by:	Coverity
CID:		1009997 1010000 1010001 1010002 1010003 1010004 1010005
CID:		1331519 1010006 1215097 1010007 1288967 1010008 1306000
CID:		1211924 1010009 1010010 1010011 1010012 1010013 1010014
CID:		1147190 1010017 1010016 1010018 1216435 1010020 1010021
CID:		1010022 1009666 1018185 1010023 1010025 1010026 1010027
CID:		1010028 1010029 1010030 1010031 1010033 1018186 1018187
CID:		1010035 1010036 1010042 1010041 1010040 1010039
Reviewed by:	imp, sephe, slm
MFC after:	4 weeks
Sponsored by:	Spectra Logic Corp
Differential Revision:	https://reviews.freebsd.org/D9037
Differential Revision:	https://reviews.freebsd.org/D9038
2017-01-04 20:26:42 +00:00
Justin Hibbits
d5a30121f4 Restrict SLB handler to powerpc64 and AIM
Only Book-S has SLBs.  Book-E does not, so restrict it to only Book-S (which we
call AIM).
2016-12-28 03:40:54 +00:00
Justin Hibbits
06dc0ff5b8 Use the correct format specifier for physmem chunk sizes.
Arguments are unsigned, so should be printed as unsigned.
2016-12-25 20:19:32 +00:00
Justin Hibbits
8d58dade1a Fix disassembly by adding back some deleted lines.
When importing for r309309, as part of conflict resolution, too much extra was
removed, resulting in bad disassembly for branches.  Correct this.

Also re-apply the 0->NULL change from r298052.

X-MFC-With:	r309309
2016-12-16 04:47:29 +00:00
Justin Hibbits
fa133b6bf0 Use the right bitwise OR operation for clearing single-step at trap time.
DBCR0_IDM || DBCRO_IC yields 1, which in this register is DBCR0_FT, not what we
want.
Reported by:	Mark Millard
MFC after:	2 weeks
2016-12-16 04:38:53 +00:00
Mark Johnston
7f68a896dc Add a COMPAT_FREEBSD11 kernel option.
Use it wherever COMPAT_FREEBSD10 is currently specified.

Reviewed by:	glebius, imp, jhb
Differential Revision:	https://reviews.freebsd.org/D8736
2016-12-09 18:54:12 +00:00
Justin Hibbits
0a82e6f09a Use trunc_page() instead of rolling my own in pmap_track_page() 2016-12-05 02:27:50 +00:00
Justin Hibbits
aa38c69b74 Fix a typo (move parenthesis to correct location in the line).
Before this, it would cause the one consumer of this API in powerpc usage
(dev/dpaa) to set the PTE WIMG flags to empty instead of --M-, making the
cache-enabled buffer portals non-coherent.
2016-12-04 02:15:46 +00:00
Justin Hibbits
a8c4b5ced8 Bring the powerpc DDB disassembler into the 21st century
Bring in the most recent copy of NetBSD's db_disasm, to fix bugs and add more
instructions.

* Fix several bugs in the disassembler, most notably the disassembly of the
  rlwi* instructions, the original reason for bringing in this change.
* Add more registers to the SPR list
* Add more instructions to the opcode table

Obtained from:	NetBSD
MFC after:	2 weeks
2016-11-30 02:35:51 +00:00
Justin Hibbits
5ccc0779d4 Add an isync to after mtsrin, required by the MPC750 errata
MPC750 User Manual Errata (rev 1) adds a note to C.4.2.2 noting that mtsr,
mtsrin, and mtmsr all require a isync after the instruction and before data
address translation uses any of the segment registers.  This should make FreeBSD
run correctly on the G3 again.

Reported by:	Mark Millard
MFC after:	1 week
2016-11-25 19:36:27 +00:00
Justin Hibbits
a1748875fc Fix the build post-r309017 for MPC85XX/MPC85XXSPE
r309017 removed two fields from struct vmmeter, which is embedded in struct
pcpu.  This caused the struct size to change, triggering the CTASSERT in
sys/pcpu.h.  Add the extra 8 bytes back in as padding.
2016-11-24 20:31:46 +00:00
Justin Hibbits
4026b44790 Fix buildworld for powerpc.
vmpage requires struct pmap to exist and contain a pm_stats field.  As of
r308817, either AIM or BOOKE is required to be set in order to get their
respective pmap structs.  Rather than expose them both, or try to unify them
unnecessarily, add a third option which contains only a pm_stats field, and
change the two existing pmap structures to place the common fields at the
beginning of the struct.  This actually fixes the stats collection by libkvm on
AIM hardware, because before it was accessing a possibly different offset, which
would cause it to read garbage.

Bump __FreeBSD_version to denote this ABI change, so that ports which depend on
libkvm can be rebuilt.
2016-11-20 06:10:12 +00:00
Justin Hibbits
fcef00c336 Fix buildworld
Change the pv_tracked flag to an int, just in case userspace decides to include
this file and defines BOOKE.

Guard this block from unintentional inclusion with ifdef BOOKE.

Reported by:	emaste
2016-11-18 22:59:33 +00:00
Justin Hibbits
b2f831c009 Simplify the page tracking for VA<->PA translations.
Drop the tracking down to the pmap layer, with optimizations to only track
necessary pages.  This should give a (slight) performance improvement, as well
as a stability improvement, as the tracking is already mostly handled by the
pmap layer.
2016-11-16 05:24:42 +00:00
Justin Hibbits
099a0e1bea Add a GPIO poweroff and reset driver.
Summary:
This implements part of the gpio-poweroff and gpio-restart device tree
bindings.  Optional properties are not handled currently.  It also currently
only supports level-triggered reset.

Reviewed By: gonzo
Differential Revision: https://reviews.freebsd.org/D8521
2016-11-16 02:14:07 +00:00
Justin Hibbits
0323f4e177 Add sdhci and mmc drivers to MPC85XX/MPC85XXSPE
sdhci was missing from MPC85XXSPE, and mmc/mmcsd were missing from both.
2016-11-15 05:05:51 +00:00
Justin Hibbits
e5c491ad33 Write to the correct GPIO registers.
Offset 0 is the direction register, not the data register.

MFC after:	1 week
2016-11-15 04:49:26 +00:00
Justin Hibbits
3e7ddf02dc Make dpaa work with only slightly modified Linux device trees.
Linux has a slightly different device tree definition for DPAA than originally
done in the FreeBSD driver.  This changes the driver to be mostly compatible
with the Linux device tree definitions.  Currently the differences are:

bman-portals: compatible = "fsl,bman-portals" (Linux is "simple-bus")
qman-portals: compatible = "fsl,qman-portals" (Linux is "simple-bus")
fman: compatible = "fsl,fman" (Linux is "simple-bus")

The Linux device tree doesn't specify anything for rgmii in the mdio.  This
change still requires the device tree to specify the phy-handle, and doesn't yet
support tbi.
2016-11-12 20:45:03 +00:00
Bryan Drewery
28323add09 Fix improper use of "its".
Sponsored by:	Dell EMC Isilon
2016-11-08 23:59:41 +00:00
Justin Hibbits
6529f950c4 Add P1022 and compatible SVR IDs
The eSDHC driver requires these IDs.  Missed in r308188.
2016-11-02 03:07:01 +00:00
Justin Hibbits
eecaab5275 Merge i.MX and PowerPC SDHCI drivers
Summary:
i.MX5 and PowerPC use a very similar eSDHC controller, which is also
similar to the uSDHC controller used by i.MX6.  The imx_sdhci driver works
almost completely with PowerPC, with some minor tweaks.

There is one caveat with this: reset currently does not work on PowerPC, so has
been #ifdef'd out until this can be tracked down and fixed.  If resets are done
the controller will timeout all data transactions.  Without a reset, it appears
to work just fine.

This is part 3, following up r308186 and r308187.

Test Plan:
This has been tested on a PowerPC QorIQ P1022 board.  It has not been
tested on i.MX, but no regressions are expected.

Reviewed By: imp
Differential Revision: https://reviews.freebsd.org/D8407
2016-11-02 00:57:04 +00:00
Justin Hibbits
512071de53 Add the SPE feature mask for e500v1 and e500v2
On e500v2 SoCs it will now print:

cpu0: Features 84e08000<PPC32,MMU,SPE,EFPS,EFPD,BOOKE>

at bootup.
2016-10-29 01:24:30 +00:00
Justin Hibbits
e7c4ddf5ba Add a bunch of new default options to MPC85XX* configs
These were tested at various points but never merged into the configs at the
time.
2016-10-24 04:21:06 +00:00
Justin Hibbits
eaa5e39660 Revert r307813.
I misread the code, and it shouldn't have compiled (fputhread is just a variable
name).
2016-10-23 01:03:17 +00:00
Justin Hibbits
89965e7011 Use the right thread pointer for SPE alignment exceptions. 2016-10-23 01:01:08 +00:00
Justin Hibbits
dc9b124d66 Create a new MACHINE_ARCH for Freescale PowerPC e500v2
Summary:
The Freescale e500v2 PowerPC core does not use a standard FPU.
Instead, it uses a Signal Processing Engine (SPE)--a DSP-style vector processor
unit, which doubles as a FPU.  The PowerPC SPE ABI is incompatible with the
stock powerpc ABI, so a new MACHINE_ARCH was created to deal with this.
Additionaly, the SPE opcodes overlap with Altivec, so these are mutually
exclusive.  Taking advantage of this fact, a new file, powerpc/booke/spe.c, was
created with the same function set as in powerpc/powerpc/altivec.c, so it
becomes effectively a drop-in replacement.  setjmp/longjmp were modified to save
the upper 32-bits of the now-64-bit GPRs (upper 32-bits are only accessible by
the SPE).

Note: This does _not_ support the SPE in the e500v1, as the e500v1 SPE does not
support double-precision floating point.

Also, without a new MACHINE_ARCH it would be impossible to provide binary
packages which utilize the SPE.

Additionally, no work has been done to support ports, work is needed for this.
This also means no newer gcc can yet be used.  However, gcc's powerpc support
has been refactored which would make adding a powerpcspe-freebsd target very
easy.

Test Plan:
This was lightly tested on a RouterBoard RB800 and an AmigaOne A1222
(P1022-based) board, compiled against the new ABI.  Base system utilities
(/bin/sh, /bin/ls, etc) still function appropriately, the system is able to boot
multiuser.

Reviewed By:	bdrewery, imp
Relnotes:	yes
Differential Revision:	https://reviews.freebsd.org/D5683
2016-10-22 01:57:15 +00:00
Justin Hibbits
47cabd046d Remove a hack requiring dtsec0 to always be enabled for mdio.
Instead replace it with a different hack, that turns fman into a simplebus
subclass, and maps its children within its address space.

Since all PHY communication is done through dtsec0's mdio space, the FDT
contains a reference to the dtsec0 mdio handle in all nodes that need it.
Instead of using Freescale's implementation for MII access, use our own (copied
loosely from the eTSEC driver, and could possibly be merged eventually).  This
lets us access the registers directly rather than needing a full dtsec interface
just to access the registers.

Future directions will include turning fman into more of a simplebus, and not
mapping the region and playing games.  This will require changes to the dtsec
driver to make it a child of fman, and possibly other drivers as well.
2016-10-21 02:16:11 +00:00
Justin Hibbits
d25733dcb0 Un-static two local variables in the FPU emulator
Static variables aren't MP-safe, and this was causing bizarre segfaults on a
dual-core e500v2 system (P1022).

Still left is one static variable, which should be moved into the pcb instead,
but as illegal instructions haven't been hit yet, it's lower priority.

MFC after:	1 week
2016-10-19 02:23:29 +00:00
Justin Hibbits
69d251f910 Fix booting on systems that use loader(8) (most of them).
r306065/r306067 introduced ofw_parse_bootargs(), setting environment variables
from Open Firmware's /chosen/bootargs property.  On systems booting with
loader(8) (meaning, most systems), the initial static kenv is created with no
extra space, causing kern_setenv() to panic.  Since these already have the
environment set directly, there is no need to parse bootargs anyway.

Found by:	swills
2016-10-16 04:22:04 +00:00
John Baldwin
31dc1e9681 Drop support for using mmap() with /dev/kmem.
Using the device pager with /dev/kmem is not stable since KVA mappings
are transient, but the device pager caches the PA associated with a
given offset forever.  Interestingly, mips' implementation of
memmap() already refused requests for /dev/kmem.

Note that kvm_read/kvm_write do not use mmap, but use read and write on
/dev/kmem, so this should not affect libkvm users.

Reviewed by:	kib
MFC after:	2 months
2016-10-14 20:01:07 +00:00
Warner Losh
b2a7ac4802 Fix building on i386 and arm. But 'public domain' headers on the files
with no creative content. Include "lost" changes from git:
o Use /dev/efi instead of /dev/efidev
o Remove redundant NULL checks.

Submitted by: kib@, dim@, zbb@, emaste@
2016-10-13 06:56:23 +00:00
Jonathan T. Looney
bd79708dbf In the TCP stack, the hhook(9) framework provides hooks for kernel modules
to add actions that run when a TCP frame is sent or received on a TCP
session in the ESTABLISHED state. In the base tree, this functionality is
only used for the h_ertt module, which is used by the cc_cdg, cc_chd, cc_hd,
and cc_vegas congestion control modules.

Presently, we incur overhead to check for hooks each time a TCP frame is
sent or received on an ESTABLISHED TCP session.

This change adds a new compile-time option (TCP_HHOOK) to determine whether
to include the hhook(9) framework for TCP. To retain backwards
compatibility, I added the TCP_HHOOK option to every configuration file that
already defined "options INET". (Therefore, this patch introduces no
functional change. In order to see a functional difference, you need to
compile a custom kernel without the TCP_HHOOK option.) This change will
allow users to easily exclude this functionality from their kernel, should
they wish to do so.

Note that any users who use a custom kernel configuration and use one of the
congestion control modules listed above will need to add the TCP_HHOOK
option to their kernel configuration.

Reviewed by:	rrs, lstewart, hiren (previous version), sjg (makefiles only)
Sponsored by:	Netflix
Differential Revision:	https://reviews.freebsd.org/D8185
2016-10-12 02:16:42 +00:00
Warner Losh
943ac2b07e Include stubs even on the platforms we don't support so libsysdecode
continues to build.
2016-10-11 22:54:29 +00:00
Justin Hibbits
69d4785d15 Adjust copyright date. No real work was done on it until 2016. 2016-10-08 01:18:01 +00:00
Justin Hibbits
e5a8e24549 Fix e500mc/derivatives cpu idle
Setting the doze registers wasn't actually working, and was being masked by a
bad #ifdef.  Since the #ifdef was fixed, now e500mc-based SoCs hang at idle.
Fix this by using the intended wait.

MFC after:	1 week
2016-10-05 04:40:48 +00:00
Justin Hibbits
1e6afa0eaf Add NXP/Freescale DIU driver for PowerPC SoCs
Summary:
This enables some features of the DIU, using a static configuration,
specified either via a 'edid' property on the 'display' FDT node, or a
'video-mode' environment variable (bootarg).  'video-mode' was chosen because it
matches u-boot's naming, so it can be set with:

setenv bootargs video-mode=${video-mode}

at the u-boot CLI.

Mouse cursor is not supported currently, as a hardware cursor is not supported
by framebuffer VT yet.  Currently it only supports a 32bpp ARGB (actually BGRA)
format, and only a single composite plane, at up to 1280x1024.

Differential Revision: https://reviews.freebsd.org/D8022
2016-09-27 00:53:41 +00:00