Commit Graph

2119 Commits

Author SHA1 Message Date
Emmanuel Vadot
7073d12c4d ofw_spi: Parse property for the SPI mode and CS polarity.
As cs is stored in a uint32_t, use the last bit to store the
active high flag as it's unlikely that we will have that much CS.

Reviewed by:	loos
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D8614
2016-12-18 14:54:20 +00:00
Jared McNeill
a7514a4925 Add support for Ingenic JZ4780 SMBus controller.
Reviewed by:		kan
Relnotes:		yes
Differential Revision:	https://reviews.freebsd.org/D8793
2016-12-16 20:04:56 +00:00
Adrian Chadd
26eae5c681 [ar933x] don't waste memory/flash; drop the UMTX_CHAINS count down to 16. 2016-12-16 00:04:32 +00:00
John Baldwin
a24563566a Add 'const' to fn_name's return type to remove a cast. 2016-12-14 00:21:06 +00:00
John Baldwin
2aa82aeacc Fix stack traces in DDB for the debugger thread.
When the kernel debugger is entered, makectx() is called to store
appropriate state from the trapframe for the debugger into a global
kdb_pcb used as the thread context of the thread entering the
debugger.  Stack unwinders for DDB called via db_trace_thread() are
supposed to then use this saved context so that the stack trace for
the current thread starts at the location of the event that triggered
debugger entry.

MIPS was instead starting the stack trace of the current thread from
the context of db_trace_thread itself and unwinding back out through
the debugger to the original frame.  Fix a couple of things to bring
MIPS inline with other platforms:
- Fix makectx() to store the PC, SP, and RA in the right portion of
  the PCB used by db_trace_thread().
- Fix db_trace_thread() to always use kdb_thr_ctx() (and thus kdb_pcb
  for the debugger thread).
- Move the logic for tracing curthread from within the current
  function into db_trace_self() to match other architectures.

Sponsored by:	DARPA / AFRL
2016-12-13 22:30:48 +00:00
John Baldwin
ca311cf72b Use register_t instead of uintptr_t for register values in backtraces.
This fixes backtraces from DDB in n32 kernels as uintptr_t is only a
uint32_t.  In particular, the upper 32-bits of each register value were
treated as the register's value breaking both the output of register
values, but also the values of 'ra' and 'sp' required to walk up to the
previous frame.

Sponsored by:	DARPA / AFRL
2016-12-13 19:36:05 +00:00
John Baldwin
6c941e4724 Fix remove_userlocal_code() for n32.
n32 kernels use a 64-bit store to the TLS register rather than a 32-bit
store.

Sponsored by:	DARPA / AFRL
2016-12-13 19:27:31 +00:00
Michael Zhilin
167a228d79 [spi] reformat message and ar5315_spi minor fix
This commit corrects print of nomatch (newline was too early) and fix
unit number for new child in ar5315_spi (was 0, now is -1 to calculate it
according to actual system state)

Submitted by:	Hiroki Mori <yamori813@yahoo.co.jp>
Reviewed by:	ray, loos, mizhka
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D8749
2016-12-13 09:53:43 +00:00
Emmanuel Vadot
adff859ba2 Use the spibus accessor when applicable.
MFC after:	3 days
2016-12-12 20:04:31 +00:00
Ruslan Bukin
f3c658a869 Apply clear_mask correctly.
Reviewed by:	jmcneill, kan
Sponsored by:	DARPA, AFRL
2016-12-12 17:08:52 +00:00
Konrad Witaszczyk
480f31c214 Add support for encrypted kernel crash dumps.
Changes include modifications in kernel crash dump routines, dumpon(8) and
savecore(8). A new tool called decryptcore(8) was added.

A new DIOCSKERNELDUMP I/O control was added to send a kernel crash dump
configuration in the diocskerneldump_arg structure to the kernel.
The old DIOCSKERNELDUMP I/O control was renamed to DIOCSKERNELDUMP_FREEBSD11 for
backward ABI compatibility.

dumpon(8) generates an one-time random symmetric key and encrypts it using
an RSA public key in capability mode. Currently only AES-256-CBC is supported
but EKCD was designed to implement support for other algorithms in the future.
The public key is chosen using the -k flag. The dumpon rc(8) script can do this
automatically during startup using the dumppubkey rc.conf(5) variable.  Once the
keys are calculated dumpon sends them to the kernel via DIOCSKERNELDUMP I/O
control.

When the kernel receives the DIOCSKERNELDUMP I/O control it generates a random
IV and sets up the key schedule for the specified algorithm. Each time the
kernel tries to write a crash dump to the dump device, the IV is replaced by
a SHA-256 hash of the previous value. This is intended to make a possible
differential cryptanalysis harder since it is possible to write multiple crash
dumps without reboot by repeating the following commands:
# sysctl debug.kdb.enter=1
db> call doadump(0)
db> continue
# savecore

A kernel dump key consists of an algorithm identifier, an IV and an encrypted
symmetric key. The kernel dump key size is included in a kernel dump header.
The size is an unsigned 32-bit integer and it is aligned to a block size.
The header structure has 512 bytes to match the block size so it was required to
make a panic string 4 bytes shorter to add a new field to the header structure.
If the kernel dump key size in the header is nonzero it is assumed that the
kernel dump key is placed after the first header on the dump device and the core
dump is encrypted.

Separate functions were implemented to write the kernel dump header and the
kernel dump key as they need to be unencrypted. The dump_write function encrypts
data if the kernel was compiled with the EKCD option. Encrypted kernel textdumps
are not supported due to the way they are constructed which makes it impossible
to use the CBC mode for encryption. It should be also noted that textdumps don't
contain sensitive data by design as a user decides what information should be
dumped.

savecore(8) writes the kernel dump key to a key.# file if its size in the header
is nonzero. # is the number of the current core dump.

decryptcore(8) decrypts the core dump using a private RSA key and the kernel
dump key. This is performed by a child process in capability mode.
If the decryption was not successful the parent process removes a partially
decrypted core dump.

Description on how to encrypt crash dumps was added to the decryptcore(8),
dumpon(8), rc.conf(5) and savecore(8) manual pages.

EKCD was tested on amd64 using bhyve and i386, mipsel and sparc64 using QEMU.
The feature still has to be tested on arm and arm64 as it wasn't possible to run
FreeBSD due to the problems with QEMU emulation and lack of hardware.

Designed by:	def, pjd
Reviewed by:	cem, oshogbo, pjd
Partial review:	delphij, emaste, jhb, kib
Approved by:	pjd (mentor)
Differential Revision:	https://reviews.freebsd.org/D4712
2016-12-10 16:20:39 +00:00
Mark Johnston
7f68a896dc Add a COMPAT_FREEBSD11 kernel option.
Use it wherever COMPAT_FREEBSD10 is currently specified.

Reviewed by:	glebius, imp, jhb
Differential Revision:	https://reviews.freebsd.org/D8736
2016-12-09 18:54:12 +00:00
Ruslan Bukin
d9121bf564 Add registers for jz4780 audio and PDMA controllers.
Sponsored by:	DARPA, AFRL
2016-12-09 17:16:09 +00:00
Ruslan Bukin
4b3fae2c2d Add jz4780 internal codec initialization driver.
Sponsored by:	DARPA, AFRL
2016-12-08 16:28:34 +00:00
Landon J. Fuller
77cb4d3e50 bhnd(4): Unify NVRAM/SPROM parsing, implement compact SPROM layout encoding.
- Defined an abstract NVRAM I/O API (bhnd_nvram_io), decoupling NVRAM/SPROM
  parsing from the actual underlying NVRAM data provider (e.g. CFE firmware
  devices).
- Defined an abstract NVRAM data API (bhnd_nvram_data), decoupling
  higher-level NVRAM operations (indexed lookup, data conversion, etc) from
  the underlying NVRAM file format parsing/serialization.
- Implemented a new high-level bhnd_nvram_store API, providing indexed
  variable lookup, pending write tracking, etc on top of an arbitrary
  bhnd_nvram_data instance.
- Migrated all bhnd(4) NVRAM device drivers to the common bhnd_nvram_store
  API.
- Implemented a common bhnd_nvram_val API for parsing/encoding NVRAM
  variable values, including applying format-specific behavior when
  converting to/from the NVRAM string representations.
- Dropped the now unnecessary bhnd_nvram driver, and moved the
  broadcom/mips-specific CFE NVRAM driver out into sys/mips/broadcom.
- Implemented a new nvram_map file format:
        - Variable definitions are now defined separately from the SPROM
          layout. This will also allow us to define CIS tuple NVRAM
          mappings referencing the common NVRAM variable definitions.
        - Variables can now be defined within arbitrary named groups.
        - Textual descriptions and help information can be defined inline
          for both variables and variable groups.
        - Implemented a new, compact encoding of SPROM image layout
          offsets.
- Source-level (but not build system) support for building the NVRAM file
  format APIs (bhnd_nvram_io, bhnd_nvram_data, bhnd_nvram_store) as a
  userspace library.

The new compact SPROM image layout encoding is loosely modeled on Apple
dyld compressed LINKEDIT symbol binding opcodes; it provides a compact
state-machine encoding of the mapping between NVRAM variables and the SPROM
image offset, mask, and shift instructions necessary to decode or encode
the SPROM variable data.

The compact encoding reduces the size of the generated SPROM layout data
from roughly 60KB to 3KB. The sequential nature SPROM layout opcode tables
also simplify iteration of the SPROM variables, as it's no longer
neccessary to iterate the full NVRAM variable definition table, but
instead simply scan the SPROM revision's layout opcode table.

Approved by:    adrian (mentor)
Differential Revision:  https://reviews.freebsd.org/D8645
2016-11-26 23:22:32 +00:00
Ruslan Bukin
6873df70b2 Don't build Ingenic kernels until we have non-static FDT support
for them.

Sponsored by:	DARPA, AFRL
2016-11-26 10:20:33 +00:00
Ruslan Bukin
3ace382ab0 Split MALTA board config to big and little endian versions.
This fixes compilation after r308807 ("Pass MACHINE_ARCH on
command line for MIPS kernels.")

Sponsored by:	DARPA, AFRL
2016-11-23 11:56:22 +00:00
Ruslan Bukin
62993bb71e Increase pcpu size to 512 so it become both denominator
of PAGE_SIZE and aligned to CACHE_LINE_SIZE.

This fixes CTASSERT.

Sponsored by:	DARPA, AFRL
2016-11-23 11:30:40 +00:00
Ruslan Bukin
fbe94797ea Add PDMA controller registers.
Obtained from:	X1000 IoT Application Processor Programming Manual
Sponsored by:	DARPA, AFRL
2016-11-21 15:42:54 +00:00
Ruslan Bukin
38079cf572 Move FDT option to the main SoC file and mark boards config
as NO_UNIVERSE.

Pointed out by:	andrew
Sponsored by:	DARPA, AFRL
2016-11-21 15:35:56 +00:00
Alexander Kabaev
0f2bb99d43 Use ofw_gpiobus instead of plain gpiobus for CI20
Requesed by: mmel
2016-11-20 01:59:22 +00:00
Ruslan Bukin
4943459ce3 Enable SMP on Ingenic JZ4780.
It is required to proceed full cache flush before we can use wait
instruction on multicore, so use nop instead for now.

Submitted by:	kan
Sponsored by:	DARPA, AFRL
2016-11-19 18:03:46 +00:00
Ruslan Bukin
9a8f61fb5b Bring in support for Ingenic XBurst JZ4780 and
X1000 systems on chips.

Imgtec CI20 and Ingenic CANNA boards supported.

Submitted by:	Alexander Kabaev <kan@FreeBSD.org>
Reviewed by:	Ruslan Bukin <br@FreeBSD.org>
Sponsored by:	DARPA, AFRL
2016-11-19 17:46:18 +00:00
Ruslan Bukin
91f70e00c4 Move intrng includes to the main MIPS includes file.
Sponsored by:	DARPA, AFRL
2016-11-19 17:01:06 +00:00
Ruslan Bukin
d509eaf204 Account for bigger secondary data cache line size.
Secondary data cache line size can be bigger than
primary data cache line size, so use biggest value
as a minimum alignment.

Submitted by:	kan
Sponsored by:	DARPA, AFRL
2016-11-19 16:36:38 +00:00
Ruslan Bukin
92fd9fe2b7 Add Ingenic XBurst coprocessor 0 extra bits.
Submitted by:	kan
Sponsored by:	DARPA, AFRL
2016-11-19 15:38:13 +00:00
Ruslan Bukin
bf214121f8 Identify Ingenic CPUs.
Submitted by:	kan
Sponsored by:	DARPA, AFRL
2016-11-19 15:10:10 +00:00
Alexander Kabaev
63a16ecab1 Subject: [PATCH] Pass MACHINE_ARCH on command line for MIPS kernels.
While there, make param.h guess proper MACHINE_ARCH on hardfloat targets
correctly as well, so tools like bmake can get their defaults right.
This does not help the kernel case, since we compile them with forced
-msoft-float and need to override an incorrect guess by param.h.

Reviewed by: br
Differential Revision:	https://reviews.freebsd.org/D8574
2016-11-18 16:23:31 +00:00
Michael Zhilin
34cd8ebdcf [mips/ar531x] code cleanup, non-INTRNG support
This commit improves code styles like:
 - removing commented code
 - format comments as C-style
 - add spaces after #define-s

It also bring ability to build kernel without INTRNG and remove RedBoot dependency.

Tested on FON2201

Submitted by:	Hiroki Sato <yamori813@yahoo.co.jp>
Reviewed by:	adrian, mizhka
Approved by:	adrian(mentor)
Differential Revision:	https://reviews.freebsd.org/D8557
2016-11-18 14:06:29 +00:00
Michael Zhilin
4dfc28b7e8 [MIPS] Fix Config3[ULRI] printing
Bit identifier of printf %b is octal integer, but not decimal. ULRI bit is
13-th bit (starting with 0) according to MIPS Architecture Volume III v.6.
In this case the bit identifier (starts with 1) should be \16.

Reviewed by:    gonzo
Approved by:	adrian(mentor)
Differential Revision:	https://reviews.freebsd.org/D8516
2016-11-15 20:44:19 +00:00
John Baldwin
08dc89a621 Sync instruction cache's after writing user breakpoints on MIPS.
Add an implementation for pmaps_sync_icache() on MIPS that sync's the
instruction cache on all CPUs via smp_rendezvous() after a debugger
inserts a breakpoint via ptrace(PT_IO).

Tested by:	kan (on Creator CI20 running Ingenic JZ4780 SOC)
MFC after:	2 weeks
Sponsored by:	DARPA / AFRL
2016-11-15 17:01:48 +00:00
Michael Zhilin
679761c0e0 [MIPS] Print Config7 on boot for several MIPS architectures
Config7 contains useful fields, for instance, field AR indicating that the D-cache is configured to avoid cache aliases. This patch brings printing of config7 for MIPS 24K, 74K, 1004K.

Reviewed by:	adrian
Approved by:	adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D8514
2016-11-14 21:38:36 +00:00
Andrew Turner
a61804c095 Use the new ofw_bus_node_is_compatible function in the mips code.
Sponsored by:	ABT Systems Ltd
2016-11-13 09:33:41 +00:00
Ruslan Bukin
a2aa0aae07 Use correct signal number for floating point exceptions.
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
2016-10-31 15:49:41 +00:00
Ruslan Bukin
5bca221511 Add full softfloat and hardfloat support for MIPS.
This adds new target architectures for hardfloat:
mipselhf mipshf mips64elhf mips64hf.

Tested in QEMU only.

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D8376
2016-10-31 15:33:58 +00:00
John Baldwin
ed3abcbb0d Correct definition of 'struct sigcontext' on MIPS.
Add missing fields ('sr' and 'mc_tls') to 'struct sigcontext'.

The kernel doesn't use 'struct sigcontext' but instead uses 'ucontext_t'
which includes 'mcontext_t' in 'struct sigframe' to build the signal frame.
As a result, this change is not an ABI change but simply making
'struct sigcontext' correct.  Note that 'struct sigcontext' is only used
for "Traditional BSD style" signal handlers.

While here, rename the 'xxx' field to '__spare__' to match 'mcontext_t'.

Sponsored by:	DARPA, AFRL
2016-10-26 17:37:08 +00:00
Andriy Voskoboinyk
7453645f2a rtwn(4), urtwn(4): merge common code, add support for 11ac devices.
All devices:
- add support for rate adaptation via ieee80211_amrr(9);
- use short preamble for transmitted frames when needed;
- multi-bss support:
 * for RTL8821AU: 2 VAPs at the same time;
 * other: 1 any VAP + 1 sta VAP.
RTL8188CE:
- fix IQ calibration bug (reason of significant speed degradation);
- add h/w crypto acceleration support.
USB:
- A-MPDU Tx support;
- short GI support;
Other:
- add support for RTL8812AU / RTL8821AU chipsets
(a/b/g/n only; no ac yet);
- split merged code into subparts:
 * bus glue (usb/*, pci/*, rtl*/usb/*, rtl*/pci/*)
 * common (if_rtwn*)
 * chip-specific (rtl*/*)
- various other bugfixes.

Due to code reorganization, module names / requirements were changed too:
urtwn urtwnfw -> rtwn rtwn_usb rtwnfw
rtwn  rtwnfw  -> rtwn rtwn_pci rtwnfw

Tested with RTL8188CE, RTL8188CUS, RTL8188EU and RTL8821AU.

Tested by:	kevlo, garga,
		Peter Garshtja <peter.garshtja@ambient-md.com>,
		Kevin McAleavey <kevin.mcaleavey@knosproject.com>,
		Ilias-Dimitrios Vrachnis <id@vrachnis.com>,
		<otacilio.neto@bsd.com.br>
Relnotes:	yes
2016-10-17 20:38:24 +00:00
Hans Petter Selasky
d3bf5efc1f Fix device delete child function.
When detaching device trees parent devices must be detached prior to
detaching its children. This is because parent devices can have
pointers to the child devices in their softcs which are not
invalidated by device_delete_child(). This can cause use after free
issues and panic().

Device drivers implementing trees, must ensure its detach function
detaches or deletes all its children before returning.

While at it remove now redundant device_detach() calls before
device_delete_child() and device_delete_children(), mostly in
the USB controller drivers.

Tested by:		Jan Henrik Sylvester <me@janh.de>
Reviewed by:		jhb
Differential Revision:	https://reviews.freebsd.org/D8070
MFC after:		2 weeks
2016-10-17 10:20:38 +00:00
Warner Losh
b2a7ac4802 Fix building on i386 and arm. But 'public domain' headers on the files
with no creative content. Include "lost" changes from git:
o Use /dev/efi instead of /dev/efidev
o Remove redundant NULL checks.

Submitted by: kib@, dim@, zbb@, emaste@
2016-10-13 06:56:23 +00:00
Ed Maste
de1cac0d4b Add COMPAT_FREEBSD10 to the MIPS ERL kernel config
As of r302092, pipe is a wrapper around pipe2 and the pipe syscall is no
longer used. It is included only with the COMPAT_FREEBSD10 kernel option.
Add the compat option to support upgrades from systems with an earlier
userland.

MFC after:	1 week
2016-10-12 18:49:30 +00:00
Oleksandr Tymoshenko
c38fb7809f INTRNG: Propagate IRQ activation error to API consumer
Keep resource state consistent with INTRNG state - if intr_activate_irq
fails - deactivate resource and propagate error to calling function

Reviewed by:	mmel
2016-10-12 17:10:59 +00:00
Jonathan T. Looney
bd79708dbf In the TCP stack, the hhook(9) framework provides hooks for kernel modules
to add actions that run when a TCP frame is sent or received on a TCP
session in the ESTABLISHED state. In the base tree, this functionality is
only used for the h_ertt module, which is used by the cc_cdg, cc_chd, cc_hd,
and cc_vegas congestion control modules.

Presently, we incur overhead to check for hooks each time a TCP frame is
sent or received on an ESTABLISHED TCP session.

This change adds a new compile-time option (TCP_HHOOK) to determine whether
to include the hhook(9) framework for TCP. To retain backwards
compatibility, I added the TCP_HHOOK option to every configuration file that
already defined "options INET". (Therefore, this patch introduces no
functional change. In order to see a functional difference, you need to
compile a custom kernel without the TCP_HHOOK option.) This change will
allow users to easily exclude this functionality from their kernel, should
they wish to do so.

Note that any users who use a custom kernel configuration and use one of the
congestion control modules listed above will need to add the TCP_HHOOK
option to their kernel configuration.

Reviewed by:	rrs, lstewart, hiren (previous version), sjg (makefiles only)
Sponsored by:	Netflix
Differential Revision:	https://reviews.freebsd.org/D8185
2016-10-12 02:16:42 +00:00
Warner Losh
943ac2b07e Include stubs even on the platforms we don't support so libsysdecode
continues to build.
2016-10-11 22:54:29 +00:00
Adrian Chadd
ce4333da79 [ar531x] add default configs for AR531x ports.
Submitted by:	Mori Hiroki <yamori813@yahoo.co.jp>
Differential Revision:	https://reviews.freebsd.org/D7237
2016-10-06 20:37:23 +00:00
Adrian Chadd
7c12b677f5 [ar531x] add initial port for the AR231x/531x series of SoCs.
These are older MIPS4kc parts from Atheros.  They typically ran at
sub-200MHz and have 11bg, 11a, or 11abg wifi MAC/PHYs integrated.

This port is the initial non-wifi pieces required to bring up the
chip.  I'll commit the redboot and other pieces later, and then
hopefully(!) wifi support will follow.

Submitted by:   Mori Hiroki <yamori813@yahoo.co.jp>
Differential Revision:  https://reviews.freebsd.org/D7237
2016-10-04 16:27:36 +00:00
Ruslan Bukin
3af5cc2e50 Use SIGSEGV signal for memory protection failures from userspace on MIPS.
(same as ARMv8, RISC-V and other architectures do).
This makes mmap tests happy.

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
2016-09-28 14:13:41 +00:00
Ruslan Bukin
2d1c384470 Fill all the siginfo so we have si_value set as well.
This fixes timer_create(2) tests.

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
2016-09-28 12:23:46 +00:00
Ruslan Bukin
617a841d4a Set the standard freebsd brand note for ELF binaries on MIPS,
so binaries now get correct osreldate.

Reviewed by:	jhb
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D7899
2016-09-22 12:48:01 +00:00
Landon J. Fuller
f75615f26f Split bcm_mipscore.c into bcm_bmips (BMIPS32/BMIPS3300) and bcm_mips74k
drivers.

The BMIPS32/BMIPS3300 cores use a register layout distinct from the MIPS74K
core, and are only found on siba(4) devices.

Reviewed by:	mizhka
Approved by:	adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D7791
2016-09-18 21:28:09 +00:00
Brooks Davis
79816bbe94 The TLS offset is a property of the process ABI.
Move to a per-proc TLS offset rather than incorrectly keying off the
presense of freebsd32 compability in the kernel.

Reviewed by:	adrian, sbruno
Obtained from:	CheriBSD
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D7843
2016-09-15 17:25:52 +00:00