Commit Graph

22486 Commits

Author SHA1 Message Date
Adrian Chadd
0293774898 Merlin -> Kiwi 2011-05-26 09:16:09 +00:00
Adrian Chadd
d8daa2e3f6 Bring over my AR9287 work in progress.
It isn't linked into the build because it's missing the TX power
and PDADC programming code.

This code is mostly based on the ath9k codebase, compared against
the Atheros codebase as appropriate.

What's implemented:

* probe/attach
* EEPROM board value programming
* RX initial calibration
* radio channel programming
* general MAC / baseband setup
* async fifo setup
* open-loop tx power calibration

What's missing before it can be enabled by default:

* TX power / calibration setting code
* closed-loop tx power calibration routines
* TSF2 handling
* generic timer support from ath9k

Obtained from:	Atheros, ath9k
2011-05-26 09:15:33 +00:00
Adrian Chadd
b3096aee0b AR9287 prep work:
* Add PCI/PCIE devids
* Add AR9287/Kiwi version check macros
* AR_SREV_9287 -> AR_SREV_KIWI

Obtained from:	Atheros, ath9k
2011-05-26 08:35:47 +00:00
Adrian Chadd
a1cf3a877a Add temp sense to the EEPROM variable list;
Export the temperature sense variables to ah_eeprom_9287.c
2011-05-26 08:20:14 +00:00
Alexander Motin
0591ab9c30 Add better names for the Intel HDMI audio codecs. 2011-05-26 06:43:10 +00:00
Alexander Motin
08c8fde007 According to SATA specification, when Serial ATA Enclosure Management Bridge
(SEMB) is unable to communicate to Storage Enclosure Processor (SEP), in
response to hard and soft resets it should among other things return value
0x7F in Status register. The weird side is that it means DRQ bit set, which
tells that reset request is not completed. It would be fine if SEMB was the
only device on port. But if SEMB connected to PMP or built into it, it may
block access to other devices sharing same SATA port.

Make some tunings/fixes to soft-reset handling to workaround the issue:
 - ahci(4): request CLO on the port after soft reset to ignore DRQ bit;
 - siis(4): gracefully reinitialize port after soft reset timeout (hardware
doesn't detect reset request completion in this case);
 - mvs(4): if PMP is used, send dummy soft-reset to the PMP port to make it
clear DRQ bit for us.

For now this makes quirks in ata_pmp.c, hiding SEMB ports of SiI3726/SiI4726
PMPs, less important. Further, if hardware permit, I hope to implement real
SEMB support.
2011-05-25 13:55:49 +00:00
Adrian Chadd
727edca45b The current ANI capability information uses a different set of
values for the commands, compared to the internal command values
(HAL_ANI_CMD.)

My eventual aim is to make the HAL_ANI_CMD internal enum match
the public API and then remove all this messiness.

This now allows HAL_CAP_INTMIT users to use a public HAL_CAP_INTMIT_
enum rather than magic constants.

The only magic constants currently used by if_ath are "enable" and
"present". Some local tools of mine allow for direct, manual fiddling
of the ANI variables and I'll convert these to use the public enum API
before I commit them.
2011-05-25 07:34:49 +00:00
Adrian Chadd
241d9a3400 Tidy up the ANI API in preparation for looking to expose some more
of the ANI statistics and committing some tools which use these.

* Change HAL_ANI_* commands _back_ to be numerical, rather than a
  bitmap;
* modify access to the ANI control bitmap to convert a command to
  a bitmap;
* Fix the ANI noise immunity fiddling for CCK errors - it wasn't
  checking whether noise immunity was disabled or not.
2011-05-25 07:19:19 +00:00
Pyun YongHyeon
81e2a01a77 style(9) 2011-05-24 20:39:07 +00:00
Adrian Chadd
9f4563363b The ANI control for the AR5416 and later chips was calling ar5212AniControl(),
which did AR5212 specific initialisation. This would cause some slight
silliness when enabling/disabling ANI.

Just to be completely correct - and to ensure the phy error mask/RX filter
register isn't incorrectly played with - make the ANI control function a
method, have it set appropriately for AR5212/AR5416, and call that from the
ANI control interface.
2011-05-24 18:25:40 +00:00
Adrian Chadd
634be0a971 Use the new per-series antenna and TPC definitions when setting ctl8->11.
This should hopefully make it clearer to developers what is going on
and when TPC is being hacked on, make it obvious why it isn't working for
series 1, 2, 3.

I won't flip on setting TX power for TX series 1, 2, 3 until I've done
some further testing with Kite to ensure it doesn't break anything.
(Before people ask - yes, TPC is only needed for 5ghz regdomains and
yes, Kite is a 2.4ghz only chip, but there are potential use cases
for 2ghz TPC. I just need to sit down and ensure it's supported and
functional.)
2011-05-24 05:49:02 +00:00
Adrian Chadd
e808ca4454 Add in descriptions for TX descriptor fields ctl8-11 - these fields
control the antenna control bits for the four TX series and the
TPC settings for TX series 1, 2, 3.

The specifics:

* The TPC setting for TX series 0 is handled in ctl0.

* TPC is currently disabled, so the per-packet TX power is
  set via the global per-rate TX power register, not per packet.

* The antenna control bits don't matter for AR5416 and later
  so they should stay 0 (which they currently do); they may
  be set for Kite but as there's no TX diversity supported
  at the moment (it requires the NIC to be built with an
  external antenna switch, matching how antenna diversity
  is done on legacy NICs), so again keep them 0.

This is in preparation for supporting per-rate TPC on the
AR5416 and later. The Kite (and soon to come Kiwi) code
sets ctl8-11 to 0x0, which doesn't have any effect at
the moment. When TPC is enabled it would result in the
second, third and fourth TX series attmpts to be done with
a TX power of 0. This commit doesn't change that; it'll
be followed up with some commits to properly set the TPC
registers appropriately.
2011-05-24 05:34:45 +00:00
Attilio Rao
3ac3f6002b MFC 2011-05-23 23:58:02 +00:00
Pyun YongHyeon
8be664b8b7 When MTU is changed, check whether driver should be reinitialized or
not.  If reinitialized is required, clear driver running flag.
2011-05-23 21:56:04 +00:00
Pyun YongHyeon
e0029a7260 Add initial support for Marvell 88E8055/88E8075 Yukon Supreme. 2011-05-23 21:51:47 +00:00
Pyun YongHyeon
fe0b141e73 Do not touch ASF related register for controllers that do not have
these registers. Also disable Watchdog of ASF microcontroller.
2011-05-23 21:11:46 +00:00
Pyun YongHyeon
c6a34f768e Make sure to enable all clocks before accessing registers.
Releasing PHY from power down/COMA is done after enabling all
clocks. While I'm here remove unnecessary controller reset.
2011-05-23 21:00:56 +00:00
Pyun YongHyeon
d91192e329 Do not configure RAM registers for controllers that do not have
them.  These registers are defined only for Yukon XL, Yukon EC and
Yukon FE.
2011-05-23 20:18:09 +00:00
Jung-uk Kim
ca5f1efdd9 Decrease ACPI-fast timecounter quality to 900 and increase HPET timecounter
quality to 950.  HPET on modern platforms usually have better resolution and
lower latency than ACPI timer.  Effectively this changes default timecounter
hardware from ACPI-fast to HPET by default when both are available.

Discussed with:	avg
2011-05-23 20:12:36 +00:00
Pyun YongHyeon
7b4f47c1db Rework store and forward configuration of TX MAC FIFO. Basically it
enables store and forward mode except for jumbo frame on Yukon
Ultra.
2011-05-23 20:09:32 +00:00
Pyun YongHyeon
10e71e2260 Do not blindly clear entire GPHY control register. It seems some
bits of the register is used for other purposes such that clearing
these bits resulted in unexpected results such as corrupted RX
frames or missing LE status updates.  For old controllers like
Yukon EC it had no effect but it caused all kind of troubles on
Yukon Supreme.
This change shall improve stability of controllers like Yukon
Ultra, Ultra2, Extreme, Optima and Supreme.
2011-05-23 19:58:08 +00:00
Attilio Rao
dc6dc1f573 Merge r221614,221696,221737,221840 from largeSMP project branch:
Rewrite atomic operations for powerpc in order to achieve the following:
- Produce a type-clean implementation (in terms of functions arguments
  and returned values) for the primitives.
- Fix errors with _long() atomics where they ended up with the wrong
  arguments to be accepted.
- Follow the sys/type.h specifics that define the numbered types starting
  from standard C types.
- Let _ptr() version to not auto-magically cast arguments, but leave
  the burden on callers, as _ptr() atomic is intended to be used
  relatively rarely.

Fix cfi in order to support the latest point.

In collabouration with:	bde
Tested by:		andreast, nwhitehorn, jceel
MFC after:		2 weeks
2011-05-22 20:55:54 +00:00
Attilio Rao
8c4431d022 MFC 2011-05-22 20:41:10 +00:00
Adrian Chadd
cd50bf427a The Merlin analog register bank is from 0x7800 -> 0x78fc; fix the code
to reflect this.
2011-05-21 09:23:18 +00:00
Attilio Rao
76273fcba4 MFC 2011-05-21 01:44:13 +00:00
Xin LI
dd4aae65f1 Add a new knob to atkbd(4) to enable typematic rate detection on boot,
which is now disabled by default.  The detection is known to cause hangs
on boot with some new Lenovo laptops on FreeBSD/amd64.

Reported by:	gnn
Discussed with:	jkim
MFC after:	3 months
2011-05-20 22:36:17 +00:00
Pyun YongHyeon
7ba75dc4e9 Datasheet says vge(4) controllers support DAC but it seems that's
not true on old PCI based controllers.  DAC configuration is read
from EEPROM in device reset phase and driver can override DAC
configuration.  However I guess there is an undocumented reason why
EEPROM configuration does not enable DAC so do not blindly override
DAC configuration.  Recent PCIe based controllers are supposed to
support 64bit DMA so allow 64bit DMA only on PCIe based controllers.

PR:		kern/157184
MFC after:	1 week
2011-05-20 18:27:13 +00:00
Pyun YongHyeon
83242185a3 Remove unnecessary controller reinitialization by checking
IFF_DRV_RUNNING flag.  Previously running dhclient or adding alias
addresses reinitialized controller and it resulted in unnecessary
link flips.

Reviewed by:	marius
2011-05-20 17:01:22 +00:00
Attilio Rao
1a53b3fd04 MFC 2011-05-20 15:48:08 +00:00
Pyun YongHyeon
83ad330dd5 Fix typo.
Submitted by:	brad at OpenBSD
2011-05-19 23:13:08 +00:00
Attilio Rao
1fff3a5663 MFC 2011-05-19 22:55:37 +00:00
Navdeep Parhar
b0775aef77 Simplify t4_os_find_pci_capability.
MFC after:	3 days
2011-05-19 19:37:41 +00:00
John Baldwin
10414b71e3 Add support for the SIIG Cyber 2S PCIe adapter. It is based on an
Oxford Semiconductor OX16PCI954 but uses only two ports with a non-default
clock rate.

PR:		kern/152034
Tested by:	Hans Fiedler  hans of hermes louisville edu
MFC after:	1 week
2011-05-19 11:41:12 +00:00
Navdeep Parhar
bc14b14d62 - Enable per-channel congestion notification.
- Enable PCIe relaxed ordering for all egress queues and rx data buffers.

MFC after:	3 days
2011-05-18 22:09:04 +00:00
Attilio Rao
5f6b159db7 MFC 2011-05-18 16:01:29 +00:00
Adrian Chadd
db18c342da This isn't needed any longer, it's defined in ah_internal.h. 2011-05-18 11:28:23 +00:00
Andriy Gapon
cd10bffa61 usb: change to one-pass probing of device drivers
This brings USB bus more in line with how newbus is supposed to be used.
Also, because of the two-pass probing the following message was produced
by devd in default configuration when almost any USB device was
connected:
	Unknown USB device: vendor <> product <> bus <>
This should be fixed now.

Note that many USB device drivers pass some information from probe
method to attach method via ivars.  For this to continue working we rely
on the fact that the subr_bus code calls probe method of a winning driver
again before calling its attach method in the case where multiple
drivers claim to support a device.  This is done because device
description is set in successful probe methods and we want to get a correct
device description from a winning driver.  So now this logic is re-used
for setting ivars too.

Reviewed by:	hselasky
MFC after:	1 month
2011-05-18 07:40:12 +00:00
Adrian Chadd
369589482c Modify the sample rate control algorithm to only select/sample HT
rates for HT nodes.
2011-05-18 07:20:30 +00:00
Attilio Rao
a1554104b8 MFC 2011-05-17 22:27:35 +00:00
Alexander Motin
96b7988f12 Add support for "LED" enclosure management messages, defined by the AHCI.
When supported by hardware, this allows to control per-port activity, locate
and fault LEDs via the led(4) API for localization and status reporting
purposes. Supporting AHCI controllers may transmit that information to the
backplane controllers via SGPIO interface. Backplane controllers interpret
received statuses in some way (IBPI standard) to report them using present
indicators.
2011-05-17 22:07:45 +00:00
Attilio Rao
fea3a3fa94 MFC 2011-05-17 22:03:01 +00:00
Adrian Chadd
6c63a20b49 Fix the debugging code path to correctly support HAL_DEBUG_UNMASKABLE. 2011-05-17 16:30:34 +00:00
Adrian Chadd
fdc2e66c57 Fix case, introduced in my previous commit.
Pointy hat goes to:	adrian, for having multiple build screens
			open and checking the wrong one.
2011-05-17 15:03:39 +00:00
Adrian Chadd
655a610236 Use the halMcastKeySrchSupport capability bit to selectively enable/disable
the multicast key search support for AR5212, AR5416 and later.

The general HAL routine ath_hal_getcapability() implement checking this
but it's overridden by a check in ar5212_misc:ar5212GetCapability().
This restores the later functionality in case it's found to be broken
in any of the 11n chipsets.
2011-05-17 11:56:50 +00:00
Adrian Chadd
90de864a5e Set this HAL capabilities flag correctly even though it isn't currently
being used.
2011-05-17 11:52:53 +00:00
Ruslan Ermilov
934d7bccdb Renamed PCI_INTERFACE_XHCI to PCIP_SERIALBUS_USB_XHCI and moved it
to <dev/pci/pcireg.h>.

Reviewed by:	hselasky
MFC after:	3 days
2011-05-17 11:23:43 +00:00
Navdeep Parhar
c43431465e Add missing header. The test for VLAN_CAPABILITIES later in the file
doesn't make sense without it.

MFC after:	3 days
2011-05-17 00:40:11 +00:00
Attilio Rao
7c1b3c0920 Merge r221279,221280 from largeSMP project:
pmc_mask doesn't need to use memory barriers.

Reviewed by:	fabient
Tested by:	several
MFC after:	1 week
2011-05-16 23:35:14 +00:00
Attilio Rao
7e7a34e520 MFC 2011-05-16 16:34:03 +00:00
Pyun YongHyeon
463a7e27bf Correctly disable jumbo frame support for BCM5719 A0. 2011-05-15 21:44:51 +00:00
Henrik Brix Andersen
da25396a71 Fix breakage on pc98 by redefining DEBUG().
Pointy hat to:	brix
2011-05-15 19:04:08 +00:00
Adrian Chadd
e9d1191f6a * Add some more TX descriptor error counters; this'll be helpful when
implementing TX aggregation
* Whilst I'm there, comment some RX error counters
2011-05-15 15:54:34 +00:00
Attilio Rao
447274a88b MFC 2011-05-15 15:47:16 +00:00
Henrik Brix Andersen
149d1c897e Add I2C bus driver for the AMD Geode LX series CS5536 Companion
Device.

Reviewed by:    jhb (newbus bits only), adrian
2011-05-15 14:01:23 +00:00
Marius Strobl
c71dacd168 Recognize the SAB 82532 found in Fujitsu PRIMEPOWER650 and 900. 2011-05-15 13:27:38 +00:00
Marius Strobl
c6d7d6c03e Add support for MK48T37. 2011-05-15 13:17:08 +00:00
Bernhard Schmidt
4f6760821e Only update the scheduler's byte count table for aggregation queues.
The other queues, especially the command queue, uses the FIFO mode
which doesn't require the byte count table because queued entries are
processed in order.

Pointed out by:	Lucius Windschuh <lwindschuh at googlemail dot com>
2011-05-15 08:09:36 +00:00
Adrian Chadd
0148401a3f Fix NF calibration breakage introduced by me in a past commit.
Since the returned NF will be -ve, checking for <= 0 is not good
enough. For now, check whether it equals 0 or -1; a future commit
will tidy this mess up and have it return HAL_BOOL instead.
2011-05-15 07:59:33 +00:00
Marius Strobl
087a4650e2 - There's no need for nibbletab to be static, it's const however.
- Fix whitespace.
2011-05-14 20:31:04 +00:00
Navdeep Parhar
af49c94220 sysctl that displays the absolute queue id of an rxq. 2011-05-14 19:27:15 +00:00
Attilio Rao
c02f1527a9 MFC 2011-05-14 19:20:13 +00:00
Adrian Chadd
acc8122719 Fix the Merlin 5ghz fast-clock EEPROM fetch to return the correct value.
The eeprom Get method should return HAL_OK if fastclock is enabled in the
EEPROM. It was returning the opposite of what it should have.

Submitted by:	Matthew Fleming <mdf356@gmail.com>
2011-05-14 15:24:15 +00:00
Adrian Chadd
92ffeb633d Fix the eeprom set API method to return HAL_STATUS.
The code assumed it could return HAL_OK, HAL_EINVAL and other
HAL_STATUS types; so it shouldn't be declared as returning HAL_BOOL.

This commit was brought to you by the Clang compiler.

Submitted by:	Matthew Fleming <mdf356@gmail.com>
2011-05-14 15:12:02 +00:00
Adrian Chadd
047d6827d0 Import initial EEPROM code for Kite (AR9287).
I've tested this locally and it does indeed read and attach to an AR9287
EEPROM. But a lot more code needs to be ported over to the HAL before
the AR9287 is functional.

I'm importing this separate from the rest of the codebase (and unlinked from
the build for now) in case someone wishes to begin fiddling with porting
the rest of the code over from Linux ath9k.

Obtained from:	Linux ath9k
2011-05-14 14:25:15 +00:00
Hans Petter Selasky
e1f3a66f15 Add new USB ID's.
Submitted by:	Jim Bryant
MFC after:	3 days
2011-05-14 12:16:09 +00:00
Adrian Chadd
d6415a7cf6 When disabling RIFS for Sowl (AR9160) and Howl (AR9130), make sure RIFS
is totally disabled.

The Atheros HAL code does this for Sowl/Howl but not for Owl (AR5416) where
RIFS is disabled by default.

This seems to quieten the occasional baseband hang I've been seeing with
the AR9160 in STA mode under constant heavy traffic load.

Obtained from:	Atheros
2011-05-14 05:43:33 +00:00
Adrian Chadd
b357d5767b Major fix: when doing open-loop TX power calibration, adjust
the correct CCK rates rather than adjusting the first handful.
This may have affected some AR9280 based NICs.

Minor fix: merlin check update
2011-05-14 04:17:16 +00:00
Adrian Chadd
98cdd90425 Fixes from the Atheros HAL - formatting; update Merlin checks to be consistent.
Nothing functional should change with this commit.
2011-05-14 04:05:23 +00:00
Attilio Rao
e0c109e8c1 MFC 2011-05-14 02:28:26 +00:00
Attilio Rao
4b547324c0 Disconnect sun4v architecture from the three.
Some files keep the SUN4V tags as a code reference, for the future,
if any rewamped sun4v support wants to be added again.

Reviewed by:	marius
Tested by:	sbruno
Approved by:	re
2011-05-14 01:53:38 +00:00
Adrian Chadd
307abf289d Even though initial calibrations aren't done (yet), add this so we're
consistent with the Atheros HAL.
2011-05-14 01:41:36 +00:00
Attilio Rao
b2aa562e7b MFC 2011-05-13 20:58:48 +00:00
Matthew D Fleming
cfb00e5aa7 Move the ZERO_REGION_SIZE to a machine-dependent file, as on many
architectures (i386, for example) the virtual memory space may be
constrained enough that 2MB is a large chunk.  Use 64K for arches
other than amd64 and ia64, with special handling for sparc64 due to
differing hardware.

Also commit the comment changes to kmem_init_zero_region() that I
missed due to not saving the file.  (Darn the unfamiliar development
environment).

Arch maintainers, please feel free to adjust ZERO_REGION_SIZE as you
see fit.

Requested by:	alc
MFC after:	1 week
MFC with:	r221853
2011-05-13 19:35:01 +00:00
Matthew D Fleming
89cb2a19ec Usa a globally visible region of zeros for both /dev/zero and the md
device.  There are likely other kernel uses of "blob of zeros" than can
be converted.

Reviewed by:	alc
MFC after:	1 week
2011-05-13 18:48:00 +00:00
Attilio Rao
739e31f6d7 MFC 2011-05-13 15:20:57 +00:00
Attilio Rao
3f8fdcfde3 After rewriting powerpc atomic we decided to commit at the constraint
that for _ptr operations, when not used directly with uintptr_t, we
needed to manually cast.

Use the cast on the _ptr version, where it actually wasn't (please note
that i386 doesn't get it right, while amd64 doesn't seem to compile
cfi neither in LINT, that is why it doesn't fail).

Reported by:	sbruno
2011-05-13 15:09:35 +00:00
Henrik Brix Andersen
adc38bf22f Allow direct children of PCI-ISA bridges to allocate resources from
the parent PCI bus.

Heavily inspired by jhb@ and a similar implementation present in
sys/dev/pci/vga_pci.c.

Reviewed by:	jhb
Approved by:	jhb
2011-05-13 15:06:35 +00:00
Adrian Chadd
4342b6100b Only do open loop power control and temperature compensation
for the AR9280 based NICs if it's actually enabled.

Some of the OLC code was erroneously called during setup
and calibration. This may have caused some incorrect behaviour.
2011-05-13 14:33:45 +00:00
Adrian Chadd
2f399d37ee Remove duplicate code - add a function which calculates the ratesArray[]
table which contains the per-rate target TX power.

This code is shared between the v14 eeprom board setup (AR5416, AR9160,
AR9280) and will also be used by the upcoming Kite (AR9287) support.
2011-05-13 10:36:38 +00:00
Adrian Chadd
68b3f39d74 Some diversity changes relating to AR9285.
* grab the main, alt and selected LNA config
* add some optional / disabled logging code
* add a check to reject packets with an invalid main rssi too,
  in case the alt is the active receive chain and main is -ve.

Note: The software-controlled combined diversity code is still disabled.
2011-05-13 09:57:12 +00:00
Alexander Motin
c4f9a10590 Fix msleep() usage in Xen balloon driver to not wake up on every HZ tick. 2011-05-13 03:40:16 +00:00
David Christensen
8fedd5eb65 - Use bus_describe_intr() to describe interrupt usage.
- Use bus_bind_intr() to bind interrupt to a CPU when RSS/TSS is used.
- Use M_DONTWAIT for RSS/TSS buffer allocation.
- Add statistic to track max DRBR queue depth.
- Fix problem in bxe_change_mtu() which referenced the old MTU size
  in a debug print statement.

MFC after:	Two weeks
2011-05-12 23:26:53 +00:00
Pyun YongHyeon
bbe2ca7533 Add initial BCM5719 support. TSO and jumbo frame was intentionally
disabled for BCM5719 A0 revision due to known hardware errata.
Many thanks to Broadcom for continuing support of FreeBSD.

Submitted by:	Geans Pin at Broadcom
2011-05-12 17:15:57 +00:00
Pyun YongHyeon
f6d9580d0d Explicitly clear 1000baseT control register for F1 PHY used in
AR8132 FastEthernet controller. The PHY has no ability to
establish a gigabit link. Previously only link parters which
support down-shifting was able to establish link.
This change should fix a long standing link establishment issue of
AR8132.

PR:		kern/156935
MFC after:	1 week
2011-05-12 17:11:31 +00:00
Nathan Whitehorn
6ac75c91b7 Remove some hacks to handle strange behavior of LXT 970 PHYs now better
handled in miibus after r221812. Thanks to marius@ for piecing this
together!
2011-05-12 14:27:28 +00:00
Marius Strobl
7bd2d458c2 Some PHYs like the Level One LXT970 optionally can default to isolation
after rest, in which case we may need to deisolate it.
Tested by:	nwhitehorn

MFC after	1 week
2011-05-12 14:16:07 +00:00
Adrian Chadd
dce0bcca8a Now that the devices with functioning ps-poll hardware support have
been enumerated (merlin and later), flick this on.
2011-05-12 14:03:29 +00:00
Attilio Rao
ef607a6aa3 MFC 2011-05-12 14:01:40 +00:00
Andriy Gapon
76dc2afdc7 fix build on 32-bit platforms for r221803
Casting a pointer to a wide integer is probably not that bad, but I am
still guilty of not testing this.

Pointyhat to:	avg
MFC after:	1 week
X-MFC with:	r221803
2011-05-12 12:18:01 +00:00
Adrian Chadd
4b5404a9de Break out the AR9285 analog registers from ar5416/ar5416phy.h and put
them in a new header file, ar9002/ar9285_an.h.

Shuffle the AR9280 analog registers in ar5416/ar541phy.h into a contiguous
spot.
2011-05-12 10:11:24 +00:00
Andriy Gapon
a5669965bd dsp/pcm: allow to mmap both read and write buffers using the same fd
This brings our implementation in line with OSS specification for
systems that support mmap.  The change should also improve compatibility
with OSS software not specifically written for FreeBSD, e.g. PulseAudio
OSS plugin.

Reviewed by:	kib, jhb
MFC after:	1 week
2011-05-12 07:44:41 +00:00
Adrian Chadd
003df2a90f Fix the half/quater rate PLL setup for AR5416, AR9160 and
(beta?) AR9280 chips.

Note: This doesn't "fix" half/quarter rate support for these
chips; it merely fixes an oversight.

Obtained from:	Atheros
2011-05-12 03:25:24 +00:00
Adrian Chadd
8a90965b83 Fixes from Atheros:
* If AR9130, give the chip extra time to reset
* If AR5416, don't shutdown the chip during reset
2011-05-12 03:15:21 +00:00
Jack F Vogel
4cc96c3e8f Correct a typo 2011-05-12 00:10:29 +00:00
Jack F Vogel
73e3bb6563 Chipset support for the new Intel Panther Point PCH, thanks
to Seth Heasley for preparing the changes.
2011-05-11 20:31:27 +00:00
Adrian Chadd
6b00c928cb Make the NF calibration logic (hopefully!) more resistive to noisy
environments.

In setups where NF calibration can take a while, don't load the CCA
and kick off a new NF calibration if the previous one hasn't yet
completed. This shouldn't happen unless the environment is noisy but
those exist (hi phk!).

Here, if the previous NF hasn't completed when ar5416LoadNf() is run
(which reads the NF), it skips updating the history buffer, loading
the NF CCA array and kicking off the next NF cal. It's hoped it'll
occur in the next long calibration interval.

Obtained from:	Atheros, ath9k, my local HAL
2011-05-11 13:40:13 +00:00
Adrian Chadd
fd331bf9bb Always log if the NF CCA load fails; so users with debugging enabled
can see they're likely in a very noisy environment.
2011-05-11 13:25:43 +00:00
Adrian Chadd
7a8796d17d Make sure the chip is awake before writing to it to finally detach
it.

Obtained from:	Atheros
2011-05-11 13:24:17 +00:00
Adrian Chadd
46dde1e6fa Add a new flag - HAL_DEBUG_UNMASKABLE - which always logs a debug message
(when debug is enabled) no matter what.
2011-05-11 13:22:41 +00:00
Adrian Chadd
5645b9a093 Remove unused variable 2011-05-11 13:20:25 +00:00
Adrian Chadd
85191ae6e8 Remove the initial NF completion check.
This is taking quite a while for some people in some situations
(eg AR5418 in phk's Abusive Radio Environment).

Instead, the rest of the calibration related code should
ensure that a NF calibration has occured before reading NF
values and kicking off another NF calibration.

The channel should also likely be marked as "noisy" (CWINT)
if the NF calibration takes too long.
2011-05-11 11:02:20 +00:00
Adrian Chadd
37fb34b48b Remove a now unneeded comment.. 2011-05-11 10:30:31 +00:00
Adrian Chadd
c454afe290 Restore the RSSI threshold after writing the board values.
This would be overwritten by the board initvals written in ah->writeIni().
2011-05-11 09:47:48 +00:00
Marius Strobl
d648297f32 Fix whitespace. 2011-05-10 18:41:46 +00:00
Marius Strobl
693ad91c2b Fix a bug in r221407; this driver doesn't add the media itself.
PR:	156893
2011-05-10 18:38:01 +00:00
Attilio Rao
b68eda3b54 MFC 2011-05-10 15:54:37 +00:00
John Baldwin
30ced0d8ea Add an entry for the SIIG Quartet Serial 850 which uses an Oxford
chip with a non-default clock.

PR:		kern/147583
MFC after:	1 week
2011-05-10 12:40:35 +00:00
Adrian Chadd
12c5d1f2bf AR9285 (Kite) fixes.
* Correct some of the silicon revision checks to match what
  the Atheros HAL does. (See [1] below.)

* Move the PA cal and init cal method assignment to -after-
  the mac version/revision IDs are stored. The AR9285 init
  cal was never being called.

* Enable ANI.

Note Kite 1.0 and 1.1 were prototypes that shouldn't be seen
in the wild. Linux ath9k simply removed the prototype code from
their codebase. I'm going to leave it in there for now but
make it conditionally compilable in the future.

Obtained from:	Atheros
2011-05-10 04:32:27 +00:00
Bruce M Simpson
459d19e0fa Add VID for Simtec Electronics.
Add PID for Simtec Electronics EntropyKey, a hardware random number generator.
2011-05-10 02:38:44 +00:00
Attilio Rao
a9b091fcb8 MFC 2011-05-09 22:29:54 +00:00
Pyun YongHyeon
4c83f2f32b Recognize BCM5719C PHY.
Submitted by:	Geans Pin at Broadcom
2011-05-09 20:20:43 +00:00
Pyun YongHyeon
5a147ba6c9 Since r117657, bge(4) does not enable buffer manager for BCM5705 or
newer controllers.  However, all data sheet I have access has no
indication that buffer manager should not be touched on these
controllers.  It seems the buffer manager always runs on BCM5705 or
newer controllers. Some controller(e.g. BCM5719) needs other buffer
manager configuration so driver should enable buffer manager for
all controllers.  Both Linux and OpenBSD/NetBSD use the same
approach.
This change polls enable bit of block to know whether specified
block was really stopped as well as enabling buffer manager for all
controllers in driver initialization.

Obtained from:	NetBSD
2011-05-09 20:10:46 +00:00
Attilio Rao
bd55ede060 MFC 2011-05-09 18:53:13 +00:00
David Christensen
876379ca45 - Simplify multicast address programming.
- Fix an incorrect "uint32_t *" cast in bxe_set_rx_mode().

Submitted by:   yongari@
Approved by:    davidch@
MFC after:      Two weeks
2011-05-09 18:46:53 +00:00
Jung-uk Kim
b10c3d1c15 Move VT switching hack for suspend/resume from bus drivers to syscons.c
using event handlers.  A different version was

Submitted by:	Taku YAMAMOTO (taku at tackymt dot homeip dot net)
2011-05-09 18:46:49 +00:00
Adrian Chadd
352dbd822c Disable diversity combining support until I can get a firm answer
from Atheros as to what/when this is supposed to be enabled.

Using the default RX fast diversity settings seems to help quite
a bit.

Whilst I'm here, change the prototype to return HAL_BOOL rather than int.
2011-05-09 17:30:25 +00:00
Adrian Chadd
48d813ef34 Fix a regression I introduced - only swap analog chains if the RX chainmask
is 0x5.
2011-05-09 17:10:48 +00:00
Adrian Chadd
e8def8942a Disable TX STBC - it isn't used for now, but it isn't supported on Kite. 2011-05-09 16:49:40 +00:00
Attilio Rao
50cac02910 MFC 2011-05-09 16:47:13 +00:00
Hans Petter Selasky
f895cc0c50 Workaround for broken no-name USB audio devices sold by dealextreme
called "3D sound" and the alike.

MFC after:	14 days
2011-05-09 15:57:04 +00:00
Adrian Chadd
60abf57fd5 Import some initial Kite fixed diversity code from Atheros.
For now, the diversity settings are controlled by 'txantenna',
-not- rxantenna. This is because the earlier chipsets had
controllable TX diversity; the RX antenna setting twiddles
the default antenna register. I'll try sort that stuff out at
some point.

Call the antenna switch function from the board setup function
so scans, channel changes, mode changes, etc don't set the
diversity back to a default state too far from what's intended.

Things to todo:

* Squirrel away the last antenna diversity/combining parameters
  and restore them during board setup if HAL_ANT_VARIABLE is
  defined. That way scans, etc don't reset the diversity settings.

* Add some more public facing statistics, rather than what's
  simply logged under HAL_DEBUG_DIVERSITY.

For now, the fixed antenna settings behave better than variable
settings for me. I have some further fiddling to do..

Obtained from:	Atheros
2011-05-09 15:19:49 +00:00
Adrian Chadd
b4d225808d Remove an un-needed PA cal call here. 2011-05-09 14:04:49 +00:00
Adrian Chadd
c9cd76313b Fix the 5ghz fast clock logic.
The macro which I incorrectly copied into ah_internal.h assumed
that it'd be called with an AR_SREV_MERLIN_20() check to ensure
it was only enabled for Merlin (AR9280) silicon revision 2.0 or
later.

Trouble is, the 5GHz fast clock EEPROM flag is only valid for
EEPROM revision 16 or greater; it's assumed to be enabled
by default for Merlin rev >= 2.0. This meant it'd be incorrectly
set for AR5416 and AR9160 in 5GHz mode.

This would have affected non-default clock timings such as SIFS,
ACK and slot time. The incorrect slot time was very likely wrong
for 5ghz mode.
2011-05-08 15:55:52 +00:00
Adrian Chadd
aa66982300 * Add AR_SREV_KITE macro for later use
* Modify AR_SREV_MERLIN_20() to match the Atheros/Linux ath9k behaviour -
  its supposed to match Merlin 2.0 and later Merlin chips.
  AR_SREV_MERLIN_20_OR_LATER() matches AR9280 2.0 and later chips
  (AR9285, AR9287, etc.)
2011-05-08 15:25:22 +00:00
Attilio Rao
521bd6b433 MFC 2011-05-08 14:56:02 +00:00
Bernhard Schmidt
7d3ddebe0a Enable 11n (sans HT40) support. 2011-05-08 12:23:01 +00:00
Bernhard Schmidt
b5d2f6bf26 Notify firmware about various HT parameters once associated. 2011-05-08 12:11:20 +00:00
Bernhard Schmidt
97fadf57df Add support for TX packet aggregation. 2011-05-08 12:06:12 +00:00
Bernhard Schmidt
b2ad04c708 Add support for RX packet aggregation. 2011-05-08 11:58:23 +00:00
Bernhard Schmidt
fa818eae51 Add support for transmitting frames at MCS rates. 2011-05-08 11:54:38 +00:00
Bernhard Schmidt
1647639a26 Prepare for transmitting frames at MCS rates:
- instead of calling iwn_plcp_signal() for every frame, map the expected
  value directly within wn->ridx
- concat plcp, rflags and xrflags, there is no clean byte boundary within
  the flags, for example the antenna setting uses bit 6, 7 and 8
- there is still need for a custom rate to plcp mapping, as those expected
  by the hardware are not conform to the std
2011-05-08 11:49:50 +00:00
Bernhard Schmidt
e9823bf8c9 Read chainmask information before announcing it. 2011-05-08 11:05:03 +00:00
Bernhard Schmidt
d86e3b2227 Add HT capabilities to probe requests. 2011-05-08 11:03:16 +00:00
Bernhard Schmidt
c9ce626212 Disable background scan support for 4965 adapters.
On legacy channels every once in a while the firmware throws a SYSASSERT
on line 208. On HT channels though this does always happen and I'm not
aware of any workaround currently.
2011-05-08 11:01:53 +00:00
Bernhard Schmidt
b648a23887 RX aggregation is slightly different then the legacy path, we will only
receive one RX_PHY for each aggregate and not one RX_PHY per frame.
2011-05-08 10:57:44 +00:00
Bernhard Schmidt
45e562203f Allocate all TX rings, those will be use for TX packet aggregation. 2011-05-08 10:54:50 +00:00
Bernhard Schmidt
3c2a1fc39d Use the enhanced TX power information availabe on newer EEPROMs. 2011-05-08 10:35:16 +00:00
Bernhard Schmidt
c07d5014de Hook HT channel setup. 2011-05-08 10:31:22 +00:00
Bernhard Schmidt
688f94830d The 6000 series adapters have a slightly different offset for band 6,
2GHz HT40 channels.
2011-05-08 10:21:42 +00:00
Bernhard Schmidt
3016ab149d Re-add 2 device IDs which got lost.
Pointed out by:	benjsc
2011-05-08 10:19:29 +00:00
Hans Petter Selasky
afa524e6cf Cleanup usb_notify_addq_compat(). It should not
be needed any more.

MFC after:	7 days
2011-05-08 08:22:11 +00:00
Adrian Chadd
f678fb43eb These EEPROM bits actually defined whether HT/20 and HT/40 support
for the given channel is available.

It isn't used yet; ar5416GetWirelessModes() needs to be taught
about this rather than assuming HT20/HT40 is available.
2011-05-08 08:18:30 +00:00
Adrian Chadd
5c892e7497 Fiddle with the PLL initialisation order to match ath9k/Atheros HAL.
This seems to make the AR9160 behave better during heavy scanning,
where before it'd hang and require a hard reset to recover.

Obtained From:	Linux ath9k, Atheros
2011-05-08 07:21:09 +00:00
Adrian Chadd
351384c64f Properly indent the WAR code i pasted in from ath9k a few months
ago.
2011-05-08 05:45:06 +00:00
Adrian Chadd
60d3878423 * Add in a comment about ar5416InitUserSettings() potentially
modifying AR_DIAG_SW.

  There's a hardware workaround which sets disabling some errors
  early at startup and clears said bits before the PCU begins
  receiving - it does this to avoid RX descriptor status errors.

  It's possible these bits aren't being completely properly twiddled
  in all instances; but in particular if the diag_reg HAL variable
  is set it won't be setting these bits correctly. I'll review this
  at some point.

 * Disable multicast search on mac address and key id - the driver
   doesn't use it at the moment and thus adhoc may be broken for
   merlin and later.

* Change this to be for Merlin 1.0 (which from what I understand
  wasn't ever publicly released) to be more correct.
2011-05-08 05:25:42 +00:00
Adrian Chadd
5accb5fd53 Fiddle with the AR5416 1.0 chainmask setup.
Apparently all three RX chains need to be enabled before initial calibration
is done, even if only two are configured.

Reorder the alt chain swap bit to match what the Atheros HAL is doing.

Obtained From:	ath9k, Atheros
2011-05-08 03:24:17 +00:00
Attilio Rao
b9f714be9f MFC 2011-05-07 23:34:14 +00:00
Adrian Chadd
af8223ba6d Fix the IS_5416 checks to actually work correctly.
I've verified that my AR5416 revision 2.2 (minor revision 0x0A) now
matches the correct checks.
2011-05-07 18:42:41 +00:00
Hans Petter Selasky
4ad5f8c23f Add new USB ID.
Submitted by:	Dmitry Luhtionov
MFC after:	7 days
2011-05-07 16:32:59 +00:00
Adrian Chadd
26e8415d1d Do a HAL capabilities sync pass based on the Atheros HAL.
* Shuffle some of the capability numbers around to match the
  Atheros HAL capability IDs, just for consistency.

* Add some new capabilities to FreeBSD from the Atheros
  HAL which will be be shortly used when new chipsets are added
  (HAL SGI-20 support is for Kiwi/AR9287 support); for
  TX aggregation (MBSSID aggregate support, WDS aggregation
  support); CST/GTT support for carrier sense/TX timeout.
2011-05-07 15:30:23 +00:00
Adrian Chadd
b657b11d8d Update the ext channel cycpwr threshold 1 register for the extension
channel when the channel is HT/40.

The new ANI code (primarily for the AR9300/AR9400) in ath9k sets this
register but the ANI code for the previous 11n chips didn't set this.

Unlike ath9k, only set this for HT/40 channels.

Obtained From:	ath9k
2011-05-07 13:08:48 +00:00
Adrian Chadd
f93ef5516b Read in the extended regulatory domain flags so future code can use them.
These describe FCC/Japan channel and DFS behaviour.

The AR9285 and later chips don't set these bits in the eeprom, the correct
behaviour is to just assume all five bits are enabled.
2011-05-07 11:05:16 +00:00
Adrian Chadd
001ac28926 Instead of returning an unknown mac/bb signature, just return 0. 2011-05-07 06:52:04 +00:00
Adrian Chadd
b810285f24 Add some comments about which HAL capabilities are currently FreeBSD
specific.

The Atheros HAL and FreeBSD HAL share the same capabilities up
until HAL_CAP_11D, where things begin to diverge.

I'll look at tidying these up soon.

Obtained from:	Atheros
2011-05-07 06:47:09 +00:00
Adrian Chadd
de1334e8d7 Some BB hang changes:
* Add Howl (ar9130) to the list of chips that have DFS/BB/MAC hangs
* Don't treat unknown BB hangs as fatal; ath9k/Atheros HAL don't
  treat it as such.
* Add HAL_DEBUG_DFS to the debug fields in ath_hal/ah_debug.h

The BB hang check simply loops over an observation register checking
for a stuck state engine, but it can happen under high traffic
conditions. Ath9k and the Atheros HAL simply log a debug message and
continue.

Private to FreeBSD:

* Add HAL_DEBUG_HANG to the debug fields
* Change the hang debugging to HAL_DEBUG_HANG rather than HAL_DEBUG_DFS
  like in the Atheros HAL.

Obtained from:	Atheros
2011-05-07 06:45:35 +00:00
Pyun YongHyeon
de53eba037 Fix build. 2011-05-07 04:40:44 +00:00
Adrian Chadd
ef1901a3c9 Change AR_SREV_OWL_{X}_OR_LATER to AR_SREV_5416_{X}_OR_LATER.
For now, these are equivalent macros. AR_SREV_OWL{X}_OR_LATER
will later change to exclude Howl (AR9130) in line with what
the Atheros HAL does.

This should not functionally change anything.

Obtained from:	Atheros
2011-05-07 02:59:24 +00:00
Adrian Chadd
d1915e7308 Fix the OWL revision checks.
A quick story, which is partially documented in the commit.

The silicon revision in Linux ath9k and the Atheros HAL use an
AR_SREV_REVISION mask of 0x07.

FreeBSD's HAL uses the AR5212 AR_SREV_REVISION mask of 0x0F.

Thus the OWL silicon revisions were coming through as 0xA, 0xB,
0xC, rather than 0x0, 0x1 and 0x2.

My ath9k-sourced AR_SREV_OWL_<X> macros were thus using the wrong
silicon revision values and wouldn't correctly match.

This commit does a few things:

* Change the AR_SREV_OWL_<x> macros to use the AR_SREV_REVISION_OWL_*
  values, not AR_XSREV_REVISION_OWL macros;
* Disable AR_XSREV_REVISION_OWL_* values;
* Modify the IS_5416 to properly check the MAC is OWL, rather than
  potentially matching on non-OWL revisions (which shouldn't happen
  unless there's a silicon revision of higher than 0x9 in a later
  chip..)
* Add a couple more macros from the Atheros HAL for compatibility.

The main difference now is that the Atheros HAL defines
AR_SREV_OWL_{20,22}_OR_LATER subtly differently - it fails on all HOWL
silicon. The AR_SREV_5416_*_OR_LATER macros match on the relevant OWL
version -and- all HOWL versions, along with subsequent versions.

A subsequent commit is going to migrate the uses of AR_SREV_OWL_X_OR_LATER
to AR_SREV_5416_X_OR_LATER to match what's going on in the Atheros HAL.

There's only two uses of AR_SREV_OWL_X_OR_LATER which currently don't
apply to FreeBSD but it may do in the future.

Yes, it's all confusing!
2011-05-07 02:54:52 +00:00
Pyun YongHyeon
3ea23f341b Remove unneeded use of variable status. This should have been done
in r221557.
2011-05-07 02:19:46 +00:00
Pyun YongHyeon
0b96ba12be XL_DMACTL is 32bit register, use 32bit write macro.
While I'm here add more bits for the register.
2011-05-07 00:25:12 +00:00
Pyun YongHyeon
7498e81a2d Rearm watchdog timer if driver kick controller to recover from TX
underrun error.
While here, prepend 0x to status code to show TX status is hex
number.
2011-05-07 00:18:58 +00:00
Pyun YongHyeon
48dcbc3370 Rename xl_stats_update() callout handler to xl_tick() and move MII
tick driving logic to xl_tick(). Now xl_tick() handles MII tick as
well as periodic updating of statistics.
This change removes a hack used in interrupt handler where it
wanted to update statistics without driving MII tick.
2011-05-07 00:06:02 +00:00
Pyun YongHyeon
4a5c788456 Reuse the TX descriptor(DPD) if xl_encap() failed instead of just
picking the next available one. This may explain why xl(4) sees TX
underrun error with no queued frame. I hope this addresses a long
standing xl(4) watchdog timeout issue as well.

Obtained from:	OpenBSD
2011-05-06 23:49:10 +00:00
Pyun YongHyeon
5a13764b11 Change xl_rxeof() a bit to return the number of processed frames in
RX descriptor ring. Previously it returned the number of frames
that were successfully passed to upper stack which in turn means it
ignored frames that were discarded due to errors. The number of
processed frames in RX descriptor ring is used to detect whether
driver is out of sync with controller's current descriptor pointer.
Returning number of processed frames reduces unnecessary (probably
wrong) re-synchronization.

While here, remove unnecessary local variable initialization.
2011-05-06 23:01:29 +00:00
Pyun YongHyeon
74517b0724 Terminate interrupt handler if driver detect it's not running.
Also add check for driver running state before trying to send
frames. While I'm here, use for loop.
2011-05-06 22:55:53 +00:00
Attilio Rao
aa8b9e0706 MFC 2011-05-06 22:45:33 +00:00
Pyun YongHyeon
f321edf95a Updating status word should be the last operation of UPD structure
renewal.  Disable instruction reordering by adding volatile to
xl_list_onefrag structure.
2011-05-06 22:45:13 +00:00
Pyun YongHyeon
0ecf6b16c8 Call bus_dmamap_sync() only after TX DPD update. 2011-05-06 22:36:43 +00:00
Pyun YongHyeon
4f58a95ce1 Set status word once instead of twice. For 3C90xB/3C90xC, frame
length of status word is ignored. While here move bus_dmamap_sync()
up where DMA map is loaded.
2011-05-06 22:26:57 +00:00
Pyun YongHyeon
78564eda2d Remove unnecessary htole32/le32toh dance. 2011-05-06 22:16:43 +00:00
Pyun YongHyeon
dd0a76883f Rewrite RX filter logic and provide controller specific filter
handler for 3C90x and 3C90xB/C respectively.  This simplifies ioctl
handler as well as enhancing readability.
While I'm here don't reprogram multicast filter when driver is not
running.
2011-05-06 22:01:46 +00:00
Adrian Chadd
e7cb5d548d Add a function which enables or disables RX RIFS searching, and migrate
the code which does this into it.
2011-05-06 15:33:56 +00:00
Nathan Whitehorn
cc734417b3 Do not use Open Firmware to open the device and instead program its start
on our own. This prevents hangs at boot when using a bm(4) NIC where the
cable is not plugged in at boot time.

Obtained from:	NetBSD
MFC after:	1 week
2011-05-06 03:26:24 +00:00
Navdeep Parhar
3792a4d286 Bump up the number of egress queues that the driver is allowed to use.
MFC after:	3 days
2011-05-05 23:09:17 +00:00
Xin LI
8901793222 Detect and set Atom's Tj(max) to 90 if it's not the 45nm D400/D500/N400
series.

MFC after:	2 weeks
2011-05-05 19:15:15 +00:00
Jack F Vogel
3cec53b8a7 Add an initialization to the error variable, without
this there is a rare return path that bogusly appears
to fail when it should not.  Also white space correction.

Thanks to Arnaud Lacombe for noticing the problem.
2011-05-05 17:28:45 +00:00
Alexander Motin
e2d6ccef4b Add PCI ID for Marvell 88SE9182 -- PCIe 2.x x2 relative of the 88SE912x.
Submitted by:	dchagin
MFC after:	1 week
2011-05-05 17:11:26 +00:00
Attilio Rao
71a19bdc64 Commit the support for removing cpumask_t and replacing it directly with
cpuset_t objects.
That is going to offer the underlying support for a simple bump of
MAXCPU and then support for number of cpus > 32 (as it is today).

Right now, cpumask_t is an int, 32 bits on all our supported architecture.
cpumask_t on the other side is implemented as an array of longs, and
easilly extendible by definition.

The architectures touched by this commit are the following:
- amd64
- i386
- pc98
- arm
- ia64
- XEN

while the others are still missing.
Userland is believed to be fully converted with the changes contained
here.

Some technical notes:
- This commit may be considered an ABI nop for all the architectures
  different from amd64 and ia64 (and sparc64 in the future)
- per-cpu members, which are now converted to cpuset_t, needs to be
  accessed avoiding migration, because the size of cpuset_t should be
  considered unknown
- size of cpuset_t objects is different from kernel and userland (this is
  primirally done in order to leave some more space in userland to cope
  with KBI extensions). If you need to access kernel cpuset_t from the
  userland please refer to example in this patch on how to do that
  correctly (kgdb may be a good source, for example).
- Support for other architectures is going to be added soon
- Only MAXCPU for amd64 is bumped now

The patch has been tested by sbruno and Nicholas Esborn on opteron
4 x 12 pack CPUs. More testing on big SMP is expected to came soon.
pluknet tested the patch with his 8-ways on both amd64 and i386.

Tested by:	pluknet, sbruno, gianni, Nicholas Esborn
Reviewed by:	jeff, jhb, sbruno
2011-05-05 14:39:14 +00:00
Attilio Rao
a7a347967f MFC 2011-05-05 14:05:29 +00:00
Adrian Chadd
47ff47a858 Don't perform NF calibration for radio chains which aren't in use:
Quoting the ath9k commit message:

At present the noise floor calibration is processed in supported
control and extension chains rather than required chains.
Unnccesarily doing nfcal in all supported chains leads to
invalid nf readings on extn chains and these invalid values
got updated into history buffer. While loading those values
from history buffer is moving the chip to deaf state.

This issue was observed in AR9002/AR9003 chips while doing
associate/dissociate in HT40 mode and interface up/down
in iterative manner. After some iterations, the chip was moved
to deaf state. Somehow the pci devices are recovered by poll work
after chip reset. Raading the nf values in all supported extension chains
when the hw is not yet configured in HT40 mode results invalid values.

Reference:	https://patchwork.kernel.org/patch/753862/

Obtained from:	Linux ath9k
2011-05-05 08:11:22 +00:00
Adrian Chadd
ed8659ed69 Another Howl (AR9130) fix.
I haven't seen a 5ghz AR9130 based board yet though!

Obtained from:	Atheros
2011-05-05 04:43:05 +00:00
Adrian Chadd
d2615832bf Fix up the chipset checks for the AR5416 and later silicon.
The checks should function as follows:

* AR_SREV_<silicon> : check macVersion matches that version id
* AR_SREV_<silicon>_<revision> : check macVersion and macRevision match
    the version / revision respectively

* AR_SREV_<silicon>_<revision>_OR_LATER: check that
  + if the chip silicon version == macVersion, enforce revision >= macRevision
  + if the chip silicon version > macVersion, allow it.

For example, AR_SREV_MERLIN() only matches AR9280 (any revision),
AR_SREV_MERLIN_10() would only match AR9280 version 1.0, but
AR_SREV_MERLIN_20_OR_LATER() matches AR9280 version >= 2.0 _AND_
any subsequent MAC (So AR9285, AR9287, etc.)

The specific fixes which may impact users:

* if there is Merlin hardware > revision 2.0, it'll now be correctly
  matched by AR_SREV_MERLIN_20_OR_LATER() - the older code simply
  would match on either Merlin 2.0 or a subsequent MAC (AR9285, AR9287, etc.)

* Kite version 1.1/1.2 should now correctly match. As these macros
  are used in the AR9285 reset/attach path, and it's assumed that the
  hardware is kite anyway, the behaviour shouldn't change. It'll only
  change if these macros are used in other codepaths shared with
  older silicon.

Obtained from:	Linux ath9k, Atheros
2011-05-05 03:42:04 +00:00
Adrian Chadd
59298273a9 Import some HOWL (AR9130) related fixes from Atheros.
Obtained from:	Atheros
2011-05-05 02:59:31 +00:00
Navdeep Parhar
489eeba940 T4 packet timestamps.
Reference code that shows how to get a packet's timestamp out of
cxgbe(4).  Disabled by default because we don't have a standard way
today to pass this information up the stack.

The timestamp is 60 bits wide and each increment represents 1 tick of
the T4's core clock.  As an example, the timestamp granularity is ~4.4ns
for this card:

# sysctl dev.t4nex.0.core_clock
dev.t4nex.0.core_clock: 228125

MFC after:	1 week
2011-05-05 02:38:08 +00:00
Navdeep Parhar
8820ce5fe7 T4 packet filtering/steering.
- Enable 5-tuple and every-packet lookup.

- Setup the default filter mode to allow filtering/steering based on IP
  protocol, ingress port, inner VLAN ID, IP frag, FCoE, and MPS match
  type; all combined together.  You can also filter based on MAC index,
  Ethernet type, IP TOS/IPv6 Traffic Class, and outer VLAN ID but you'll
  have to modify the default filter mode and exclude some of the
  match-fields in it.

  IPv4 and IPv6 SIP/DIP/SPORT/DPORT are always available in all filter
  rules.

- Add driver ioctls to get/set the global filter mode.

- Add driver ioctls to program and delete hardware filters.  A couple of
  the "switch" actions that rewrite Ethernet and VLAN information and
  switch the packet out of another port may not work as the L2 code is not
  yet in place.  Everything else, including all "drop" and "pass" rules
  with RSS or absolute qid, should work.

Obtained from:	 Chelsio Communications
2011-05-05 02:04:56 +00:00
Pyun YongHyeon
cb777a0752 Enable Ethernet@WireSpeed for BCM5718/BCM57765 family. While I'm
here inverse meaning of PHY flag as Ethernet@WireSpeed is enabled
for most PHYs.
2011-05-05 00:43:40 +00:00
Navdeep Parhar
b815af1b74 Always re-arm an iq's interrupt before leaving the handler.
MFC after:	1 week
2011-05-04 23:07:30 +00:00
Pyun YongHyeon
b4a256ac67 Add initial BCM57765 family support. The BCM57765 family seems to
have similar hardware features of BCM5718 family except the number
of receive return ring is 4. The BCM57765 family is known to
support IEEE 802.3az EEE(Energy Efficient Ethernet) but this change
does not include EEE support code. I hope EEE is implemented in
near future.
This change will support BCM57761, BCM57765, BCM57781, BCM57785,
BCM57791 and BCM57795. All hardware offloading features are
supported and suspend/resume also should work.
Many thanks to Broadcom for continuing support of FreeBSD.

Tested by:	Paul Thornton (prt <> prt dot org)
HW donated by:	Broadcom
2011-05-04 17:04:31 +00:00
Attilio Rao
7505ef3a41 MFC 2011-05-04 15:45:23 +00:00
Adrian Chadd
5a04ce2fdf Remove this useless bit of code for Kite. The RIFS register value is overriden
by the initvals, so disabling RIFS before calling writeIni() effectively does
nothing.
2011-05-04 09:26:33 +00:00
Marius Strobl
3fcb7a5365 - Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP
(reporting IFM_LOOP based on BMCR_LOOP is left in place though as
  it might provide useful for debugging). For most mii(4) drivers it
  was unclear whether the PHYs driven by them actually support
  loopback or not. Moreover, typically loopback mode also needs to
  be activated on the MAC, which none of the Ethernet drivers using
  mii(4) implements. Given that loopback media has no real use (and
  obviously hardly had a chance to actually work) besides for driver
  development (which just loopback mode should be sufficient for
  though, i.e one doesn't necessary need support for loopback media)
  support for it is just dropped as both NetBSD and OpenBSD already
  did quite some time ago.
- Let mii_phy_add_media() also announce the support of IFM_NONE.
- Restructure the PHY entry points to use a structure of entry points
  instead of discrete function pointers, and extend this to include
  a "reset" entry point. Make sure any PHY-specific reset routine is
  always used, and provide one for lxtphy(4) which disables MII
  interrupts (as is done for a few other PHYs we have drivers for).
  This includes changing NIC drivers which previously just called the
  generic mii_phy_reset() to now actually call the PHY-specific reset
  routine, which might be crucial in some cases. While at it, the
  redundant checks in these NIC drivers for mii->mii_instance not being
  zero before calling the reset routines were removed because as soon
  as one PHY driver attaches mii->mii_instance is incremented and we
  hardly can end up in their media change callbacks etc if no PHY driver
  has attached as mii_attach() would have failed in that case and not
  attach a miibus(4) instance.
  Consequently, NIC drivers now no longer should call mii_phy_reset()
  directly, so it was removed from EXPORT_SYMS.
- Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe().
  The purpose of that function is to perform the common steps to attach
  a PHY driver instance and to hook it up to the miibus(4) instance and to
  optionally also handle the probing, addition and initialization of the
  supported media. So all a PHY driver without any special requirements
  has to do in its bus attach method is to call mii_phy_dev_attach()
  along with PHY-specific MIIF_* flags, a pointer to its PHY functions
  and the add_media set to one. All PHY drivers were updated to take
  advantage of mii_phy_dev_attach() as appropriate. Along with these
  changes the capability mask was added to the mii_softc structure so
  PHY drivers taking advantage of mii_phy_dev_attach() but still
  handling media on their own do not need to fiddle with the MII attach
  arguments anyway.
- Keep track of the PHY offset in the mii_softc structure. This is done
  for compatibility with NetBSD/OpenBSD.
- Keep track of the PHY's OUI, model and revision in the mii_softc
  structure. Several PHY drivers require this information also after
  attaching and previously had to wrap their own softc around mii_softc.
  NetBSD/OpenBSD also keep track of the model and revision on their
  mii_softc structure. All PHY drivers were updated to take advantage
  as appropriate.
- Convert the mebers of the MII data structure to unsigned where
  appropriate. This is partly inspired by NetBSD/OpenBSD.
- According to IEEE 802.3-2002 the bits actually have to be reversed
  when mapping an OUI to the MII ID registers. All PHY drivers and
  miidevs where changed as necessary. Actually this now again allows to
  largely share miidevs with NetBSD, which fixed this problem already
  9 years ago. Consequently miidevs was synced as far as possible.
- Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that
  weren't explicitly converted to support flow control before. It's
  unclear whether flow control actually works with these but typically
  it should and their net behavior should be more correct with these
  changes in place than without if the MAC driver sets MIIF_DOPAUSE.

Obtained from:	NetBSD (partially)
Reviewed by:	yongari (earlier version), silence on arch@ and net@
2011-05-03 19:51:29 +00:00
Attilio Rao
94ebcddde3 MFC 2011-05-03 18:57:46 +00:00
John Baldwin
83c41143ca Reimplement how PCI-PCI bridges manage their I/O windows. Previously the
driver would verify that requests for child devices were confined to any
existing I/O windows, but the driver relied on the firmware to initialize
the windows and would never grow the windows for new requests.  Now the
driver actively manages the I/O windows.

This is implemented by allocating a bus resource for each I/O window from
the parent PCI bus and suballocating that resource to child devices.  The
suballocations are managed by creating an rman for each I/O window.  The
suballocated resources are mapped by passing the bus_activate_resource()
call up to the parent PCI bus.  Windows are grown when needed by using
bus_adjust_resource() to adjust the resource allocated from the parent PCI
bus.  If the adjust request succeeds, the window is adjusted and the
suballocation request for the child device is retried.

When growing a window, the rman_first_free_region() and
rman_last_free_region() routines are used to determine if the front or
end of the existing I/O window is free.  From using that, the smallest
ranges that need to be added to either the front or back of the window
are computed.  The driver will first try to grow the window in whichever
direction requires the smallest growth first followed by the other
direction if that fails.

Subtractive bridges will first attempt to satisfy requests for child
resources from I/O windows (including attempts to grow the windows).  If
that fails, the request is passed up to the parent PCI bus directly
however.

The PCI-PCI bridge driver will try to use firmware-assigned ranges for
child BARs first and only allocate a "fresh" range if that specific range
cannot be accommodated in the I/O window.  This allows systems where the
firmware assigns resources during boot but later wipes the I/O windows
(some ACPI BIOSen are known to do this) to "rediscover" the original I/O
window ranges.

The ACPI Host-PCI bridge driver has been adjusted to correctly honor
hw.acpi.host_mem_start and the I/O port equivalent when a PCI-PCI bridge
makes a wildcard request for an I/O window range.

The new PCI-PCI bridge driver is only enabled if the NEW_PCIB kernel option
is enabled.  This is a transition aide to allow platforms that do not
yet support bus_activate_resource() and bus_adjust_resource() in their
Host-PCI bridge drivers (and possibly other drivers as needed) to use the
old driver for now.  Once all platforms support the new driver, the
kernel option and old driver will be removed.

PR:		kern/143874 kern/149306
Tested by:	mav
2011-05-03 17:37:24 +00:00
George V. Neville-Neil
040b46f5ba Add in support for multicast.
Submitted by:	Sriram Rapuru at @ Wipro for Exar Inc.
MFC after:	2 weeks
2011-05-03 15:58:24 +00:00
Andriy Gapon
e3888a9820 SNDCTL_DSP_GETIPTR: set pointer to sndbuf_getfreeptr()
Rationale:
- unlike current behavior this seems to be compliant with OSS
  specification:
  http://manuals.opensound.com/developer/SNDCTL_DSP_GETIPTR.html
- this seems to meet expectations of some OSS programs compiled for or
  ported from Linux, e.g. ALSA OSS plugin
- this doesn't seem to break any programs as far as current testing
  shows

Tested by:	nox, hselasky
MFC after:	4 days
2011-05-03 15:50:22 +00:00
David Christensen
f83b279588 - Fixed a typo in an if() statement when setting flow control for MTU
greater than 5000 bytes.

Submitted by:	yongari
2011-05-02 23:34:33 +00:00
Attilio Rao
171c7d9bf6 MFC 2011-05-02 22:03:30 +00:00
Marius Strobl
22a4eced36 Correct spelling in comments.
Submitted by:	brucec
2011-05-02 21:04:23 +00:00
Marius Strobl
aa8cbdbf67 Fix an logic bug which caused jumbo buffers to not be synced.
Reported and tested by: Michael Moll

MFC after:	3 days
2011-05-02 20:45:19 +00:00
David Christensen
e93ad740a0 - Re-committed r220603 which was accidentally backed out by an earlier
commit.
- Fixed a bug in an unused debug macro.

MFC after:	One week.
2011-05-02 20:43:24 +00:00
Marius Strobl
2524d0a675 Probe the PHY accompanying BCM57765.
Tested by: Paul Thornton

MFC after:	1 week
2011-05-02 20:37:30 +00:00
John Baldwin
24c93a6fc4 The ACPI Host-PCI bridge driver actually supports multiple domains via
the optional _SEG function.  Return that value (ap->segment) rather than
0 for the pcib domain ivar.
2011-05-02 19:02:30 +00:00
Xin LI
ba95b1e10e Correct a typo. According to Intel document 318914, the Tj(max) for Core 2
Duo Mobile CPUs should be 105.

Noticed by:	Mark Johnston <markjdb gmail.com>
MFC after:	3 days
2011-05-02 18:41:54 +00:00
John Baldwin
8d43fea45f Don't explicitly list pci_write_ivar() for bus_write_ivar, the method is
already inherited from the PCI bus driver.
2011-05-02 15:01:28 +00:00
John Baldwin
282211ea8b Add an entry for the Kuroutoshikou SERIAL4P-LPPCI2 which uses an Oxford
4 port chip but with a nonstandard clock.

PR:		kern/104212
Submitted by:	Shuichi KITAGUCHI  kit of ysnb net
MFC after:	1 week
2011-05-02 14:34:03 +00:00
Attilio Rao
7be8a2de4f MFC @ r221324 2011-05-02 14:23:36 +00:00
John Baldwin
d2c9344ff9 Add implementations of BUS_ADJUST_RESOURCE() to the PCI bus driver,
generic PCI-PCI bridge driver, x86 nexus driver, and x86 Host to PCI bridge
drivers.
2011-05-02 14:13:12 +00:00
Bernhard Schmidt
797b914622 No need for htole32(), which is an uint8_t. 2011-05-01 18:41:57 +00:00
Attilio Rao
5d991209fd Fix a typo/error. 2011-04-30 22:34:44 +00:00
Attilio Rao
5c5b0e93fa Remove unnecessary usage of memory barriers when dealing with
pmc_cpumask.

Discussed with:	fabient
2011-04-30 22:33:11 +00:00
Dag-Erling Smørgrav
0abd21bdb8 Implement BIO_DELETE for vnode devices by simply overwriting the deleted
sectors with all-zeroes.

The zeroes come from a static buffer; null(4) uses a dynamic buffer for
the same purpose (for /dev/zero).  It might be a good idea to have a
static, shared, read-only all-zeroes page somewhere in the kernel that
md(4), null(4) and any other code that needs zeroes could use.

Reviewed by:	kib
MFC after:	3 weeks
2011-04-29 21:18:41 +00:00
John Baldwin
b67d11bbcc Change rman_manage_region() to actually honor the rm_start and rm_end
constraints on the rman and reject attempts to manage a region that is out
of range.
- Fix various places that set rm_end incorrectly (to ~0 or ~0u instead of
  ~0ul).
- To preserve existing behavior, change rman_init() to set rm_start and
  rm_end to allow managing the full range (0 to ~0ul) if they are not set by
  the caller when rman_init() is called.
2011-04-29 18:41:21 +00:00
Adrian Chadd
e57539af23 Cosmetic changes to fit 80 character screen width. 2011-04-29 16:43:30 +00:00
Adrian Chadd
1422779793 Remove some holdovers from the AR5212 origin of this code.
These aren't relevant here.
2011-04-29 12:52:18 +00:00
Kevin Lo
f620e64d23 Guard against default ni_chan
PR: kern/144642
Submitted by: Arthur Hartwig <a_hartwig at fastmaildot fm>
2011-04-29 06:28:29 +00:00
Jack F Vogel
0e6fa41ff1 Add a #define for driver portability to older OS 2011-04-28 23:21:40 +00:00
Jack F Vogel
efa439f740 Small change to make backporting to stable/7,
thanks to Arnaud Lacombe for suggesting it.
2011-04-28 22:21:53 +00:00
John Baldwin
6e9f075a26 Add support for Oxford PCI Express Expresso family devices.
For these devices, the number of supported ports is read from a register
in BAR 0.

PR:		kern/134878
Submitted by:	David Wood  david of wood2 org uk
MFC after:	1 week
2011-04-28 19:19:25 +00:00
John Baldwin
41b1c25960 Trim some additional unnecessary <linker_set.h> includes.
MFC after:	1 week
2011-04-28 17:59:33 +00:00
George V. Neville-Neil
548d35fd69 Exar driver for X3100 10GbE Server/Storage adapters
Features: Jumbo frames (up to 9600), LRO (Large Receive Offload),
          TSO (TCP segmentation offload), RTH (Receive Traffic Hash).

Submitted by: Sriram Rapuru at Exar
MFC after:	2 weeks
2011-04-28 14:33:15 +00:00
Adrian Chadd
9f25ad52ce Introduce AR9130 (HOWL) WMAC support to the FreeBSD HAL.
The AR9130 is an AR9160/AR5416 family WMAC which is glued directly
to the AR913x SoC peripheral bus (APB) rather than via a PCI/PCIe
bridge.

The specifics:

* A new build option is required to use the AR9130 - AH_SUPPORT_AR9130.
  This is needed due to the different location the RTC registers live
  with this chip; hopefully this will be undone in the future.
  This does currently mean that enabling this option will break non-AR9130
  builds, so don't enable it unless you're specifically building an image
  for the AR913x SoC.

* Add the new probe, attach, EEPROM and PLL methods specific to Howl.

* Add a work-around to ah_eeprom_v14.c which disables some of the checks
  for endian-ness and magic in the EEPROM image if an eepromdata block
  is provided. This'll be fixed at a later stage by porting the ath9k
  probe code and making sure it doesn't break in other setups (which
  my previous attempt at this did.)

* Sprinkle Howl modifications throughput the interrupt path - it doesn't
  implement the SYNC interrupt registers, so ignore those.

* Sprinkle Howl chip powerup/down throughout the reset path; the RTC methods
  were

* Sprinkle some other Howl workarounds in the reset path.

* Hard-code an alternative setup for the AR_CFG register for Howl, that
  sets up things suitable for Big-Endian MIPS (which is the only platform
  this chip is glued to.)

This has been tested on the AR913x based TP-Link WR-1043nd mode, in
legacy, HT/20 and HT/40 modes.

Caveats:

* 2ghz has only been tested. I've not seen any 5ghz radios glued to this
  chipset so I can't test it.

* AR5416_INTERRUPT_MITIGATION is not supported on the AR9130. At least,
  it isn't implemented in ath9k. Please don't enable this.

* This hasn't been tested in MBSS mode or in RX/TX block-aggregation mode.
2011-04-28 12:47:40 +00:00
John Baldwin
8adcbaed13 Only align MSI message groups based on the number of messages being
allocated, not the maximum number of messages the device supports.  The
spec only requires the former, and I believe I implemented the latter due
to misunderstanding an e-mail.  In particular, this fixes an issue where
having several devices that all support 16 messages can run out of
IDT vectors on x86 even though the driver only uses a single message.

Submitted by:	Bret Ketchum  bcketchum of gmail
MFC after:	1 week
2011-04-27 20:08:44 +00:00
Bjoern A. Zeeb
a0ae8f04e8 Make various (pseudo) interfaces compile without INET in the kernel
adding appropriate #ifdefs.  For module builds the framework needs
adjustments for at least carp.

Reviewed by:	gnn
Sponsored by:	The FreeBSD Foundation
Sponsored by:	iXsystems
MFC after:	4 days
2011-04-27 19:30:44 +00:00
Attilio Rao
7126ba42f6 - Add the possibility to reuse the already last used timeout when patting
the watchdog, via the watchdog(9) interface.
  For that, the WD_LASTVAL bitwise operation is used. It is mutually
  exclusive with any explicit timout passing to the watchdogs.
  The last timeout can be returned via the wdog_kern_last_timeout()
  KPI.
- Add the possibility to pat the watchdogs installed via the watchdog(9)
  interface from the kernel.
  In order to do that the new KPI wdog_kern_pat() is offered and it does
  accept normalized nanoseconds or WD_LASTVAL.
- Avoid to pass WD_ACTIVE down in the watchdog handlers. All the control
  bit processing should over to the upper layer functions and not passed
  down to the handlers at all.

These changes are intended to be used in order to fix up the watchdog
tripping in situation when the userland is busted, but protection is still
wanted (examples: shutdown syncing / disk dumping).

Sponsored by:	Sandvine Incorporated
Reviewed by:	emaste, des, cognet
MFC after:	2 weeks
2011-04-27 16:43:03 +00:00
Hans Petter Selasky
4309793b64 The maximum NCM frame size must be so that it
will generate a short terminated USB transfer if
the maximum NCM frame size is greater than what
the driver can handle.

Reported by:	Matthias Benesch
MFC after:	7 days
Approved by:	thompsa (mentor)
2011-04-26 19:40:37 +00:00
Hans Petter Selasky
ea719ede02 Fix for missing EHCI datatoggle change case.
Reported by:	Mike Tancsa
MFC after:	3 days
Approved by:	thompsa (mentor)
2011-04-26 18:50:35 +00:00
Jack F Vogel
e2314c6ccb - Add the RX refresh changes from igb to ixgbe
- Also a couple minor tweaks to the TX code from the same source.
- Add the INET ioctl code which has been missing from this driver,
  and which caused IP aliases to reset the interface.
- Last, some minor logic changes that just reflect upcoming
  hardware support, but have no other functional effect now.

MFC after a week
2011-04-25 23:34:21 +00:00
Adrian Chadd
041df70857 Wrap the MIMO stuff in #ifdef AH_SUPPORT_AR5416, as the channel
state doesn't have MIMO stuff in it by default.
2011-04-25 15:51:49 +00:00
Attilio Rao
f451d23cfc Add missing bit in r221015.
Sponsored by:	Sandvine Incorporated
Reviewed by:	des
MFC after:	1 week
X-MFC:		r221015
2011-04-25 14:12:58 +00:00
Attilio Rao
bb83df766c Don't assume that SMI are enabled when attaching ichwd and then do
correct unwind based on former state.

Sponsored by:	Sandvine Incorporated
Reviewed by:	des
MFC after:	1 week
2011-04-25 14:10:33 +00:00
Dag-Erling Smørgrav
bffd599bc9 Whitespace nit 2011-04-25 09:18:05 +00:00
Gleb Smirnoff
4c5a247b54 When msk_detach() is called from msk_attach(), ifp may be
yet not initialized.
2011-04-25 04:55:50 +00:00
Adrian Chadd
c2442d279a Break out the PLL setup into an overridable method.
The only method right now is ar5416InitPLL() which handles multiple
chipsets; this can now be overridden by newer chipset HAL code.
2011-04-24 15:53:57 +00:00
Adrian Chadd
98ebd982c3 Use the refactored ar5416WriteTxPowerRateRegisters() call in the ar9285 code. 2011-04-24 15:48:07 +00:00
Adrian Chadd
b998ae6409 Eliminate code duplication between AR5416/AR9160/AR9280 and AR9285.
Writing the TX power registers is the same between all of these chips
and later NICs (AR9287, AR9271 USB, etc.) so this will reduce code
duplication when those NICs are added to the HAL.
2011-04-24 14:50:29 +00:00
Konstantin Belousov
9af3638096 Fix display of the drm sysctls.
Sponsored by:	The FreeBSD Foundation
MFC after:	3 days
2011-04-23 23:11:44 +00:00
Adrian Chadd
6f5fe81e02 Fix a corner-case of interrupt handling which resulted in potentially
spurious (and fatal) interrupt errors.

One user reported seeing this:

Apr 22 18:04:24 ceres kernel: ar5416GetPendingInterrupts: fatal error,
  ISR_RAC 0x0 SYNC_CAUSE 0x2000

SYNC_CAUSE of 0x2000 is AR_INTR_SYNC_LOCAL_TIMEOUT which is a bus timeout;
this shouldn't cause HAL_INT_FATAL to be set.

After checking out ath9k, ath9k_ar9002_hw_get_isr() clears (*masked)
before continuing, regardless of whether any bits in the ISR registers
are set. So if AR_INTR_SYNC_CAUSE is set to something that isn't
treated as fatal, and AR_ISR isn't read or is read and is 0, then
(*masked) wouldn't be cleared. Thus any of the existing bits set
that were passed in would be preserved in the output.

The caller in if_ath - ath_intr() - wasn't setting the masked value
to 0 before calling ath_hal_getisr(), so anything that was present
in that uninitialised variable would be preserved in the case above
of AR_ISR=0, AR_INTR_SYNC_CAUSE != 0; and if the HAL_INT_FATAL bit
was set, a fatal condition would be interpreted and the chip was
reset.

This patch does the following:

* ath_intr() - set masked to 0 before calling ath_hal_getisr();
* ar5416GetPendingInterrupts() - clear (*masked) before processing
  continues; so if the interrupt source is AR_INTR_SYNC_CAUSE
  and it isn't fatal, the hardware isn't reset via returning
  HAL_INT_FATAL.

This doesn't fix any underlying errors which trigger
AR_INTR_SYNC_LOCAL_TIMEOUT - which is a bus timeout of some
sort - so that likely should be further investigated.
2011-04-23 06:37:09 +00:00
Adrian Chadd
0d07bcba27 Fix the merlin LNA configuration code - these are bit flags, not raw values to be
written into the registers.
2011-04-22 17:57:13 +00:00
Marius Strobl
08b822fcbb Correct spelling in comments.
Submitted by:	brucec
2011-04-22 13:56:21 +00:00
Marius Strobl
867b94791c More spelling fixes.
Submitted by:	N.J. Mann
2011-04-22 12:46:39 +00:00
Adrian Chadd
635636ea69 The second regdomain word is a set of bitflags describing
regulatory domain behaviour. Document what the v14 EEPROM
flags are.
2011-04-22 10:59:20 +00:00
Adrian Chadd
0d2dd30cbd Bring over a pdadc calibration fix from ath9k - unused power detector
gain values should be 58, not the previous values.

Obtained From:	linux ath9k
2011-04-22 10:57:46 +00:00
Marius Strobl
5ab13afc94 Correct spelling.
Submitted by:	brucec
2011-04-22 09:59:16 +00:00
Marius Strobl
7b2f8db838 - Correct spelling. [1]
- Remove variables which are unused besides initialization. [2]

Submitted by:	brucec [1], Christoph Mallon [2]
2011-04-22 09:52:28 +00:00
Marius Strobl
a34f047788 Correct spelling in a comment.
Submitted by:	brucec
2011-04-22 09:44:01 +00:00
Marius Strobl
af5ac863ea Correct spelling in comments.
Submitted by:	brucec
2011-04-22 09:41:51 +00:00
Marius Strobl
19db2a7ba0 Correct spelling in comments.
Submitted by:	brucec
2011-04-22 09:39:05 +00:00
Marius Strobl
6882cb0c9f Correct spelling in comments.
Submitted by:	brucec
2011-04-22 09:22:27 +00:00
Adrian Chadd
88e428c6bc Revert r220907 and r220915.
Changing the size of struct ieee80211_mimo_info changes
the STA info data, breaking ifconfig in general.
2011-04-22 00:44:27 +00:00
David Christensen
a7a0fa5f58 - Centralize driver tunables initialization/validation.
- Centralize PCI resource allocation/release.
- Enable flowid (TSS) support.
- Added "per-fastpath" locks and watchdog timeouts.
- Fixed problem where the CQ producer index was advanced beyond
  the size of the CQ ring during initialization.
- Replaced hard-coded debug levels in some debug print statements.
- More style(9) fixes.

MFC after:	Two weeks
2011-04-21 23:06:00 +00:00