Commit Graph

1410 Commits

Author SHA1 Message Date
Adrian Chadd
530028c9d6 Break out the AR71XX config file into _BASE and board specific
bits.

The ROUERSTATION and RSPRO variants contain:

* the board specific bits (eg the RTC for RSPRO, later on it'll
  include the GPIO/LED definitions);
* the boot specific bits (eg, on-board flash, usb flash, etc).

For now the AR71XX_BASE file contains the common board config,
drivers and net80211/ath wireless drivers.

I'll follow this up with config files for the other boards I
have (eg the Ubiquiti LSSR71, as well as some Mikrotik boards
that use the AR71XX and atheros reference boards) which will
be quite easy to do now.
2011-12-29 05:51:48 +00:00
Oleksandr Tymoshenko
6b194c7ade - Add generic GPIO driver for Cavium Octeon. At the moment pin definition is
hardcoded but will be changed later with more flexible way to define them.
2011-12-28 05:57:03 +00:00
Oleksandr Tymoshenko
27e093e7f4 - Initialize compact_flash_attribute_base_addr from bootinfo structure 2011-12-24 23:15:25 +00:00
Oleksandr Tymoshenko
5a312a4a9a - Set CF physical address base in sysinfo structure 2011-12-23 22:10:55 +00:00
Adrian Chadd
ddd7699151 Remove these locks - they aren't strictly needed and cause measurable
performance issues.

* Access to the GPIO bus is already locked by requesting
  and releasing the bus - thus the lock isn't really needed
  for each GPIO pin change.
* Don't lock and unlock the GPIO bus for -each- i2c access -
  the i2c bus code is already doing this by calling the upper
  layer callback to request/release the bus. This thus locks
  the bus for the entirety of the transaction.

TODO:

* Further verify that everything is correctly requesting/
  releasing the GPIO bus.
* Look at how to lock the GPIO pin configuration stuff,
  potentially by locking/unlocking the bus at the gpiobus
  layer.
2011-12-20 00:33:56 +00:00
Bjoern A. Zeeb
3b29d0033d Unbreak the OCTEON1 kernel build after r228483 removing the left over
declaration.

MFC after:	11 days
2011-12-17 15:42:37 +00:00
Andriy Gapon
9976156f12 kern cons: introduce infrastructure for console grabbing by kernel
At the moment grab and ungrab methods of all console drivers are no-ops.

Current intended meaning of the calls is that the kernel takes control of
console input.  In the future the semantics may be extended to mean that
the calling thread takes full ownership of the console (e.g. console
output from other threads could be suspended).

Inspired by:	bde
MFC after:	2 months
2011-12-17 15:08:43 +00:00
Adrian Chadd
3f9bdcef12 * Add in the gpio/gpioled drivers into AR91XX_BASE.
* Add in a default GPIO section for AR91XX_BASE.hints, which doesn't
  define the GPIO function masks or any GPIO pines.
* Add in the GPIO line definitions for LEDs and GPIO pins for the
  TP-WR1043nd.

I've verified the LEDs work fine using gpioset.
2011-12-15 01:05:38 +00:00
Adrian Chadd
19ac3f84d0 Re-jiggle the GPIO code a little to remove the hard-coded AR71xx GPIO
config and function mask setup.

* "gpiomask" now specifies which GPIO pins to enable, for devices to bind to.
* "function_set" allows bits in the function register to be set at GPIO setup.
* "function_clear" allows bits in the function register to be cleared at
  GPIO setup.

The function_set/function_clear bits allow for individual GPIO pins to either
drive a GPIO line or an alternate function - eg USB, JTAG, etc. This allows
for things like CS1/CS2 be enabled for those boards w/ >1 SPI device connected,
or disabling JTAG for the AR7240 (which is apparently needed ..)

I've verified this on the AR71xx.
2011-12-15 01:03:49 +00:00
Hans Petter Selasky
2e14174893 Implement better support for USB controller suspend and resume.
This patch should remove the need for kldunload of USB
controller drivers at suspend and kldload of USB controller
drivers at resume.

This patch also fixes some build issues in avr32dci.c

MFC after:	2 weeks
2011-12-14 00:28:54 +00:00
Ed Schouten
53627e400f Replace __signed by signed.
The signed keyword is an integral part of the C syntax. There's no need
to use __signed.
2011-12-13 13:38:03 +00:00
Adrian Chadd
34415ac907 Style(9) changes. 2011-12-13 05:13:51 +00:00
Jayachandran C.
d42a1129cb Disable KDB/DDB options for XLP N32 compile.
n32 abi is not supported in KDB/DDB yet, disable the option in
XLPN32 conf.

Reported by:	gonzo, bz
2011-12-05 03:18:40 +00:00
Jayachandran C.
6e065b1baa Fix N32 compilation again for XLP.
Disable DDB/KDB related options for N32, and add back a cast that was
lost during the last set of updates.

Reported by:	gonzo, bz
2011-12-05 03:10:01 +00:00
Jayachandran C.
b10ea0872a Fix XLP compilation.
Add definitions of LSU_DEBUG_ADDR and LSU_DEBUG_DATA0, the code that uses
it was added in r227799

Reported by:	gonzo
2011-12-05 02:56:08 +00:00
Oleksandr Tymoshenko
2b8895cd74 - Fix backtrace for MIPS64 platform 2011-11-28 19:48:04 +00:00
Oleksandr Tymoshenko
ba3ba72812 - Copy base MAC address from bootinfo descriptor to sysinfo struct
Reviewed by:	Andrew Duane
2011-11-28 19:28:29 +00:00
Aleksandr Rybalko
098edc8725 Simplify arge_flush_ddr to use updated ar71xx_device_flush_ddr_ge(unit).
Approved by: adrian (mentor)
2011-11-28 13:42:59 +00:00
Gleb Smirnoff
e63fe86b27 Fix build, fininshing r228018. 2011-11-28 08:10:12 +00:00
Aleksandr Rybalko
e319e32c90 Join chip depended methods for arge0 and arge1 into single call with unit.
Approved by: adrian (mentor)
2011-11-27 11:15:59 +00:00
Marius Strobl
b9c7618836 Change another instance of amd(4) to esp(4) missed in r227006.
Submitted by:	Garrett Cooper
MFC after:	3 days
2011-11-26 18:47:09 +00:00
Adrian Chadd
b010577828 I've had verification that the second-last 64k is actually used by the tplink
firmware to store configuration data.

It's safe to overwrite it.
2011-11-24 15:12:57 +00:00
Adrian Chadd
019d307f35 Now that I've brought up FreeBSD via flash, I've discovered that
the second-last 64k seems to be the default firmware board configuration
area.

Since I have no idea whether uboot uses it or not - and it's prefixed
with an atheros eeprom signature (0xaa55), I figure the safest thing
to do is mark it as read-only.

I've modified my local tplink firmware building program to generate
a board configuration section - which is separate to this partition.
It's located in the 64k _before_ this particular 64k.

The firmware build program from OpenWRT never initialises those
values and the firmware images from tplink also leave it 0x0, so I
don't currently know what the exact, correct details should be.
2011-11-24 07:37:19 +00:00
Adrian Chadd
b1214c6893 Flip on AR71XX_ENV_UBOOT so the environment variables are properly
processed. (Which is to say they're currently ignored.)
2011-11-24 07:33:41 +00:00
Adrian Chadd
1c3ed0a410 Introduce a new (global, sorry!) option which controls whether
the ar71xx platform code should assume a uboot or redboot environment.

The current code gets very confused (and just crashes) on a uboot
environment, where each attribute=value pair is in a single entry.
Redboot on the other hand stores it as "attribute", "value", "attribute",
"value", ...

This allows the kernel to boot on a TP-LINK TL-WR1043ND from flash,
where the uboot environment gets setup. This didn't show up during a netboot
as "tftpboot" and "go" don't setup the uboot environment variables.
2011-11-24 07:32:52 +00:00
Adrian Chadd
35d1603e8a Flesh out a geom_map setup, so the kernel can be squeezed _onto_ the device.
The default flash layout gives only 1 megabyte for the kernel, gzipped.
The uboot firmware running on this device only supports gzip, not lzma, so
we actually _do_ have to try and slim the kernel down a bit.

But, since I can't actually do that at the present, I'm opting to:

* extend the kernel from 1mb to 2mb;
* have rootfs fill the rest of that, save 64k;
* eventually I'll hide a 64k config partition at the end, between the
  end of rootfs and the ART (radio configuration data.)

The uboot firmware doesn't care about the partition layout. It just
expects the kernel application image to sit at 0xbf020000 (right after
the 128k uboot image.) The uboot header isn't actually read either -
it's "faked" from a "tplink" flash image header. So as long as the
map configuration here matches what is being written out via the
tplink firmware generator, everything is a-ok.
2011-11-24 04:39:01 +00:00
Adrian Chadd
5c85f74c64 Compile in the right bits so the AR9130 WMAC support functions correctly.
A previous commit disabled compiling the AR9130 support in the default
HAL build in the kernel. Since the AR9130 support won't actually function
without AH_SUPPORT_AR9130 (and that abomination needs to be undone at some
point, in order to allow USB 11n NICs to also work), we now have to
explicitly compile it in.

But since the 11n RF backends don't (currently) join the RF linker set,
one has to compile in _an_ RF backend for the HAL to compile.
2011-11-24 04:34:04 +00:00
Adrian Chadd
68d31a0864 Add a comment documenting where the WMAC hangs off of.
At some point it would be nice to correctly update the bus glue to make
this "correct", including having the DDR flush occur in the right spot
(ie, any AHB interrupt.)
2011-11-24 04:23:42 +00:00
Adrian Chadd
4a66e3c76d Flip on these debugging options by default. This is -HEAD after all. 2011-11-24 04:21:19 +00:00
Adrian Chadd
bf3ee21b8c Slim the default build down a little:
* Disable the NFS client, it's not needed for booting off of flash.
* Don't compile in softdep, snapshots, ufs acls and directory hashing.
2011-11-24 04:19:02 +00:00
Hans Petter Selasky
3b12bdb58f Rename device_delete_all_children() into device_delete_children().
Suggested by:	jhb @ and marius @
MFC after:	1 week
2011-11-22 21:56:55 +00:00
Marius Strobl
4b7ec27007 - There's no need to overwrite the default device method with the default
one. Interestingly, these are actually the default for quite some time
  (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9)
  since r52045) but even recently added device drivers do this unnecessarily.
  Discussed with: jhb, marcel
- While at it, use DEVMETHOD_END.
  Discussed with: jhb
- Also while at it, use __FBSDID.
2011-11-22 21:28:20 +00:00
Jayachandran C.
a541c47546 Do dcache flush on CPU core before enabling threads.
The dcache flush has to be done using the core control registers before
splitting the L1D cache by enabling the hardware threads.

Also replace .word calls for mfcr/mtcr with a C macro.

In collaboration with: prabhath at netlogicmicro com
2011-11-21 16:43:24 +00:00
Jayachandran C.
452f22c389 Merge XLP 3XX updates and related rework.
* Update message station (CMS) code, read queue ids from PCI header.
* Use interrupts to wakeup message handling threads on 3XX
* Update PIC code, read interrupt information from PCI header instead
  of using fixed values.
* Update PCI interrupt handling for the PIC change.
* Update code for getting chip frequency, new code support XLP 3XX
* Misc style(9) fixes

In collaboration with: prabhath at netlogicmicro com (CMS/PIC)
                       venkatesh at netlogicmicro.com (PCI)
2011-11-21 08:12:36 +00:00
Jayachandran C.
fb1677186a XLP processors have the release 2 pagegrain register
Add accessors to cpufunc.h

Obtained from:	prabhath at netlogicmicro com
2011-11-21 07:55:37 +00:00
Adrian Chadd
31bdaf633c Always leave the -current kernel debugging options on. 2011-11-21 06:45:12 +00:00
Jayachandran C.
e8f1d9c88b Remove unused variable ubase.
This vaiable is initialized but not used.
2011-11-19 15:08:49 +00:00
Jayachandran C.
b0250abec6 Remvoe unused file
mips/nlm/uart_cpu_xlp.c has replaced uart_bus_xlp_iodi.c
2011-11-19 15:01:09 +00:00
Jayachandran C.
f48a19aa93 Fix USB compilation, and add USB options to XLP conf
Remove obsolete header file included in usb_init.c
2011-11-19 14:33:14 +00:00
Jayachandran C.
b2f4d7679b Fixup cache flush definitions for XLP
mco_icache_sync_range was earlier set to mipsNN_icache_sync_range_index_32
which is not necessary, revert this.
Also, the data cache is coherent so write back is not really needed. This
change is experimental.
2011-11-19 14:14:35 +00:00
Jayachandran C.
0dc79f3cc1 Whitespace fixes in XLP HAL files.
Also fixup a macro in iomap.h
2011-11-19 14:06:15 +00:00
Jayachandran C.
c82deda35b Rearrange XLP configuration files.
Create std.XLP for configuration options, which is included by the
conf files. The files XLP, XLPN32 and XLP64 will have mostly ABI related
options.

Also move uart and pci to mips/nlm/std.xlp since all XLP configurations
needs these devices.

Obtained from:	prabhath at netlogicmicro com (intial version)
2011-11-18 11:18:59 +00:00
Jayachandran C.
eeb41c230d Fix COP0 hazards for XLR and XLP
The XLR CPUs do not have any software visible hazards for COP0 operations.
On XLP the hazard is a ehb, since it is mips64r2.
2011-11-18 09:30:24 +00:00
Jayachandran C.
cca2c4b446 Do pmap update only on active CPUs.
The pmap update_page/invalidate_page/invalidate_all operations has to be
done only on active cpus. In the simplest case, if the process is not
active on any other CPUs, we can just do the operation on the current CPU.

This change replaces the call to smp_rendezvous() for these operations with
smp_rendezvous_cpus() in case there more than one active CPU, or with a direct
function call if there is just one active CPU.

This change give significant performance increase in fork/exec benchmarks
on XLR/XLS/XLP with 32 cpus.

Reviewed by:	alc
2011-11-17 13:14:59 +00:00
Attilio Rao
ed1f6dc235 Introduce the option VFS_ALLOW_NONMPSAFE and turn it on by default on
all the architectures.
The option allows to mount non-MPSAFE filesystem. Without it, the
kernel will refuse to mount a non-MPSAFE filesytem.

This patch is part of the effort of killing non-MPSAFE filesystems
from the tree.

No MFC is expected for this patch.

Tested by:	gianni
Reviewed by:	kib
2011-11-08 10:18:07 +00:00
Ed Schouten
6472ac3d8a Mark all SYSCTL_NODEs static that have no corresponding SYSCTL_DECLs.
The SYSCTL_NODE macro defines a list that stores all child-elements of
that node. If there's no SYSCTL_DECL macro anywhere else, there's no
reason why it shouldn't be static.
2011-11-07 15:43:11 +00:00
Alan Cox
8393768074 Add support for VM_ALLOC_WIRED and VM_ALLOC_ZERO to vm_page_alloc_freelist()
and use these new options in the mips pmap.

Wake up the page daemon in vm_page_alloc_freelist() if the number of free
and cached pages becomes too low.

Tidy up vm_page_alloc_init().  In particular, add a comment about an
important restriction on its use.

Tested by:	jchandra@
2011-11-02 05:42:51 +00:00
David Schultz
a50079b7ff People porting FreeBSD to new architectures ought not have to
implement a deprecated FPU control interface in addition to the
standard one.  To make this clearer, further deprecate ieeefp.h
by not declaring the function prototypes except on architectures
that implement them already.

Currently i386 and amd64 implement the ieeefp.h interface for
compatibility, and for fp[gs]etprec(), which doesn't exist on
most other hardware.  Powerpc, sparc64, and ia64 partially implement
it and probably shouldn't, and other architectures don't implement it
at all.
2011-10-21 06:41:46 +00:00
Jayachandran C.
85dac049c1 Keep FDT options commented until dtc is build by default for mips
Otherwise automated builds will fail for XLP and XLP64
2011-10-19 14:38:01 +00:00
Jayachandran C.
29550c285c Fix wakeup latency when sleeping with 'wait'
If we handle an interrupt just before the 'wait' and the interrupt
schedules some work, we need to skip the 'wait' call. The simple solution
of calling sched_runnable() with interrupts disabled immediately before
wait still leaves a window after the call and before 'wait' in which
the same issue can occur.

The solution implemented is to check the EPC in the interrupt handler, and
if it is in a region before the 'wait' call, to fix up the EPC to skip the
wait call.

Reported/analysed by:	adrian
Fix suggested by:	kib

Reviewed by:	jmallett, imp
2011-10-18 16:37:28 +00:00
Jayachandran C.
a7e054044c Fix XLP compile failure on n32 abi.
Reported by:	bz@
2011-10-18 14:05:18 +00:00
Jayachandran C.
8291dd8a41 Support for booting XLP using FDT.
- update xlp_machdep.c to read arguments from FDT if FDT support is
  compiled in.
- define rmi_uart_bus_space, and use it as fdtbus_bs_tag
- update conf files for FDT support
- add default dts file xlp-basic.dts
2011-10-18 08:10:23 +00:00
Jayachandran C.
29a99755a9 FDT support for MIPS.
Add architecture specific files needed to compile MIPS with
flattened device tree support.
2011-10-18 07:29:21 +00:00
Pyun YongHyeon
57c81d92ae Close a race where SIOCGIFMEDIA ioctl get inconsistent link status.
Because driver is accessing a common MII structure in
mii_pollstat(), updating user supplied structure should be done
before dropping a driver lock.

Reported by:	Karim (fodillemlinkarimi <> gmail dot com)
2011-10-17 19:49:00 +00:00
Jayachandran C.
c0959978ec Fix for crash on MIPS /dev/mem read.
Reading /dev/mem in 64 bit kernel crashes.  This is because the page
used to call uiomove_fromphys() from memrw() does not have md.pv_list
initialized correctly.

The fix is to call pmap_page_init() on the page to initialize it.
2011-10-17 05:42:53 +00:00
Eitan Adler
36daf0495a - change "is is" to "is" or "it is"
- change "the the" to "the"

Approved by:	lstewart
Approved by:	sahil (mentor)
MFC after:	3 days
2011-10-16 14:30:28 +00:00
Konstantin Belousov
6bfe4c78c8 Remove unused define.
MFC after:	1 month
2011-10-07 16:09:44 +00:00
Konstantin Belousov
877012982b Convert MIPS to the syscallenter/syscallret system call sequence handlers.
This was the last architecture used custom syscall entry sequence.

Reviewed, debugged, tested and approved by:	jchandra
MFC after:	1 month
2011-10-06 17:34:43 +00:00
Marcel Moolenaar
eed142e1e9 Add default address for FLASH mapping on the boot bus.
Reviewed by: jmallett, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
2011-10-04 20:30:15 +00:00
Marcel Moolenaar
4699b5e472 Remove octeon_bootinfo from all files except octeon_machdep.c.
Use instead cvmx_sysinfo_get() consistently.

Reviewed by: jmallett, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
2011-10-04 20:17:43 +00:00
Marcel Moolenaar
f11e3710b0 Remove bogus and wrong definition of BLKDEV_IOSIZE.
Wrong in that it must be guarded (it's configurable)
and bogus in that there's absolutely no rationale for
it not default to a page size like all other archs.
2011-10-04 18:06:08 +00:00
Marcel Moolenaar
9bcaa49a30 o Clean up some ID printfs, and put under bootverbose
o   Remove redundant lookups of base address in cf_identify
o   Fix some indenting issues
o   Fix an identification bug that uses DRQ to checlk for ident block
    returned. The correct spec is to look for BSY to be cleared.

Reviewed by: imp, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
2011-10-04 18:03:55 +00:00
Marcel Moolenaar
2873abdc12 Partially revert r224661:
octeon_ap_boot is not a bitmask. It holds the CPU Id of the
AP currently being started. As such there's no need to make
it a 64-bit integral and we're not limited to 64 CPUs.

Reported by: jmallet
Obtained from:	Andre Duane
2011-10-04 17:49:19 +00:00
Adrian Chadd
13a2f4943a Disable using wait in cpu_idle() until a better solution to timer and
interrupt handling can be implemented.
2011-10-01 05:56:25 +00:00
Kip Macy
8451d0dd78 In order to maximize the re-usability of kernel code in user space this
patch modifies makesyscalls.sh to prefix all of the non-compatibility
calls (e.g. not linux_, freebsd32_) with sys_ and updates the kernel
entry points and all places in the code that use them. It also
fixes an additional name space collision between the kernel function
psignal and the libc function of the same name by renaming the kernel
psignal kern_psignal(). By introducing this change now we will ease future
MFCs that change syscalls.

Reviewed by:	rwatson
Approved by:	re (bz)
2011-09-16 13:58:51 +00:00
Christian Brueffer
b48f7c4c8d Fix a zyd(4) comment typo that was copy+pasted into most kernel config files.
PR:		160276
Submitted by:	MATSUMIYA Ryo <matsumiya@mma.club.uec.ac.jp>
Approved by:	re (kib)
MFC after:	1 week
2011-09-11 17:39:51 +00:00
Konstantin Belousov
3407fefef6 Split the vm_page flags PG_WRITEABLE and PG_REFERENCED into atomic
flags field. Updates to the atomic flags are performed using the atomic
ops on the containing word, do not require any vm lock to be held, and
are non-blocking. The vm_page_aflag_set(9) and vm_page_aflag_clear(9)
functions are provided to modify afalgs.

Document the changes to flags field to only require the page lock.

Introduce vm_page_reference(9) function to provide a stable KPI and
KBI for filesystems like tmpfs and zfs which need to mark a page as
referenced.

Reviewed by:    alc, attilio
Tested by:      marius, flo (sparc64); andreast (powerpc, powerpc64)
Approved by:	re (bz)
2011-09-06 10:30:11 +00:00
Jayachandran C.
cd4c8d64ff MIPS XLP platform code update.
* Update the hardware access register definitions and functions to bring
  them in line with other Netlogic software.
* Update the platform bus to use PCI even for on-chip devices. Add a dummy
  PCI driver to ignore on-chip devices which do not need driver.
* Provide memory and IRQ resource allocation code for on-chip devices
  which cannot get it from PCI config.
* add support for on-chip PCI and USB interfaces.
* update conf files, enable pci and retain old MAXCPU until we can support
  >32 cpus.

Approved by:	re(kib), jmallett
2011-09-05 10:45:29 +00:00
Attilio Rao
e996900382 Fix a typo in cb_dumpdata() about wrongly calling wdog_kern_pat().
Submitted by:	Andrew Boyer <aboyer at averesystems dot com>
Approved by:	re (kib)
2011-08-13 17:17:04 +00:00
Konstantin Belousov
d98d0ce27a - Move the PG_UNMANAGED flag from m->flags to m->oflags, renaming the flag
to VPO_UNMANAGED (and also making the flag protected by the vm object
  lock, instead of vm page queue lock).
- Mark the fake pages with both PG_FICTITIOUS (as it is now) and
  VPO_UNMANAGED. As a consequence, pmap code now can use use just
  VPO_UNMANAGED to decide whether the page is unmanaged.

Reviewed by:	alc
Tested by:	pho (x86, previous version), marius (sparc64),
    marcel (arm, ia64, powerpc), ray (mips)
Sponsored by:	The FreeBSD Foundation
Approved by:	re (bz)
2011-08-09 21:01:36 +00:00
Marcel Moolenaar
841fed3aa3 Make octeon_ap_boot 64 bits to handle MAXCPU up to 64.
Better construction of CPU mask in platform_cpu_mask().
Release cores still in reset when platform_start_ap() is called.

Reviewed by: imp, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
Approved by: re (kib)
2011-08-05 22:54:42 +00:00
Attilio Rao
5bfc249c2c Fix for arm and mips case the size of storage for sintrcnt/sintrnames.
It seems that "info as" is not much precise on what expect by pseudo-op
.word, by the way.

No MFC is previewed for this patch.

Tested by:	andreast, pluknet
Approved by:	re (kib)
2011-08-02 17:49:27 +00:00
Attilio Rao
786ef92b7b Bump MAXCPU for amd64, ia64 and XLP mips appropriately.
From now on, default values for FreeBSD will be 64 maxiumum supported
CPUs on amd64 and ia64 and 128 for XLP. All the other architectures
seem already capped appropriately (with the exception of sparc64 which
needs further support on jalapeno flavour).

Bump __FreeBSD_version in order to reflect KBI/KPI brekage introduced
during the infrastructure cleanup for supporting MAXCPU > 32. This
covers cpumask_t retiral too.

The switch is considered completed at the present time, so for whatever
bug you may experience that is reconducible to that area, please report
immediately.

Requested by:	marcel, jchandra
Tested by:	pluknet, sbruno
Approved by:	re (kib)
2011-07-19 13:00:30 +00:00
Attilio Rao
732772c701 On 64 bit architectures size_t is 8 bytes, thus it should use an 8 bytes
storage.
Fix the sintrcnt/sintrnames specification.

No MFC is previewed for this patch.

Reported, reviewed and tested by:	marcel
Approved by:	re (kib)
2011-07-19 12:41:57 +00:00
Attilio Rao
68b739cd6f Add the possibility to specify from kernel configs MAXCPU value.
This patch is going to help in cases like mips flavours where you
want a more granular support on MAXCPU.

No MFC is previewed for this patch.

Tested by:	pluknet
Approved by:	re (kib)
2011-07-19 00:37:24 +00:00
Attilio Rao
521ea19d1c - Remove the eintrcnt/eintrnames usage and introduce the concept of
sintrcnt/sintrnames which are symbols containing the size of the 2
  tables.
- For amd64/i386 remove the storage of intr* stuff from assembly files.
  This area can be widely improved by applying the same to other
  architectures and likely finding an unified approach among them and
  move the whole code to be MI. More work in this area is expected to
  happen fairly soon.

No MFC is previewed for this patch.

Tested by:	pluknet
Reviewed by:	jhb
Approved by:	re (kib)
2011-07-18 15:19:40 +00:00
Jayachandran C.
dafdd69986 Comment out KDB/DDB related options for N32 kernel.
DDB files have warnings in this ABI which will break the kernel build
unless Werror is ignored

Reported by:	bz
2011-07-17 18:51:51 +00:00
Bjoern A. Zeeb
7056457c70 Fix compilation of mips kernels adding apropriate #ifdefs after r224115.
Pointed out by:	Luiz Otavio O Souza (lists.br gmail.com)
2011-07-17 16:50:12 +00:00
Jayachandran C.
ae78a2ad86 MIPS changes for Netlogic XLP support.
This patch adds support for the Netlogic XLP mips64 processors in
the common MIPS code. The changes are :

- Add CPU_NLM processor type
- Add cases for CPU_NLM, mostly were CPU_RMI is used.
- Update cache flush changes for CPU_NLM
- Add kernel build configuration files for xLP.

In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com>

Approved by:	bz(re), jmallett, imp(mips)
2011-07-16 20:31:29 +00:00
Jayachandran C.
4d91ecaf4c Add MIPS platform files for Netlogic XLP SoC.
Processor, UART, PIC and Messaging Network code. Also add
sys/mips/nlm/hal for on-chip device registers.

In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com>

Approved by:	bz(re), jmallett, imp(mips)
2011-07-16 19:35:44 +00:00
Jayachandran C.
578828c8d2 Support compiling MIPS elf trampoline with a different ABI.
Allow changing the trampoline ABI with makeoptions, this will allow
us to have a trampoline with a different ABI from the kernel.
Useful in cases where we have to boot a 64 bit kernel from a
bootloader which supports only 32 bit or vice versa.

Approved by:	bz(re), jmallett, imp
2011-07-16 17:22:01 +00:00
Adrian Chadd
1455de1775 The i8259 controller is initialized incorrectly on MALTA. It writes
mask bits to control register and control bits to mask register.

The former causes ICW1_RESET|ICW1_LTIM combination to be written to
control register, which on QEMU results in "level sensitive irq not
supported" error.

Submitted by:	Robert Millan <rmh@debian.org>
2011-07-16 00:30:23 +00:00
Aleksandr Rybalko
861a327be9 Include device rt in RT305X config.
Approved by: adrian (mentor)
2011-07-14 11:53:23 +00:00
Aleksandr Rybalko
b3964335a1 Revert it back. Too many changes for one commit.
Approved by: adrian (mentor)
2011-07-14 11:09:37 +00:00
Aleksandr Rybalko
b5bed41c6c Include device rt in RT305X config and little cleanup.
Approved by: adrian (mentor)
2011-07-14 10:05:28 +00:00
Attilio Rao
470107b2f1 MFC 2011-07-04 11:13:00 +00:00
Alan Cox
80788b2a27 When iterating over a paging queue, explicitly check for PG_MARKER, instead
of relying on zeroed memory being interpreted as an empty PV list.

Reviewed by:	kib
2011-07-02 23:42:04 +00:00
Attilio Rao
7b744f6b01 MFC 2011-06-30 10:19:43 +00:00
Alan Cox
6bbee8e28a Add a new option, OBJPR_NOTMAPPED, to vm_object_page_remove(). Passing this
option to vm_object_page_remove() asserts that the specified range of pages
is not mapped, or more precisely that none of these pages have any managed
mappings.  Thus, vm_object_page_remove() need not call pmap_remove_all() on
the pages.

This change not only saves time by eliminating pointless calls to
pmap_remove_all(), but it also eliminates an inconsistency in the use of
pmap_remove_all() versus related functions, like pmap_remove_write().  It
eliminates harmless but pointless calls to pmap_remove_all() that were being
performed on PG_UNMANAGED pages.

Update all of the existing assertions on pmap_remove_all() to reflect this
change.

Reviewed by:	kib
2011-06-29 16:40:41 +00:00
Attilio Rao
9a981857cf Remove pc_cpumask and pc_other_cpus from MIPS support.
Tested by:	gonzo
2011-06-28 12:51:08 +00:00
Kevin Lo
281f0ca8e7 Remove duplicate header includes 2011-06-26 10:07:48 +00:00
Attilio Rao
3bce356ea4 MFC 2011-06-04 22:05:20 +00:00
Warner Losh
dfa1a4fbf9 Add support for True IDE mode to the Octeon CF driver. This mode is
signalled when the attribute address for the CF is 0 in the octeon
sysinfo structure.  In this mode, the DATA port is 16-bits, but the
other ports are 8-bits, but on a 16-bit bus (so you have to access it
a short at a time, but only believe the lower byte).  See the code for
more details on this slightly odd arrangement.  I'm still not 100%
happy with the abstractions here on many levels (starting with the
globals for these settings, on down to no bus_space use, etc), but the
driver had these problems before the change.

Also, clean up the code a bit to make this support easier, and the
code a bit easier to read.  I tried to follow existing style, but may
have missed a few spots.  Add some comments.

Fix probe/attach routine to return a proper error for the simulator.

With this change, my EBH5200 eval board now recognizes the CF well
enough to boot to the login prompt.  Before it would say it never
became ready.  My CN3010-EVB-HS5 still boots properly.  My older
CN3860-based board won't load the 64-bit kernel, either before or
after the change, and I didn't chase that down.
2011-06-04 07:06:05 +00:00
Attilio Rao
61b926921f MFC 2011-05-31 21:22:44 +00:00
Nathan Whitehorn
d098f93019 On multi-core, multi-threaded PPC systems, it is important that the threads
be brought up in the order they are enumerated in the device tree (in
particular, that thread 0 on each core be brought up first). The SLIST
through which we loop to start the CPUs has all of its entries added with
SLIST_INSERT_HEAD(), which means it is in reverse order of enumeration
and so AP startup would always fail in such situations (causing a machine
check or RTAS failure). Fix this by changing the SLIST into an STAILQ,
and inserting new CPUs at the end.

Reviewed by:	jhb
2011-05-31 15:11:43 +00:00
Attilio Rao
f7a10dcfe0 Merge r221846 from largeSMP project branch:
Fix arguments passing to _long() version of atomic function for mips.

The native implementation is bogus in that regard and offers the same
problem solved for powerpc as r222198, but mips' guys just wanted a
small and self-contained patch for mips rather than rewriting the
whole support.

Reviewed by:	art, imp
Tested by:	gonzo
MFC after:	2 weeks
2011-05-23 23:35:50 +00:00
Attilio Rao
be044baf28 Fix a bug where the index cpu is just plain wrong, thus the kernel
livelocks.

Reported by:	gonzo
2011-05-22 20:19:01 +00:00
Attilio Rao
b2aa562e7b MFC 2011-05-13 20:58:48 +00:00
Attilio Rao
f89d6b3f06 Fix a brain-o in platform_cpu_mask() by just specifying a possible
cpuset_t to be copied, rather than return the array.
I can't rely anymore on this being a simple int/long object.

Reported by:	art
2011-05-13 19:56:58 +00:00
Matthew D Fleming
cfb00e5aa7 Move the ZERO_REGION_SIZE to a machine-dependent file, as on many
architectures (i386, for example) the virtual memory space may be
constrained enough that 2MB is a large chunk.  Use 64K for arches
other than amd64 and ia64, with special handling for sparc64 due to
differing hardware.

Also commit the comment changes to kmem_init_zero_region() that I
missed due to not saving the file.  (Darn the unfamiliar development
environment).

Arch maintainers, please feel free to adjust ZERO_REGION_SIZE as you
see fit.

Requested by:	alc
MFC after:	1 week
MFC with:	r221853
2011-05-13 19:35:01 +00:00
Attilio Rao
245a253538 Add the cpuset_t conversion for mips. 2011-05-13 16:42:05 +00:00
Attilio Rao
250c198bd7 Fix the _long() rappresentation on mips by casting the long arguments
to u_int for all the functions.

Reviewed by:	art, imp
2011-05-13 16:39:47 +00:00
Oleksandr Tymoshenko
ac35ff65d3 Use new option names for NFS client and NFS server
See UPDATING entry for 20110427
2011-05-11 00:52:41 +00:00
Adrian Chadd
cc641d93c6 Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC.
Submitted by:	Luiz Otavio O Souza <loos.br@gmail.com>
2011-05-06 02:45:02 +00:00
Adrian Chadd
118b92c879 Add nvram2env (untested) and geom_map (tested) to PB92. 2011-05-05 09:04:49 +00:00
Marius Strobl
3fcb7a5365 - Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP
(reporting IFM_LOOP based on BMCR_LOOP is left in place though as
  it might provide useful for debugging). For most mii(4) drivers it
  was unclear whether the PHYs driven by them actually support
  loopback or not. Moreover, typically loopback mode also needs to
  be activated on the MAC, which none of the Ethernet drivers using
  mii(4) implements. Given that loopback media has no real use (and
  obviously hardly had a chance to actually work) besides for driver
  development (which just loopback mode should be sufficient for
  though, i.e one doesn't necessary need support for loopback media)
  support for it is just dropped as both NetBSD and OpenBSD already
  did quite some time ago.
- Let mii_phy_add_media() also announce the support of IFM_NONE.
- Restructure the PHY entry points to use a structure of entry points
  instead of discrete function pointers, and extend this to include
  a "reset" entry point. Make sure any PHY-specific reset routine is
  always used, and provide one for lxtphy(4) which disables MII
  interrupts (as is done for a few other PHYs we have drivers for).
  This includes changing NIC drivers which previously just called the
  generic mii_phy_reset() to now actually call the PHY-specific reset
  routine, which might be crucial in some cases. While at it, the
  redundant checks in these NIC drivers for mii->mii_instance not being
  zero before calling the reset routines were removed because as soon
  as one PHY driver attaches mii->mii_instance is incremented and we
  hardly can end up in their media change callbacks etc if no PHY driver
  has attached as mii_attach() would have failed in that case and not
  attach a miibus(4) instance.
  Consequently, NIC drivers now no longer should call mii_phy_reset()
  directly, so it was removed from EXPORT_SYMS.
- Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe().
  The purpose of that function is to perform the common steps to attach
  a PHY driver instance and to hook it up to the miibus(4) instance and to
  optionally also handle the probing, addition and initialization of the
  supported media. So all a PHY driver without any special requirements
  has to do in its bus attach method is to call mii_phy_dev_attach()
  along with PHY-specific MIIF_* flags, a pointer to its PHY functions
  and the add_media set to one. All PHY drivers were updated to take
  advantage of mii_phy_dev_attach() as appropriate. Along with these
  changes the capability mask was added to the mii_softc structure so
  PHY drivers taking advantage of mii_phy_dev_attach() but still
  handling media on their own do not need to fiddle with the MII attach
  arguments anyway.
- Keep track of the PHY offset in the mii_softc structure. This is done
  for compatibility with NetBSD/OpenBSD.
- Keep track of the PHY's OUI, model and revision in the mii_softc
  structure. Several PHY drivers require this information also after
  attaching and previously had to wrap their own softc around mii_softc.
  NetBSD/OpenBSD also keep track of the model and revision on their
  mii_softc structure. All PHY drivers were updated to take advantage
  as appropriate.
- Convert the mebers of the MII data structure to unsigned where
  appropriate. This is partly inspired by NetBSD/OpenBSD.
- According to IEEE 802.3-2002 the bits actually have to be reversed
  when mapping an OUI to the MII ID registers. All PHY drivers and
  miidevs where changed as necessary. Actually this now again allows to
  largely share miidevs with NetBSD, which fixed this problem already
  9 years ago. Consequently miidevs was synced as far as possible.
- Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that
  weren't explicitly converted to support flow control before. It's
  unclear whether flow control actually works with these but typically
  it should and their net behavior should be more correct with these
  changes in place than without if the MAC driver sets MIIF_DOPAUSE.

Obtained from:	NetBSD (partially)
Reviewed by:	yongari (earlier version), silence on arch@ and net@
2011-05-03 19:51:29 +00:00
Adrian Chadd
0ba4511a8a Add in the work-around for the AR8316 gige switch PHY.
This allows the ethernet to function on the PB92 board.

Submitted by:	Luiz Otavio O Souza
2011-05-02 10:42:19 +00:00
Adrian Chadd
b1b9d50bd9 Some AR724x PCIe fixes, which should wrap up the first round
of endian-ness issues with the AR724x.

From Luiz:

* Fix the bus space tag used so endian-ness is correctly handled;
* Only do the workaround for the AR7240; AR7241/AR7242 (PB92)
  don't require this

From me:

* Add a read flush from openwrt

Submitted by:	Luiz Otavio O Souza
2011-05-01 23:32:37 +00:00
Adrian Chadd
dba6332a4b An example configuration file for the Atheros PB92.
TODO:

* pcie doesn't yet work properly, I'm working on it.
* if_arge doesn't work - it's likely the phy mask is wrong; again I'm working on it.
2011-04-30 12:25:09 +00:00
Adrian Chadd
9a70a84852 The AR724x SoC's require the irq status line to be acked/cleared.
This allows console IO to occur correctly once the kernel is in multi-user
mode.

Submitted by:	Luiz Otavio O Souza
2011-04-30 12:07:15 +00:00
Adrian Chadd
569fa65ddd Call the DDR FIFO flush method when IP2 interrupts occur. 2011-04-30 11:56:04 +00:00
Adrian Chadd
41426ac408 Flip off debugging for now. 2011-04-30 11:40:31 +00:00
Adrian Chadd
d7fc7abf5a Add some initial PCIe bridge support for the AR724x chipsets.
This is reported to work on the AR7240 based Ubiquiti Rocket M5
but I haven't tested it on that hardware. I also don't yet have
it fully working on the AR7242 based development board here;
probe/attach functions but the register space resource looks like
the endian-ness is wrong (0x10000000 instead of 0x00001000).o

Further digging will be required.

Submitted by:	Luiz Otavio O Souza
2011-04-30 11:36:16 +00:00
Adrian Chadd
af0167995c In preparation for the AR724x PCIe bus code, make the AR71xx PCI bus
glue require 'device ar71xx_pci' .

Users of the AR71xx board configs will now require this for functioning
PCI:

device pci
device ar71xx_pci
2011-04-30 11:28:21 +00:00
Adrian Chadd
bb21522438 Add a missing DDR FIFO method for the ar71xx. 2011-04-30 02:31:56 +00:00
John Baldwin
b67d11bbcc Change rman_manage_region() to actually honor the rm_start and rm_end
constraints on the rman and reject attempts to manage a region that is out
of range.
- Fix various places that set rm_end incorrectly (to ~0 or ~0u instead of
  ~0ul).
- To preserve existing behavior, change rman_init() to set rm_start and
  rm_end to allow managing the full range (0 to ~0ul) if they are not set by
  the caller when rman_init() is called.
2011-04-29 18:41:21 +00:00
Adrian Chadd
f0fb75ebd2 Tidy up the naming of the ip2 DDR flush routine, and add an inline
accessor method (which is currently unused) in there.
2011-04-29 06:25:11 +00:00
Attilio Rao
2be767e069 Add the watchdogs patting during the (shutdown time) disk syncing and
disk dumping.
With the option SW_WATCHDOG on, these operations are doomed to let
watchdog fire, fi they take too long.

I implemented the stubs this way because I really want wdog_kern_*
KPI to not be dependant by SW_WATCHDOG being on (and really, the option
only enables watchdog activation in hardclock) and also avoid to
call them when not necessary (avoiding not-volountary watchdog
activations).

Sponsored by:	Sandvine Incorporated
Discussed with:	emaste, des
MFC after:	2 weeks
2011-04-28 16:02:05 +00:00
Adrian Chadd
cd0f42fa9f Re-enable the wireless build parameters for the AR9130 WMAC.
* enable 11n
* add ath_ahb so the AHB<->ath glue is linked in
* disable descriptor order swapping, it isn't needed here
* disable interrupt mitigation, it isn't supported here
2011-04-28 12:52:01 +00:00
Adrian Chadd
c746f80ee3 Add the IP2 DDR flush handlers.
These aren't yet used in the interrupt handler path but should be.
2011-04-28 11:13:26 +00:00
Alexander Motin
0d307e0905 - Add shim to simplify migration to the CAM-based ATA. For each new adaX
device in /dev/ create symbolic link with adY name, trying to mimic old ATA
numbering. Imitation is not complete, but should be enough in most cases to
mount file systems without touching /etc/fstab.
 - To know what behavior to mimic, restore ATA_STATIC_ID option in cases
where it was present before.
 - Add some more details to UPDATING.
2011-04-26 17:01:49 +00:00
Alexander Motin
97b53e3634 Switch the GENERIC kernels for all architectures to the new CAM-based ATA
stack. It means that all legacy ATA drivers are disabled and replaced by
respective CAM drivers. If you are using ATA device names in /etc/fstab or
other places, make sure to update them respectively (adX -> adaY,
acdX -> cdY, afdX -> daY, astX -> saY, where 'Y's are the sequential
numbers for each type in order of detection, unless configured otherwise
with tunables, see cam(4)).

ataraid(4) functionality is now supported by the RAID GEOM class.
To use it you can load geom_raid kernel module and use graid(8) tool
for management. Instead of /dev/arX device names, use /dev/raid/rX.
2011-04-24 08:58:58 +00:00
Hans Petter Selasky
b0a5e05f62 We don't need to call EOWRITE4(sc, EHCI_USBINTR, 0) directly from each EHCI
bus driver at detach, hence ehci_detach() does exactly this since r199718.

Submitted by:	Luiz Otavio O Souza
MFC after:	7 days
Approved by:	thompsa (mentor)
2011-04-12 07:49:11 +00:00
Adrian Chadd
a043f08ec2 if_arge has had a strange bug that only appears during high traffic
levels. TX would hang, RX wouldn't. A bit of digging showed the interface
send queue was full, but IFF_DRV_OACTIVE was clear and the hardware TX
queue was empty.

It turns out that there wasn't a check to drain the interface send
queue once hardware TX had completed, so if the interface send queue
had filled up in the meantime, subsequent packets would be dropped
by the higher layers and if_start (and thus arge_start()) would never
be called.

The fix is simple - call arge_start_locked() in the software interrupt
handler after the hardware TX queue has been handled or a TX underrun
occured. This way the interface send queue gets drained.
2011-04-05 06:46:07 +00:00
Adrian Chadd
85df7b525a * Add some more debugging to if_arge
* Make doubly sure that IFF_DRV_OACTIVE is set if the hardware TX queue is full
2011-04-05 06:33:35 +00:00
Adrian Chadd
ef2732b2ee Put the ARGE_DEBUG behind a kernel config option. 2011-04-05 05:29:10 +00:00
Adrian Chadd
ce1d8cf9e0 Begin fleshing out a functioning debugging setup for if_arge.
I'm seeing TX hangs when doing large amounts of TX traffic;
an interface reset fixes it. This will hopefully help me identify
why.
2011-04-05 05:15:48 +00:00
Hans Petter Selasky
3ea3537594 - Correct EHCI interrupt disabling at detach.
Submitted by:	Luiz Otavio O Souza
MFC after:	7 days
Approved by:	thompsa (mentor)
2011-04-03 20:17:49 +00:00
Adrian Chadd
f7a5c9d346 Import the initial CPU support for the MIPS RALink RT305x SoC.
This is a MIPS4KC CPU with various embedded peripherals, including
wireless and ethernet support.

This commit includes the platform, UART, ethernet MAC and GPIO support.
The interrupt-driven GPIO code is disabled for now pending GPIO changes
from the submitter.

Submitted by:	Aleksandr Rybalko <ray@dlink.ua>
2011-04-03 14:39:55 +00:00
Adrian Chadd
77ae677e4a Add in some missing flags in the EHCI initialisation code,
needed to get USB working on the AR913x/AR724x.
2011-04-03 14:34:28 +00:00
Adrian Chadd
dcd35c3150 Commit configuration files for the AR913x SoC and the TP-Link WR-1043ND.
The AR91XX_BASE{,.hints} files define all the common parameters for
the AR913x SoC systems.

The TP-1043ND config file adds local parameters.
2011-04-03 13:19:58 +00:00
Adrian Chadd
0b11462b7d A handful of the openwrt devices use a MAC address that's at a hard-coded
offset in the flash.

Some devices (eg the TPLink WR-1043ND) don't have a flash environment
partition which can be queried for the current board settings.

This particular workaround allows for image creators to use a hint
to set the base MAC address. For example:

hint.arge.0.eeprommac=0x1f01fc00
2011-04-02 03:48:15 +00:00
Adrian Chadd
dba9c85977 Break out the ath PCI logic into a separate device/module.
Introduce the AHB glue for Atheros embedded systems. Right now it's
hard-coded for the AR9130 chip whose support isn't yet in this HAL;
it'll be added in a subsequent commit.

Kernel configuration files now need both 'ath' and 'ath_pci' devices; both
modules need to be loaded for the ath device to work.
2011-03-31 08:07:13 +00:00
Adrian Chadd
eab9f72a5a Implement AR724x USB initialisation code.
This (again) still requires an offset for the AR913x/AR724x before USB will
function.

Submitted by: Luiz Otavio O Souzau <loos.br@gmail.com>
2011-03-31 02:36:22 +00:00
Adrian Chadd
3c14a0e3fb The previous commit didn't completely rename this to what it should be. 2011-03-28 09:10:59 +00:00
Adrian Chadd
01754fac52 Refactor out the ar71xx mac address code into something that's
just for Redboot.

At some point we're going to need to build options for different
boot environments - for example, the UBoot setups I've seen simply
have the MAC address hard-coded at a fixed location in flash.
The OpenWRT support simply yanks the if_arge MAC directly from that
in code, rather than trying to find a uboot environment to pull it
from.
2011-03-27 13:55:35 +00:00
Adrian Chadd
c720b9bd9e Add an option - AR71XX_REALMEM - which overrides the amount of
memory detected from Redboot, or overrides the "otherwise" case
if no Redboot information was found.

Some AR71XX platforms don't use Redboot (eg TP-LINK devices using
UBoot; some later Ubiquiti devices which apparently also use
UBoot) and at least one plain out lies - the Ubiquiti LS-SR71A
Redboot says there's 16mb of RAM when in fact there's 32mb.

A more "clean" solution will be needed at a later date.
2011-03-27 08:44:27 +00:00
Adrian Chadd
83d59d21b5 Add some missing flags needed for AR913x/AR724x USB to correctly operate.
The AR913x/AR724x USB lives at a different offset to the AR71xx
USB, so this needs to be either adjusted for in a subsequent
commit, or updated in hints for kernels compiled for those
platforms.

Submitted by: Luiz Otavio O Souzau <loos.br@gmail.com>
2011-03-27 08:32:47 +00:00
Bjoern A. Zeeb
d2b74735b8 For now remove options FLOWTABLE from the remaining GENERIC kernel
configurations and make it opt-in for those who want it.  LINT will
still build it.

While it may be a perfect win in some scenarios, it still troubles users
(see PRs) in general cases.  In addition we are still allocating resources
even if disabled by sysctl and still leak arp/nd6 entries in case of
interface destruction.

Discussed with:	qingli (2010-11-24, just never executed)
Discussed with: juli (OCTEON1)
PR:		kern/148018, kern/155604, kern/144917, kern/146792
MFC after:	2 weeks
2011-03-19 15:50:34 +00:00
Juli Mallett
e22b8a5a3b o) Set MAC addresses starting at the MAC base for all management ports, not
just the MR-730.
o) Start MAC addresses for the non-management ports after the management ports.

Submitted by:	Bhanu Prakash (with modifications)
2011-03-16 22:51:34 +00:00
Juli Mallett
26de5f20cc o) Tear down receive interrupt on detach.
Submitted by:	Bhanu Prakash
2011-03-16 08:56:22 +00:00
Juli Mallett
64974004ec o) Clean up FPA pools on module unload.
o) Allocate output buffer pool based on available output queues.

Submitted by:	Bhanu Prakash (with modifications)
2011-03-16 08:51:36 +00:00
Juli Mallett
dea2d4206e o) Properly size caches and TLB on Octeon.
o) Make COP0_SYNC do nothing on Octeon, which is fully interlocked.

Submitted by:	Bhanu Prakash (with modifications)
2011-03-16 08:22:29 +00:00
Adrian Chadd
23dcc4c655 * Add wireless MAC reset, in prep for bringing over AR9130 support.
* Whilst I'm here, reformat to fit inside 80 characters.
2011-03-13 08:46:58 +00:00
Adrian Chadd
c55baa23d8 Add the missing AR724x DDR flush routines for if_arge0.
Submitted by: Luiz Otavio O Souza
2011-03-13 08:36:57 +00:00
Adrian Chadd
85a5701186 Fix the TX underrun status reset; remove a now unused variable.
Submitted by: Luiz Otavio O Souza
2011-03-13 08:34:14 +00:00
Adrian Chadd
2b60eabf75 Commit FIFO configuration fixes from OpenWRT. This fixes performance
issues with if_arge on the AR913x and AR724x.

Reference: https://dev.openwrt.org/ticket/6754
Submitted by: Luiz Otavio O Souza
2011-03-13 08:28:21 +00:00
Dmitry Chagin
e5d81ef1b5 Extend struct sysvec with new method sv_schedtail, which is used for an
explicit process at fork trampoline path instead of eventhadler(schedtail)
invocation for each child process.

Remove eventhandler(schedtail) code and change linux ABI to use newly added
sysvec method.

While here replace explicit comparing of module sysentvec structure with the
newly created process sysentvec to detect the linux ABI.

Discussed with:	kib

MFC after:	2 Week
2011-03-08 19:01:45 +00:00
Jayachandran C.
1e4b58070b Increase NKPT in case of n32 and n64 to support more physical memory.
On n32, vm_page_startup() needs more virtual mem to map vm_page structs.
The new value of 256 will allow us to support 16GB RAM.
2011-03-01 04:21:56 +00:00
Jayachandran C.
0474933dcc Use new thread's stack to invoke pmap_activate in cpu_switch()
Restore the SP from the new thread's PCB before calling pmap_activate.
Remove some old FIXME comments.
2011-03-01 03:25:18 +00:00
Jayachandran C.
7d66f0801b Use correct types and fromats for physical address
- Use vm_paddr_t for pa in pmap_steal_memory()
- Use uintmax_t and %jx to ensure that physical address are printed
  correctly in cpu_startup() and pmap_bootstrap()
2011-02-28 21:33:26 +00:00
Jayachandran C.
daa7be0b2e Use vm_offset_t for virtual addresses.
The unsigned int type used now is incorrect in n64 compilation.
2011-02-28 20:55:41 +00:00
Rebecca Cran
6bccea7c2b Fix typos - remove duplicate "the".
PR:	bin/154928
Submitted by:	Eitan Adler <lists at eitanadler.com>
MFC after: 	3 days
2011-02-21 09:01:34 +00:00
Alan Cox
e6ffa21488 Remove pmap fields that are either unused or not fully implemented.
Discussed with:	kib
2011-02-17 15:36:29 +00:00
Juli Mallett
cb2096acbf The Lanner MR-730 uses the first two MACs at its MAC base for the 10/100
management ports, and gigabit ports start at an offset of 2 from the MAC
base.
2011-02-12 02:41:33 +00:00
Juli Mallett
1591f3f18c Allow the platform code to return a bitmask of running cores rather than just
a number of cores, this allows for a sparse set of CPUs.  Implement support
for sparse core masks on Octeon.

XXX jeff@ suggests that all_cpus should include cores that are offline or
    running other applications/OSes, so the platform API should be further
    extended to allow us to set all_cpus to include all cores that are
    physically-present as opposed to only those that are running FreeBSD.

Submitted by:	Bhanu Prakash (with modifications)
Reviewed by:	jchandra
Glanced at by:	kib, jeff, jhb
2011-02-12 02:08:24 +00:00
Juli Mallett
70019a0be7 o) Cavium Octeon doesn't need nop barriers.
o) Have mips_wblush just do syncw, not sync on Cavium Octeon.
o) Add support for reading and writing some Octeon-specific registers.
   NB: Some of these are not entirely Octeon-specific.

Submitted by:	Bhanu Prakash
2011-02-06 22:21:18 +00:00
Tijl Coosemans
4e518ddb21 Replace __LP64__ with __mips_n64. This partly reverts r217147.
Requested by:	jmallett, imp
Approved by:	kib (mentor)
2011-02-04 13:09:46 +00:00
Matthew D Fleming
08b163fa51 Put the general logic for being a CPU hog into a new function
should_yield().  Use this in various places.  Encapsulate the common
case of check-and-yield into a new function maybe_yield().

Change several checks for a magic number of iterations to use
should_yield() instead.

MFC after:	1 week
2011-02-02 16:35:10 +00:00
Jayachandran C.
21835e695a Implement sf_buf using direct map (XKPHYS) in MIPS n64.
- Provide trivial implementation of sf_buf_alloc(), sf_buf_free(),
  sf_buf_kva() and sf_buf_page() using direct map for n64.
- uio_machdep.c - use macros so that the direct map will be used in
  case of n64.

Reviewed by:	imp (earlier version)
Obtained from:	jmallett (user/jmallett/octeon)
2011-01-27 14:49:22 +00:00
Sergey Kandaurov
4053b05b91 Make MSGBUF_SIZE kernel option a loader tunable kern.msgbufsize.
Submitted by:	perryh pluto.rain.com (previous version)
Reviewed by:	jhb
Approved by:	kib (mentor)
Tested by:	universe
2011-01-21 10:26:26 +00:00
Juli Mallett
2e2b4ad457 If there is no WQE available for a packet that needs segmentation, drop it
and return.
2011-01-20 23:51:03 +00:00
Juli Mallett
3e46966ed3 Remove some compile-time options from the driver, particularly async IOBDMA
support which is unused on FreeBSD and which complicates working on the
code now, can easily be added back later by someone determined to use it.
2011-01-20 23:34:59 +00:00
Warner Losh
266a41b11e Use simplified ldscripts rather than specific ones 2011-01-20 19:17:05 +00:00
Jayachandran C.
8026971f99 Move 'cpu CPU_RMI' to std.xlr, this is common for all XLR cpus. 2011-01-20 12:45:29 +00:00
Jayachandran C.
e91c7635e9 Re-format XLR configuartion files and remove obsolete options. 2011-01-20 09:01:14 +00:00
Jayachandran C.
c400881470 ldscript and conf cleanup for MIPS
- Remove sys/conf/ldscript.mips.64 and sys/conf/ldscript.mips.n32 and use
  ldscript.mips for all ABIs. The default OUTPUT_FORMAT of the toolchain
  is correct.
- Remove LDSCRIPT_NAME entires from XLR n32 and n64 conf files.
- Remove TARGET_BIG_ENDIAN from XLR conf files.
- Fix machine entry in XLRN32
2011-01-20 08:15:11 +00:00
Jayachandran C.
1104442832 Fixes in the XLR platform code
- Fix bug in pic.h, assign reg variable, before return.
- In xlr_pci.c, need to ignore the result of mmio read.
2011-01-20 08:08:19 +00:00
Oleksandr Tymoshenko
eb46a7a590 Fix build by changing format for size_t to %jd 2011-01-20 05:44:36 +00:00
Matthew D Fleming
cbc134ad03 Introduce signed and unsigned version of CTLTYPE_QUAD, renaming
existing uses.  Rename sysctl_handle_quad() to sysctl_handle_64().
2011-01-19 23:00:25 +00:00
Juli Mallett
166bee2858 Fix format of physical addresses; this fixes the n32 build. 2011-01-19 21:45:40 +00:00
Juli Mallett
2a05a35c57 Don't do a device_identify to add uart0, it's already hinted.
Reported by:	imp
2011-01-19 07:06:28 +00:00
Konstantin Belousov
55aabb7fd1 For architectures not using direct map , and requiring real KVA page for
sf buf allocation, use wakeup() instead of wakeup_one() to notify sf
buffer waiters about free buffer.

sf_buf_alloc() calls msleep(PCATCH) when SFB_CATCH flag was given,
and for simultaneous wakeup and signal delivery, msleep() returns
EINTR/ERESTART despite the thread was selected for wakeup_one(). As
result, we loose a wakeup, and some other waiter will not be woken up.

Reported and tested by:	az
Reviewed by:	alc, jhb
MFC after:	1 week
2011-01-18 21:57:02 +00:00
Jung-uk Kim
bc35e60ec0 Remove empty dev_mem_md_init() stubs. 2011-01-17 23:06:47 +00:00
Warner Losh
f381c26847 Save the CPU model, the board and the CPU clock rate so they are reported by
the approrpiate sysctl.
2011-01-17 23:03:09 +00:00
Warner Losh
5d8f773b87 Kill redundant cpu line 2011-01-17 23:00:23 +00:00
Warner Losh
b54e5c906c Make cpu_model public (otherwise there's no way to set it) and bump it
to 80 characters.
Add hw.board to export board information, if known, from the mips kernel.
2011-01-17 22:58:41 +00:00
Jung-uk Kim
2fea643112 Add reader/writer lock around mem_range_attr_get() and mem_range_attr_set().
Compile sys/dev/mem/memutil.c for all supported platforms and remove now
unnecessary dev_mem_md_init().  Consistently define mem_range_softc from
mem.c for all platforms.  Add missing #include guards for machine/memdev.h
and sys/memrange.h.  Clean up some nearby style(9) nits.

MFC after:	1 month
2011-01-17 22:58:28 +00:00
Jayachandran C.
611f086953 Support for 64 bit PTEs on n32 and n64 compilation.
In n32 and n64, add support for physical address above 4GB by having
64 bit page table entries and physical addresses. Major changes are:
- param.h: update PTE sizes, masks and shift values to support 64 bit PTEs.
- param.h: remove DELAY(), mips_btop(same as atop), mips_ptob (same as
  ptoa), and reformat.
- param.h: remove casting to unsigned long in trunc_page and round_page
  since this will be used on physical addresses.
- _types.h: have 64 bit __vm_paddr_t for n32.
- pte.h: update TLB LO0/1 access macros to support 64 bit PTE
- pte.h: assembly macros for PTE operations.
- proc.h: md_upte is now 64 bit for n32 and n64.
- exception.S and swtch.S: use the new PTE macros for PTE operations.
- cpufunc.h: TLB_LO0/1 registers are 64bit for n32 and n64.
- xlr_machdep.c: Add memory segments above 4GB to phys_avail[] as they are
  supported now.

Reviewed by:	jmallett (earlier version)
2011-01-13 15:17:29 +00:00
Jayachandran C.
0dd873372a Cleanup physical address and PTE types on MIPS.
1. Use vm_paddr_t for physical addresses.

There are a few places in the MIPS platform code where vm_offset_t is
used for physical addresses, change these to use vm_paddr_t:
- phys_avail[], physmem_desc[] arrays
- pmap_mapdev(), page_is_managed(), is_cacheable_mem() pmap_map() args
- local variables of various pmap functions

2. Change init_pte_prot() return from int to pt_entry_t, as this can be
64 bit when using 64 bit TLB entries.

3. Update printing of pt_entry_t and of vm_paddr_t to use 'j' format with
uintmax_t. This will be useful later if we plan to use 64bit phsical addr
on 32 bit n32 compilation.

Reviewed by:	imp
2011-01-13 06:48:43 +00:00
Jayachandran C.
ab7a71f6e7 The message ring interrupt needs to be enabled for all cpus, not just
the ones which run the message ring handler.

Some bits of the interrupt mask are part of the status register which is
saved with the process context, and these bits are initialized from the
cpu on which the process is created. This means that all the processes
should have the same value for these interrupt mask bits, so that the
interrupt mask remains the same regardless of what thread is scheduled
on the cpu.

Submitted by:	Sriram Gorti (srgorti at netlogicmicro dot com)
2011-01-12 13:16:35 +00:00
John Baldwin
58ccf5b41c Remove unneeded includes of <sys/linker_set.h>. Other headers that use
it internally contain nested includes.

Reviewed by:	bde
2011-01-11 13:59:06 +00:00
Juli Mallett
610803e3f5 Initialize PCIe buses and add preliminary support for 64-bit BARs. 2011-01-11 02:37:58 +00:00
Juli Mallett
449cf853ac Count output bytes and packets. 2011-01-10 22:14:30 +00:00
Juli Mallett
b37ccb6a0c Shorten device name so it fits into vmstat -i. 2011-01-10 22:14:08 +00:00
Juli Mallett
b15aff0da5 o) Free mbufs in error cases.
o) Clear/acknowledge receive interrupt at end of thread.  This gives the
   management interfaces performance on the order of 100Mbps rather than
   the previous level of 10Mbps on my MR-730.
2011-01-10 06:46:18 +00:00
Juli Mallett
15fe2454ae o) Expand the CIU driver to be aware of newly-allocated parts of the IRQ range.
o) Add 'octm', a trivial driver for the 10/100 management ports found on some
   Octeon systems.
o) Make the Simple Executive's management port helper routines compile on
   FreeBSD (namely by not doing math on void pointers.)
o) Add a cvmx_mgmt_port_sendm routine to the Simple Executive to send an mbuf
   so there is only one copy in the transmit path, rather than having to first
   copy the mbuf to an intermediate buffer and then copy that to the Simple
   Executive's transmit ring.
o) Properly work out MII addresses of management ports on the Lanner MR-730.
   XXX The MR-730 also needs some patches to the MII read/write routines, but
       this is sufficient for now.  Media detection will be fixed in the future
       when I can spend more time reading the vendor-supplied patches.
2011-01-10 03:48:41 +00:00
Juli Mallett
987da28eb7 Now that we correctly enable rx interrupts on all cores, performance has gotten
quite awful, because e.g. 4 packets will come in and get processed on 4
different cores at the same time, really battling with the TCP stack quite
painfully.  For now, just run one task at a time.

This gets performance up in most cases to where it was before the correctness
fixes that got interrupts to run on all cores (except in high-load TCP transmit
cases where all we're handling receive for is ACKs) and in some cases it's
better now.  What would be ideal would be to use a more advanced interrupt
mitigation strategy and possibly to use different workqueue groups per port for
multi-port systems, and so on, but this is a fine stopgap.
2011-01-09 23:46:24 +00:00
Juli Mallett
529fb1406b o) Remove some unused local definitions of IP protocol numbers.
o) Use CPU_FOREACH rather than a miscrafted for loop with an off-by-one to
   enable workq interrupts on all cores.
2011-01-09 23:05:46 +00:00
Konstantin Belousov
50a57dfbec Move repeated MAXSLP definition from machine/vmparam.h to sys/vmmeter.h.
Update the outdated comments describing MAXSLP and the process
selection algorithm for swap out.

Comments wording and reviewed by:	alc
2011-01-09 12:50:44 +00:00
Adrian Chadd
8779d9c963 Add missing ar91xx definition for the WMAC reset control. 2011-01-09 06:17:46 +00:00
Tijl Coosemans
f65742b27b White space changes to align comments. The mips and powerpc _inttypes.h
are now exactly the same.

Approved by:	kib (mentor)
2011-01-08 18:02:46 +00:00
Tijl Coosemans
9821039a64 Rename PRIreg helper macro to PRIptr to better reflect its use. Registers
and pointers don't always have the same size, e.g. the __mips_n32 ABI
(ILP32) has 64 bit registers but 32 bit pointers.

On mips introduce PRIptr to fix the format specifier for (u)intptr_t.

Prefix PRI64 and PRIptr with underscores because macro names starting with
PRI[a-zX] are reserved for future use.

Approved by:	kib (mentor)
2011-01-08 18:00:19 +00:00
Tijl Coosemans
a56e818f29 On mixed 32/64 bit architectures (mips, powerpc) use __LP64__ rather than
architecture macros (__mips_n64, __powerpc64__) when 64 bit types (and
corresponding macros) are different from 32 bit. [1]

Correct the type of INT64_MIN, INT64_MAX and UINT64_MAX.

Define (U)INTMAX_C as an alias for (U)INT64_C matching the type definition
for (u)intmax_t. Do this on all architectures for consistency.

Suggested by:	bde [1]
Approved by:	kib (mentor)
2011-01-08 12:43:05 +00:00
Tijl Coosemans
d942996baf On 32 bit architectures define (u)int64_t as (unsigned) long long instead
of (unsigned) int __attribute__((__mode__(__DI__))). This aligns better
with macros such as (U)INT64_C, (U)INT64_MAX, etc. which assume (u)int64_t
has type (unsigned) long long.

The mode attribute was used because long long wasn't standardised until
C99. Nowadays compilers should support long long and use of the mode
attribute is discouraged according to GCC Internals documentation.

The type definition has to be marked with __extension__ to support
compilation with "-std=c89 -pedantic".

Discussed with:	bde
Approved by:	kib (mentor)
2011-01-08 11:47:55 +00:00
Tijl Coosemans
9858863cd4 Fix types of some values in machine/_limits.h.
On some architectures UCHAR_MAX and USHRT_MAX had type unsigned int.
However, lacking integer suffixes for types smaller than int, their type
should correspond to that of an object of type unsigned char (or short)
when used in an expression with objects of type int. In that case unsigned
char (short) are promoted to int (i.e. signed) so the type of UCHAR_MAX and
USHRT_MAX should also be int.

Where MIN/MAX constants implicitly have the correct type the suffix has
been removed.

While here, correct some comments.

Reviewed by:	bde
Approved by:	kib (mentor)
2011-01-08 11:13:34 +00:00
Tijl Coosemans
911127a0d6 Remove unused support for 64 bit long on 32 bit architectures.
It was used mainly to discover and fix some 64-bit portability problems
before 64-bit arches were widely available.

Discussed with:	bde
Approved by:	kib (mentor)
2011-01-07 22:57:31 +00:00
Konstantin Belousov
39198f15ee Add AT_STACKPROT elf aux vector. Will be used to inform rtld about the
initial stack protection set by the kernel image activator.
2011-01-07 14:22:34 +00:00
John Baldwin
c305730dc0 Remove bogus usage of INTR_FAST. "Fast" interrupts are now indicated by
registering a filter handler rather than a threaded handler.  Also remove
a bogus use of INTR_MPSAFE for a filter.
2011-01-06 21:08:06 +00:00
Juli Mallett
ab19dbcf8d Correct an 8-year-old typo which reliably leads to typo after typo today:
The macros here for generating coprocessor 0 accessors are named like:

	MIPS_RDRW32_COP0

That macro would produce mips_rd_<register>() and mips_wr_<register>()
inlines to access the specified register by name from C.  The problem is that
the R and the W were swapped in the macros originally; it was meant to be named
RDWR because it generated mips_rd_* and mips_wr_* functions, but was instead
spelled RDRW, which nobody should be expected to get right by anything other
than copy and paste.

It's too many consonants in a row to keep straight anyway, so just prefer e.g.:

	MIPS_RW32_COP0

While here, add a missing #undef.
2011-01-04 19:32:03 +00:00
Juli Mallett
9a264080b5 Remove OCTEON1-32. Since moving to the Cavium SDK, we've lost our support for
running an o32 kernel safely, and would have to add interrupt disabling and
reenabling to a bunch of macros in the Simple Executive sources to support it.

The only reason one would run an o32 kernel on Octeon would be to run o32 world,
which is better worked towards by adding o32 binary compatibility to n64 kernels
along with, eventually, supporting multilib systems so o32 binaries can run
alongside n32 and n64 ones.

Discussed with:	imp
2011-01-04 19:09:05 +00:00
Juli Mallett
7b62328843 o) Add MIPS_COP_0_EXC_PC accessors to <machine/cpufunc.h>.
o) Make the octeon_wdog driver work on multi-CPU systems and to also print more
   information on NMI that may aid debugging.  Simplify and clean up internal
   API and structure.
2011-01-04 02:33:48 +00:00
Juli Mallett
5308af6337 o) Unmask Central Interrupt Unit interrupts on APs, too.
o) There's no good reason to make the low bits of the ebase the core
   number.  While per-CPU exception bases would be nice, for now we just
   need to make ebase the same on all cores.
2011-01-04 02:11:03 +00:00
Juli Mallett
5610751bf1 o) When trying to determine whether the pcpu pointer is a managed address, check
not just that it is greater than the minimal kernel virtual address, but also
   that it is less than the maximal kernel virtual address.  On n64 kernels, the
   pcpup comes out of a direct-mapped address that, with an unsigned compare, is
   rather greater than the minimal kernel virtual address.
o) Turn the panic if interrupts are disabled in cpu_idle into a KASSERT since on
   other architectures it's behind INVARIANTS anyway.
o) Add a check that not all interrupts are masked, too.
o) Add cpu_idleclock() and cpu_activeclock() use to cpu_idle as is done on other
   architectures.
2011-01-01 00:20:14 +00:00
Juli Mallett
1dadcedcfc When allocating memory from bootmem for the kernel to use, try to leave about
2MB of memory in the bootmem allocator for the SDK to use internally at a later
point.  It'd be nice if there were some functions we could call before
allocating memory to let various facilities reserve some memory, but for now
this seems sufficient.  Previously some unfortunate systems could give up all
(or at least most) of their memory to the kernel from bootmem, and then
allocating command queues for packet output and the like would fail later in
the boot process (which in turn would lead to crashes even later.)

Reported by:	kan
2010-12-28 20:11:54 +00:00
Nathan Whitehorn
886a0c5b95 Include std.sentry5 from the SENTRY5 kernel configuration. This was
apparently missed in r215270.
2010-12-22 19:01:48 +00:00
Juli Mallett
4a7b75273b o) Add support for the Lanner MR-321X/MR-325, which is just a modified MR-320.
o) On the Lanner MR-730, disable PCIe lane swap, per vendor.
2010-12-16 07:20:38 +00:00
Oleksandr Tymoshenko
3693ce5732 - include argument should be in quotes 2010-12-16 05:13:41 +00:00
Jayachandran C.
d048eaaca7 Make the ELF trampoline binary ELF executable (and do some cleanup).
- Remove the -shared flag for the trampoline binary, generate an
  ELF executable instead of a shared object.
- No need to generate tmphack.S,  move the code to sys/mips/mips/inckern.S
- No need generate opt_kernname.h, KERNNAME can be passed with -D

Reviewed by:	gonzo, imp
2010-12-16 04:56:03 +00:00
Jayachandran C.
d0beb2c412 Updates for I2C devices on XLR engg boards.
- ds1374u : use multi-byte write.
- at24co2n, max6657: remove mutex, iicbus has the necessary locking.

Submitted by:	Sreekanth M. S. (kanthms at netlogicmicro com)
2010-12-13 17:53:38 +00:00
Andriy Gapon
bc8022ea4a fix mips build breakage introduced in r216375: atomic_store_int doesn't exists
1) 32-bit assignment are expected to always be atomic.
2) Release/acquire memory barrier semantics doesn't seem to be needed here.
So a simple assignment can be used.

Remove unused port_set_counter() while here, it also used to mis-use
atomic_set_int().

Reported by:	jhb
Pointyhat to:	avg
MFC after:	3 weeks
2010-12-13 14:30:35 +00:00
Jayachandran C.
3ba09158c8 I2C drivers for XLR/XLS processors.
- Major update to xlr_i2c.c: do multi-byte ops correctly, remove unnecessary
  code, add mutex to protect bus operations, style(9) fixes.
- Drivers for I2C devices on XLR/XLS engineering boards, ds1374u RTC, max6657
  temparature sensor and at24co2n EEPROM.

Submitted by:	Sreekanth M. S. (kanthms at netlogicmicro com)
2010-12-12 06:00:26 +00:00
Andriy Gapon
4fa9db8da0 fix atomic_set_xxx misuse in rge
It seems that atomic_set_xxx and atomic_store_xxx were confused.

Reviewed by:	jhb (general issue)
MFC after:	3 weeks
2010-12-11 10:21:38 +00:00
Jayachandran C.
96417c3f8c Fix compilation when DEBUG option is enabled.
- remove unused code in mips/rmi/xlr_pci.c
- remove unused variable in mips/rmi/dev/nlge/if_nlge.c
- fix reference to old function in mips/mips/pmap.c

Reported by:	Prabhath Raman (prabhath at netlogicmicro com)
2010-12-09 12:30:13 +00:00
Oleksandr Tymoshenko
bd01e50ca0 - dump_avail layout should be sequence of [start, end)
pairs, not <start, size>.

Spotted by: alc@
2010-12-09 07:47:40 +00:00
Oleksandr Tymoshenko
99629fa36d - Populate dump_avail with proper values from phys_avail 2010-12-09 07:01:03 +00:00
Jayachandran C.
aa93efedd8 swi_vm() for mips. 2010-12-09 06:54:06 +00:00
Jayachandran C.
6264198089 UMA_MD_SMALL_ALLOC for mips.
Implement uma_small_alloc() and uma_small_free() for mips that allocates
pages from direct mapped memory. Uses the same mechanism as the page table
page allocator, so that we allocate from KSEG0 in 32 bit, and from XKPHYS
on 64 bit.

Reviewed by:	alc, jmallett
2010-12-09 06:34:28 +00:00
Kevin Lo
7df9d5acad Fix double ;; 2010-12-06 10:24:06 +00:00
Jayachandran C.
63ae6e6018 1. Fix off by one errors in calls to MIPS_DIRECT_MAPPABLE, reported by alc@
2. Remove unnecessary #defines from vmparam.h

Submitted by:	alc (2)
Reviewed by:	alc (1)
2010-12-03 19:22:18 +00:00
Jayachandran C.
42b73858e9 Fixup for r216141, dump_add_page needs to be non-static now.
Add it to sys/mips/include/md_var.h, make dump_drop_page non-static too
for completeness.
2010-12-03 14:20:20 +00:00
Rebecca Cran
c90f7d9b44 Revert r216134. This checkin broke platforms where bus_space are macros:
they need to be a single statement, and do { } while (0) doesn't work in this
situation so revert until a solution can be devised.
2010-12-03 07:09:23 +00:00
Rebecca Cran
15b4888a24 Disallow passing in a count of zero bytes to the bus_space(9) functions.
Passing a count of zero on i386 and amd64 for [I386|AMD64]_BUS_SPACE_MEM
causes a crash/hang since the 'loop' instruction decrements the counter
before checking if it's zero.

PR:	kern/80980
Discussed with:	jhb
2010-12-02 22:19:30 +00:00
Juli Mallett
648260edcc Add interrupt describing and binding to CIU. 2010-12-01 05:24:29 +00:00
Juli Mallett
074a0a8d57 Run all poll requests through a single function that can either do the generic
link state polling or media-specific ones, while avoidiing changing link state
on interfaces that use miibus; this substantially speeds up link time on
interface (re)initialization.
2010-11-30 07:14:05 +00:00
Juli Mallett
6d903e0c7a Display some Octeon 2 features and a feature for distinguishing between PCIe
implementations.
2010-11-30 01:27:54 +00:00
Juli Mallett
b8248487b3 Don't free the work queue entry that we're using to hold the scatter-gather
list on exit from the transmit path.  The scatter-gather list itself can be
asynchronously DMAed to the transmit hardware, and we could actually lock up
the transmitter if any of a number of races around this were lost.

Instead, let the PKO free the scatter-gather list when it is done with it, and
use the "i" bit in each segment of the packet to avoid having them go into the
FPA.

This fixes an unrecoverable transmit stall under transmit load.

MFC after:	3 days
2010-11-29 21:04:00 +00:00
Juli Mallett
04b6fa8330 Merge Cavium Octeon SDK 2.0 Simple Executive; this brings some fixes and new
facilities as well as support for the Octeon 2 family of SoCs.

XXX Note that with our antediluvian assembler, we can't support some Octeon 2
    instructions and fall back to using the old ones instead.
2010-11-28 08:18:16 +00:00
Oleksandr Tymoshenko
006d0f38be - Add watchdog driver for Cavium Octeon. At the moment only
UP systems are supported.
2010-11-28 08:11:05 +00:00
Juli Mallett
34e3f53b7c o) Remove some commented out or unimplemented code.
o) Remove some options that are configurable on Linux but not FreeBSD.
o) Centralize open/poll/stop routines for XAUI and SGMII and use the common
   uninit routine directly rather than providing a wrapper for it.  The init
   functions for these interfaces are now identical and the common init routine
   could merge in setting those function pointers except that some hardware
   seems to use no open/poll/stop method?
2010-11-28 05:57:24 +00:00
Jayachandran C.
aa54636620 Fix issue noted by alc while reviewing r215938:
The current implementation of vm_page_alloc_freelist() does not handle
order > 0 correctly. Remove order parameter to the function and use it
only for order 0 pages.

Submitted by:	alc
2010-11-28 05:51:31 +00:00
Juli Mallett
2a89829bde Set MACHINE_ARCH based on ABI and endianness.
Reviewed by:	imp
2010-11-28 04:07:45 +00:00
Juli Mallett
ed11b5abe1 Remove unused and broken code to implement POW send and POW-only devices; a
separate POW driver makes more sense, generally.
2010-11-28 00:26:08 +00:00
Juli Mallett
25b0900026 Use if_transmit to avoid ifq locking in transmit path. 2010-11-27 22:42:41 +00:00
Jayachandran C.
1e8b029539 Use if_transmit method instead of if_start, this avoids the interface queue lock.
Use the hardware IP checksum verification on receive.

Submitted by:	Sriram Gorti (srgorti at netlogicmicro dot com)
2010-11-27 13:35:19 +00:00
Dimitry Andric
3e288e6238 After some off-list discussion, revert a number of changes to the
DPCPU_DEFINE and VNET_DEFINE macros, as these cause problems for various
people working on the affected files.  A better long-term solution is
still being considered.  This reversal may give some modules empty
set_pcpu or set_vnet sections, but these are harmless.

Changes reverted:

------------------------------------------------------------------------
r215318 | dim | 2010-11-14 21:40:55 +0100 (Sun, 14 Nov 2010) | 4 lines

Instead of unconditionally emitting .globl's for the __start_set_xxx and
__stop_set_xxx symbols, only emit them when the set_vnet or set_pcpu
sections are actually defined.

------------------------------------------------------------------------
r215317 | dim | 2010-11-14 21:38:11 +0100 (Sun, 14 Nov 2010) | 3 lines

Apply the STATIC_VNET_DEFINE and STATIC_DPCPU_DEFINE macros throughout
the tree.

------------------------------------------------------------------------
r215316 | dim | 2010-11-14 21:23:02 +0100 (Sun, 14 Nov 2010) | 2 lines

Add macros to define static instances of VNET_DEFINE and DPCPU_DEFINE.
2010-11-22 19:32:54 +00:00
Dimitry Andric
31c6a0037e Apply the STATIC_VNET_DEFINE and STATIC_DPCPU_DEFINE macros throughout
the tree.
2010-11-14 20:38:11 +00:00
Warner Losh
161b83b959 Remove the 'machine mips' from DEFAULTS. Put the proper 'machine mips
mipsel' or 'machine mips mipseb' into the config file (with a few 64's
tossed in for good measure).  This will let us build the proper
kernels with different worlds as part of make universe.
2010-11-13 22:34:12 +00:00
Jayachandran C.
2866e325de Switch to the new network driver nlge, the old rge driver is deprecated now. 2010-11-10 10:23:39 +00:00
Warner Losh
34a3fc34be rename SWARM_COMMON to std.SWARM so universe doesn't try to build it standalone 2010-11-10 00:28:20 +00:00
John Baldwin
961135ead8 - Remove <machine/mutex.h>. Most of the headers were empty, and the
contents of the ones that were not empty were stale and unused.
- Now that <machine/mutex.h> no longer exists, there is no need to allow it
  to override various helper macros in <sys/mutex.h>.
- Rename various helper macros for low-level operations on mutexes to live
  in the _mtx_* or __mtx_* namespaces.  While here, change the names to more
  closely match the real API functions they are backing.
- Drop support for including <sys/mutex.h> in assembly source files.

Suggested by:	bde (1, 2)
2010-11-09 20:46:41 +00:00
Rebecca Cran
b1ce21c6ef Fix typos.
PR:	bin/148894
Submitted by:	olgeni
2010-11-09 10:59:09 +00:00
Oleksandr Tymoshenko
bf39e6583e - Provide more registers for GDB 2010-11-08 00:26:49 +00:00
Oleksandr Tymoshenko
903ba3da86 - Add minidump support for FreeBSD/mips 2010-11-07 03:09:02 +00:00
John Baldwin
0108cce0a4 Adjust the order of operations in spinlock_enter() and spinlock_exit() to
work properly with single-stepping in a kernel debugger.  Specifically,
these routines have always disabled interrupts before increasing the nesting
count and restored the prior state of interrupts after decreasing the nesting
count to avoid problems with a nested interrupt not disabling interrupts
when acquiring a spin lock.  However, trap interrupts for single-stepping
can still occur even when interrupts are disabled.  Now the saved state of
interrupts is not saved in the thread until after interrupts have been
disabled and the nesting count has been increased.  Similarly, the saved
state from the thread cannot be read once the nesting count has been
decreased to zero.  To fix this, use temporary variables to store interrupt
state and shuffle it between the thread's MD area and the appropriate
registers.

In cooperation with:	bde
MFC after:     1 month
2010-11-05 13:42:58 +00:00
Juli Mallett
4ad7c12b2c Don't attach the PCI bus driver if the board we're being run on has PCIe. The
two are mutually-exclusive on Octeon.
2010-11-03 23:29:52 +00:00
Juli Mallett
bc41e12963 Declare the CF GEOM class so that g_modevent will get called, the class will
be recorded, etc.  This fixes libgeom on Octeon.
2010-11-02 23:43:44 +00:00
Jayachandran C.
7850efa68d Network driver updates
- Fix network driver issue on a XLS eval board (major# 8).
- Fix issue uncovered by r213475 in check for XGMII

Submitted by:	Sriram Gorti (srgorti at netlogicmicro dot com)
2010-10-20 09:50:11 +00:00
Jayachandran C.
18ad6a4db2 On uniprocessor, warn and fixup hardware cpu mask if more than on CPU
is enabled by the bootloader.
2010-10-20 09:41:36 +00:00
Marius Strobl
d6c65d276e Converted the remainder of the NIC drivers to use the mii_attach()
introduced in r213878 instead of mii_phy_probe(). Unlike r213893 these
are only straight forward conversions though.

Reviewed by:	yongari
2010-10-15 15:00:30 +00:00
Marius Strobl
8e5d93dbb4 Convert the PHY drivers to honor the mii_flags passed down and convert
the NIC drivers as well as the PHY drivers to take advantage of the
mii_attach() introduced in r213878 to get rid of certain hacks. For
the most part these were:
- Artificially limiting miibus_{read,write}reg methods to certain PHY
  addresses; we now let mii_attach() only probe the PHY at the desired
  address(es) instead.
- PHY drivers setting MIIF_* flags based on the NIC driver they hang
  off from, partly even based on grabbing and using the softc of the
  parent; we now pass these flags down from the NIC to the PHY drivers
  via mii_attach(). This got us rid of all such hacks except those of
  brgphy() in combination with bce(4) and bge(4), which is way beyond
  what can be expressed with simple flags.

While at it, I took the opportunity to change the NIC drivers to pass
up the error returned by mii_attach() (previously by mii_phy_probe())
and unify the error message used in this case where and as appropriate
as mii_attach() actually can fail for a number of reasons, not just
because of no PHY(s) being present at the expected address(es).

Reviewed by:	jhb, yongari
2010-10-15 14:52:11 +00:00
Juli Mallett
2bcbafd6be Keep polling at 50hz as long as link state is changing. 2010-10-13 21:45:56 +00:00
Juli Mallett
f05957f7c6 o) Make it possible to attach a PHY directly to an octe device rather than
using miibus, since for some devices that use multiple addresses on the bus,
   going through miibus may be unclear, and for devices that are not standard
   MII PHYs, miibus may throw a fit, necessitating complicated interfaces to
   fake the interface that it expects during probe/attach.
o) Make the mv88e61xx SMI interface in octe attach a PHY directly and fix some
   mistakes in the code that resulted from trying too hard to present a nice
   interface to miibus.
o) Add a PHY driver for the mv88e61xx.  If attached (it is optional in kernel
   compiles so the default behavior of having a dumb switch is preserved) it
   will place the switch in a VLAN-tagging mode such that each physical port
   has a VLAN associated with it and interfaces for the VLANs can be created to
   address or bridge between them.
   XXX It would be nice for this to be part of a single module including the
       SMI interface, and for it to fit into a generic switch configuration
       framework and for it to use DSA rather than VLANs, but this is a start
       and gives some sense of the parameters of such frameworks that are not
       currently present in FreeBSD.  In lieu of a switch configuration
       interface, per-port media status and VLAN settings are in a sysctl tree.
   XXX There may be some minor nits remaining in the handling of broadcast,
       multicast and unknown destination traffic.  It would also be nice to go
       through and replace the few remaining magic numbers with macros at some
       point in the future.
   XXX This has only been tested with the MV88E6161, but it should work with
       minimal or no modification on related switches, so support for probing
       them was included.

Thanks to Pat Saavedra of TELoIP and Rafal Jaworowski of Semihalf for their
assistance in understanding the switch chipset.
2010-10-13 09:17:44 +00:00
Jayachandran C.
8d4380adbf PCI fix for XLR C revision chips, limit DMA address to the first 2GB
physical address.  Adds a dma tag to the XLR/XLS pci bus with the
lowaddr if the CPU happens to be a XLR C rev.

Submitted by:	Sreekanth M. S. (kanthms at netlogicmicro dot com))
2010-10-06 15:37:55 +00:00
Jayachandran C.
49f4ceab51 XLR/XLS network driver (nlge) updates:
- nlge_ioctl handles IFF_UP and IFF_PROMISC flags
- Translate table code, to enable flow based CPU assignment added
  disabled by default (can be enabled by a tunable).
- Changed signature of nlge_port_disable to make it consistent with nlge_port_enable
- Removed TXCSUM and VLAN_HW_TAGGING from i/f capabilities.

Submitted by:	Sriram Gorti (srgorti at netlogicmicro dot com)
2010-10-06 08:15:28 +00:00
Jayachandran C.
a5e14d3c15 Fix n64 compile. 2010-10-06 08:09:39 +00:00
Jayachandran C.
8cd156782f Network driver support for more XLR/XLS chip versions.
Obtained from:	Sriram Gorti (srgorti at netlogicmicro dot com)
2010-10-05 07:41:59 +00:00
Jayachandran C.
8878298b7a Clear any pending interrupts after disabling FMN interrupts. Add debugging
sysctl and counters for message ring threads (intial version). Update
watermark values, and and decrease the maximum threads to 3 (this will leave
a few CPUs for other processes)

Minor comment fix in nlge.
2010-10-05 06:44:47 +00:00
Jayachandran C.
2859cf2ad2 Fix asm for XKPHYS read for o32, constriants needed for input registers
that are clobbered.  Fixes a crash when compiled without DEBUG
2010-10-05 05:49:38 +00:00
Jayachandran C.
b0a36f6a91 Update message ring handling code for XLR/XLS
- Wakeup multiple threads per core using message ring watermark interrupts.
- Update message ring handler registration, use the real device station id
  for registering interrupts.
- rge/nlge: update for the new message ring registration code.
- rge/nlge: use 2 message ring stations for incoming packets, this will
  allow more messages to be queued.
- nlge: comment fixes, remove unused variable
- style and whitespace fixes
2010-10-03 04:33:58 +00:00
Juli Mallett
a22b69b772 o) Allow devices to override the MDIO read and write functions presented to
the miibus attached to octe interfaces.
o) Add an SMI/MDIO interface to the MV88E61XX and use it for the switch PHY on
   the Lanner MR-320.  An actual driver for the switch PHY will come later.
   Note that for now it intercepts and fakes MII_BMSR reads to prevent the
   miibus from talking to anything but the switch itself.
2010-10-02 05:43:17 +00:00
Juli Mallett
41341ca726 Rather than shifting offsets by three, set register offset to 3. All our
bus interface does that's special here now is to use a 64-bit register size.
In theory, uart(4) ought to support a regsz as well as regshft and support
64-bit registers directly.

Also use the UART class's range rather than a hand-coded 1024 for the address
range.
2010-10-02 05:38:45 +00:00
Juli Mallett
331b3c24e3 Use ABI-aware macros for setting up a fake frame. 2010-10-02 01:29:09 +00:00
Juli Mallett
50cfdcbd6f Remove extra cpu setting and commented-out devices, some of which don't exist. 2010-10-02 01:28:18 +00:00
Juli Mallett
2e9de9047c Make the OCTEON1 configuration look like a normal GENERIC configuration. In
particular, add PCI and USB buses and most devices.  Also move to using ULE,
adding INET6, turning on WITNESS by default, etc.
2010-10-02 01:24:20 +00:00
Oleksandr Tymoshenko
8c01516d7e - Fix values of CS1_EN and CS2_EN flags
- Unbreak kernel build by fixing naming convention of
    GPIO_FUNC flags

Spotted by: Luiz Otavio O Souza, Andrew Thompson
2010-09-29 23:06:41 +00:00
Oleksandr Tymoshenko
da5c5453e7 AR71XX_GPIO_* defines were introduced by adrian@ a while ago,
remove duplicated.
2010-09-29 21:01:16 +00:00
Oleksandr Tymoshenko
02285b4e88 Add GPIO bus to config and hints. Also add sample gpioled device. 2010-09-28 03:34:51 +00:00
Oleksandr Tymoshenko
0dfca27f07 Add AR71XX GPIO bus driver. 2010-09-28 03:31:34 +00:00
Juli Mallett
62f24c60ef Give devices lots of time to settle around programming BARs and command
registers.  Without this, the settings do not seem to stick for Atheros NICs in
the PCI slot of the Lanner MR-320.
2010-09-27 20:35:40 +00:00
Juli Mallett
a71199dab4 o) Program the Lanner MR-320 for 32-bit mode, too.
o) Give a virtual address for I/O ports on n64.
o) On the Portwell CAM-0100, return the right IRQ for the on-board SATA.
o) Except on bridges, only set PORTEN and MEMEN on devices that have I/O or
   memory BARs respectively.
o) Disable PORTEN and MEMEN while reprogramming BARs.
o) On the Lanner MR-955, set the Tx DMA power register for the on-board Promise
   SATA controller.
2010-09-27 20:12:57 +00:00
Jayachandran C.
da4dad492d XLS B0 revision PCI support and related changes.
- XLS B0 and later revision chips have PCIe link 2 & 3 mapped to different
  PIC interrupts. Update pic.h, board.h and xlr_pci.c to reflect this.
- remove debug prints in xlr_pci.c
- add more processor IDs to board.h, add function xlr_is_xls_b0()
- some style(9) and whitespace fixes
2010-09-27 14:50:51 +00:00
Juli Mallett
243ee7e777 o) Send mbufs to BPF listeners from within cvm_oct_xmit().
o) Pin receive threads when they're running since we do access some core-local
   resources.
2010-09-25 04:39:12 +00:00
Juli Mallett
1ea299ce0d Handle link updates in a task. 2010-09-25 01:18:01 +00:00
Juli Mallett
709d8161a6 Make the vast majority of Simple Executive files standard. Perhaps some of
these could be made dependent on either of the octusb or octe options, but
making them standard fixes a number of option combinations that were previously
broken.
2010-09-24 21:23:23 +00:00
Juli Mallett
a4f7e65822 o) Add bus_teardown_intr for pci and ciu. This allows the Promise SATA
driver to try to switch interrupt handlers at setup.  It's not a very
   good implementation of bus_teardown_intr, though.
o) Set cache line size and latency timers for PCI devices per Linux.
2010-09-24 02:41:52 +00:00
Juli Mallett
3032f6daa2 Flesh out PCI bus support some:
o) Reset and configure the bus from scratch rather than expecting U-Boot to
   do it for us.  Values and configuration from Linux, U-Boot and comments
   in the Cavium Simple Executive sources.
o) Do a resource assignment and bus numbering pass in the absence of a PCI
   BIOS or firmware that will do it for us.
   XXX This has to be the third or fourth instance of this in FreeBSD and
       it would be nice to have it become part of the PCI bus driver itself,
       like it is on Linux.
o) Fix interrupt mapping for and adjust bus configuration for the Lanner
   MR-955, based on information provided by Lanner.
2010-09-24 00:14:24 +00:00
Neel Natu
5df4b6be91 Enforce that 'pmap_kenter()' is only used to establish cacheable mappings.
Mappings with other cacheability attributes can be established, if needed,
by using 'pmap_kenter_attr()'.

Suggested by:	jchandra, imp
2010-09-22 02:26:07 +00:00
Jayachandran C.
f294c94440 n32 fixes for nlge.
Use correct define (__mips_n64) for n64 compilation and use correct
parameter type for xlr_paddr_lw() in n32.
2010-09-21 07:58:47 +00:00
Jayachandran C.
75e70f56a2 Add 64 bit support to nlge, and additional fixes
- 64 bit fixes for ifnlge.c
- Use m_nextpkt to save mbuf vaddr on 64 bit, we cannot store the
  64 bit vaddr  in the 40bit freeback field.
- remove unused code and unnecessary variables.
- use xlr_io_mmio macro instead of adding io base address
- rewrite GPIO related code to fixup nlge using xlr_write_reg and DELAY
- support for engg boards major num 11 and 12
- add xlr_paddr_lw() to load 32bit value from physical address, fix
  inline assembly
- style fixes
2010-09-20 11:53:57 +00:00
Juli Mallett
c0b690401a Fix to specify generic bus_add_child. 2010-09-19 09:18:27 +00:00
Juli Mallett
ed48d90907 Don't use memory that can't be direct-mapped on !n64. 2010-09-19 09:18:07 +00:00
Juli Mallett
e61d3369bf Fix octusb build. 2010-09-18 00:58:44 +00:00
Jayachandran C.
c42040571e Fixes for XLR network accelerator driver (nlge).
- Process some tx done messages in the transmit path, to ensure that
  the XLR NA tx done FIFO does not overflow.
- Add a message ring handler API to process atmost a given number of
  messages from a specified bucket mask. This will be used to process
  the tx done messages
- Add a callout to restart transmit in the case transmit gets blocked.
- Update enable_msgring_int() and disable_msgring_int(), remove unused
  args and make static.

Obtained from:	Sriram Gorti (srgorti at netlogicmicro dot com)
2010-09-17 10:28:10 +00:00
Neel Natu
2f78c3e5a0 Get rid of the unnecessary redirection of 'is_cacheable_mem()' to
'is_physical_memory()' through a macro.

Implement 'is_cacheable_mem()' directly instead.
2010-09-17 02:20:12 +00:00
Neel Natu
db1a9b7dfb Get rid of unused macros. 2010-09-17 02:14:21 +00:00
Andrew Thompson
08e58cc093 Make a note of which platforms the mac strings come from.
Suggested by:	adrian
2010-09-17 01:13:48 +00:00
Andrew Thompson
3441a301f2 Use getenv to find the mac address since it could be in the bootloader
environment or command line and under different names.
2010-09-17 01:09:12 +00:00
Jayachandran C.
bb15db8f16 RMI security accelerator driver update.
- Compile fixes for 9.0, the previous version of this driver was
  for FreeBSD 6.
- Add virtual address field in OperationDescriptor_t, we cannot use
  MIPS_PHYS_TO_KSEG0 on physical address.
- Fixes for new message ring API
- Remove unused sys/mips/rmi/dev/sec/stats.h
- Whitespace fixes
2010-09-16 20:23:22 +00:00
Jayachandran C.
f718138698 Update rge.h for r212758 - stats incremented using xlr_ldaddwu should be
unsigned int.
2010-09-16 19:25:24 +00:00
Jayachandran C.
f0613ab15b Network driver updates.
- Move RMI MIPS extension to atomic increment word (LDADDWU) to common
  header file sys/mips/rmi/rmi_mips_exts.h
- Fix xlr_ldaddwu() for 64 bit, it is a 32 bit operation, use
  unsigned int* instead of unsigned long* argument
- Provide dummy xlr_enable_kx/xlr_restore_kx for n32 and n64.
- Provide xlr_paddr_ld() instead of xlr_paddr_lw(), so that the
  descriptor formats are same for 32 and 64 bit
- update nlge and rge for the changes

These changes are also needed by the security driver which will be
added later.
2010-09-16 19:13:55 +00:00
Neel Natu
77a9cf6f2a Add 64-bit SWARM board kernel configs. 2010-09-15 05:32:10 +00:00
Neel Natu
391da75b41 Factor out the common parts of the swarm board in SWARM_COMMON and start
including that in SWARM and SWARM_SMP kernel configs.
2010-09-15 05:29:13 +00:00
Neel Natu
885b75a559 Make the meaning of the 'mask' argument to 'set_intr_mask(mask)' consistent
with the meaning of IM bits in the status register.

Reviewed by:	jmallett, jchandra
2010-09-15 05:10:50 +00:00
Neel Natu
c895b6e6ee Port r212559 to mips.
Do not explicitly enable interrupts in smp_init_secondary() because it
renders any spinlock protected code after that point to run with
interrupts enabled. This is because the processor is executing in the
context of idlethread whose 'md_spinlock_count' is already set to 1.

Instead just let sched_throw() re-enable interrupts when it releases
the spinlock.

The original powerpc commit log for r212559 is available here:
http://svn.freebsd.org/viewvc/base?view=revision&revision=212559
2010-09-14 01:48:01 +00:00
Neel Natu
b503d5c50e Enforce that pmap_mapdev() always returns uncacheable mappings.
Reviewed by:	imp, jchandra, jmallett
2010-09-14 01:27:53 +00:00
Warner Losh
747e7efda0 TARGET_64BIT isn't needed anymore, GC it (partial merge from tbemd). 2010-09-13 16:39:33 +00:00
Jayachandran C.
480f6157fb sys/mips/rmi/msgring.h - fixes and clean up.
- Remove sync from msgrng_send, sync needs to be called just once before
  sending.
- Fix retry logic - don't reload registers when retrying in message_send,
  also fix check for send pending fail.
- remove unused message_send_block_fast()
- merge message_receive_fast() to message_receive
- style(9) fixes, and comments
- rge and nlge updated for the sys/mips/rmi/msgring.h changes
2010-09-13 13:11:50 +00:00
Jayachandran C.
04a68e0904 bus_add_child method is needed now. 2010-09-13 11:47:35 +00:00
Alexander Motin
a157e42516 Refactor timer management code with priority to one-shot operation mode.
The main goal of this is to generate timer interrupts only when there is
some work to do. When CPU is busy interrupts are generating at full rate
of hz + stathz to fullfill scheduler and timekeeping requirements. But
when CPU is idle, only minimum set of interrupts (down to 8 interrupts per
second per CPU now), needed to handle scheduled callouts is executed.
This allows significantly increase idle CPU sleep time, increasing effect
of static power-saving technologies. Also it should reduce host CPU load
on virtualized systems, when guest system is idle.

There is set of tunables, also available as writable sysctls, allowing to
control wanted event timer subsystem behavior:
  kern.eventtimer.timer - allows to choose event timer hardware to use.
On x86 there is up to 4 different kinds of timers. Depending on whether
chosen timer is per-CPU, behavior of other options slightly differs.
  kern.eventtimer.periodic - allows to choose periodic and one-shot
operation mode. In periodic mode, current timer hardware taken as the only
source of time for time events. This mode is quite alike to previous kernel
behavior. One-shot mode instead uses currently selected time counter
hardware to schedule all needed events one by one and program timer to
generate interrupt exactly in specified time. Default value depends of
chosen timer capabilities, but one-shot mode is preferred, until other is
forced by user or hardware.
  kern.eventtimer.singlemul - in periodic mode specifies how much times
higher timer frequency should be, to not strictly alias hardclock() and
statclock() events. Default values are 2 and 4, but could be reduced to 1
if extra interrupts are unwanted.
  kern.eventtimer.idletick - makes each CPU to receive every timer interrupt
independently of whether they busy or not. By default this options is
disabled. If chosen timer is per-CPU and runs in periodic mode, this option
has no effect - all interrupts are generating.

As soon as this patch modifies cpu_idle() on some platforms, I have also
refactored one on x86. Now it makes use of MONITOR/MWAIT instrunctions
(if supported) under high sleep/wakeup rate, as fast alternative to other
methods. It allows SMP scheduler to wake up sleeping CPUs much faster
without using IPI, significantly increasing performance on some highly
task-switching loads.

Tested by:	many (on i386, amd64, sparc64 and powerc)
H/W donated by:	Gheorghe Ardelean
Sponsored by:	iXsystems, Inc.
2010-09-13 07:25:35 +00:00
Jayachandran C.
a3e0e990de The functions in sys/mips/mips/psraccess.S can be implemented with
mips_rd_status/mips_wr_status.  Implement them in mips/include/cpufunc.h,
and remove psraccess.S.

Reviewed by:	neel, imp
2010-09-13 05:03:37 +00:00
Andriy Gapon
3d844eddb7 bus_add_child: change type of order parameter to u_int
This reflects actual type used to store and compare child device orders.
Change is mostly done via a Coccinelle (soon to be devel/coccinelle)
semantic patch.
Verified by LINT+modules kernel builds.

Followup to:	r212213
MFC after:	10 days
2010-09-10 11:19:03 +00:00
Jayachandran C.
bfd7cd0131 Compilation fix - when INVARIANTS are turned off. 2010-09-10 07:06:06 +00:00
Jayachandran C.
2e4e56742e Clean up and update sys/mips/rmi/rmi_mips_exts.h
- Provide 64 bit implementations for some macros. On n64 and n32,
  don't split 64 bit values.
- No need for 32 bit ops for control registers.
- Fix few bugs (write control reg, write_c0_register64).
- Re-write EIRR/EIMR/CPUID operations using read_c0_registerXX, no
  need of inline assembly.
- rename control reg access functions to avoid phnx, update callers.
- stlye/whitespace fixes.
2010-09-09 17:45:48 +00:00
Jayachandran C.
54dcf92b7e Minor clean up for nlge - nlna_submit_rx_free_desc() can use the same desc
every time. Also merge couple of one-line functions into their caller.
2010-09-09 02:52:44 +00:00
Jayachandran C.
8f8ae306c6 nlge (alternate XLR GMAC driver) updates:
- Updates for the message ring clean up in r212321.
- Instead of dropping Tx packet on credit fail, retry send until it
  succeeds.
- Fix freeing mbufs in case of P2P descriptors:
  We cannot free the mbuf when the P2P descriptor freeback is received. The
  mbuf may be still in use by the GMAC, since the P2P freeback indicates that
  it read the P2D descriptors in the P2P message.
  Now we free just the P2P descriptor when the P2P freeback message is
  received.  Another freeback P2D message has been added to the end of
  the packet descriptors, the mbuf will be freed only when we received
  this.

The P2P descriptor issue was reported by srgorti at netlogicmicro dot com.
2010-09-08 17:11:49 +00:00
Jayachandran C.
670a090971 Clean up fast message ring code for XLR.
Fix message ring send path:
- define msgrng_access_enable() which disables local interrupts
  and enables message ring access. Also define msgrng_restore() which
  restores interrupts
- remove all other msgrng enable/disable macros, no need of critical_enter
  and other locking here.
- message_send() fixup: re-read status until pending bit clears
- message_send_retry() fixup: retry only few times with interrupts disabled
- Fix up message_send/message_send_retry callers - call
  msgrng_access_enable() and msgrng_restore() correctly so that interrupts
  are not disabled for long.
- removed unused and obsolete code from sys/mips/rmi/msgring.h
- some style fixes - more later

rge.c (XLR GMAC driver):
- updated for the message ring changes
- remove unused message_send_block()
- retry on credit failure, this is not a permanent failure when credits
  are configured correctly. Add panic if credits are not available to
  send for a long time.
2010-09-08 16:34:08 +00:00
Jayachandran C.
36a7e25854 PCIe updates for XLS.
Fix interrupt routing so that the irq returned is correct for XLR and
XLS. This also updates the MSI hack we had earlier - we still don't
really support MSI, but we support some drivers that use MSI, by providing
support for allocating one MSI per pci link - this MSI is directly
mapped to the link IRQ.
2010-09-07 07:31:58 +00:00
Jayachandran C.
3434740df2 Whitespace fixes - indent with tabs instead of spaces.
Few other style(9) changes.
2010-09-07 06:02:43 +00:00
Jayachandran C.
70b4737e05 On boards with >512MB memory, the result of vtophys cannot be converted
to KSEG1 address - use pmap_mapdev/pmap_unmapdev instead.

Remove unused variable maxphys.
2010-09-07 05:39:24 +00:00
Jayachandran C.
96001a35e1 XLR/XLS hardware interrupts should be programmed level triggered at the
PIC.  This should fix the interrupt releated issues seen after the
interrupt handling re-write for SMP.
2010-09-06 06:18:49 +00:00
Jayachandran C.
833182b77e Updates for the RMI MIPS platform code
- set cache_coherent_dma flag in cpuinfo for XLR, this will make sure that
  BUS_DMA_COHERENT flag is handled correctly in busdma_machdep.c
- iodi.c, call device_get_name() just once
- clear RMI specific EIRR while intializing CPUs
- remove debug print in intr_machdep.c
2010-09-01 17:35:31 +00:00
Jayachandran C.
55d308bc94 Add the workaround for 4xx lite boards after it was lost in the last
board.c update.
2010-08-31 04:18:47 +00:00
Jayachandran C.
79994806a1 Move debug.h to the the rge driver directory. rge.c is the only user of
debug.h. Remove debug.h references from other files.
2010-08-30 13:26:07 +00:00
Jayachandran C.
61b993a34f Clean up header files in RMI platform code (sys/mips/rmi), and remove
unused files.

- remove clock.c and clock.h, these are not used after the new timer
  code was added.
- remove duplicated include files, fix header file ordering, remove
  some unneeded includes.
- rename mips/rmi/shared_structs.h which contains the RMI boot loader
  interface to mips/rmi/rmi_boot_info.h. Remove unused files
  mips/rmi/shared_structs_func.h and sys/mips/rmi/shared_structs_offsets.h
- merge mips/rmi/xlrconfig.h and mips/rmi/rmi_mips_exts.h, and remove
  duplicated functions.
- nlge - minor change to remove unneeded argument.
- Add FreeBSD svn keyword for headers
2010-08-30 13:05:21 +00:00
Jayachandran C.
f936972752 Remove misleading comment in pte.h. MIPS PTE entries are software managed
and does not need atomics.

Submitted by:	alc
2010-08-30 08:23:22 +00:00
Jayachandran C.
9ebbcfd58b Apply MIPS pmap clean up patch from alc@ (with minor change to KASSERT):
PMAP_DIAGNOSTIC was eliminated from amd64/i386, and, in fact, the
  non-MIPS parts of the kernel, several years ago.  Any of the interesting
  checks were turned into KASSERT()s.  Basically, the motivation was that
  lots of people run with INVARIANTS but no one runs with DIAGNOSTIC.

  panic strings needn't and shouldn't have a terminating newline.

  Finally, there is one functional change.  The sched_pin() in
  pmap_remove_pages() is an artifact of the way we temporarily map page
  table pages on i386.  (The mappings are processor private.  We don't do
  a system-wide shootdown.)  It isn't needed by MIPS.

Tested by: jchandra

Submitted by:	alc
2010-08-29 05:39:21 +00:00
Jayachandran C.
d12f1e190e New driver nlge for XLR/XLS Network Accelerator. This will support the XGMAC
and XAUI 10G interfaces in addition RGMII/SGMII 1G interfaces.  This driver
is work in progress.

board.c and board.h expanded to include more info.

Only one of rge and nlge can be enabled at a time, rge will be deprecated
when nlge stabilizes.

Submitted by:	Sriram Gorti <srgorti at netlogicmicro com>
2010-08-28 19:02:51 +00:00
Jayachandran C.
97f047a80b Initial code for XLR CompactFlash driver.
Submitted by:	Sreekanth M. S. <kanthms at netlogicmicro com>
2010-08-28 07:58:10 +00:00
Jayachandran C.
b47f51b4a0 Revamp XLR interrupt handling, the previous scheme does not work well on
SMP.

We used to route all PIC based interrupts to cpu 0, and used the per-CPU
interrupt mask to enable/disable interrupts. But the interrupt threads can
run on any cpu on SMP, and the interrupt thread will re-enable the interrupts
on the CPU it runs on when it is done, and not on cpu0 where the PIC will
still send interrupts to.

The fix is move the disable/enable for PIC based interrupts to PIC, we will
ack on PIC only when the interrupt thread is done, and we do not use the
per-CPU interrupt mask.

The changes also introduce a way for subsystems to add a function that
will be called to clear the interrupt on the subsystem. Currently This is
used by the PCI/PCIe for doing additional work during the interrupt
handling.
2010-08-27 19:53:57 +00:00
Jayachandran C.
37b3715cdb Whitespace fixes in mips/include, remove unused 'struct tlb' from locore.h
PR:		misc/147471
2010-08-27 07:45:50 +00:00
Jayachandran C.
867a12afe1 Provide timecounter based on XLR PIC timer.
- Use timer 7 in XLR PIC as a 32 counter
- provide pic_init_timer(), pic_set_timer(), pic_timer_count32() and
  pic_timer_count() PIC timer operations.
- register this timer as platform_timecounter on rmi platform.
2010-08-25 13:37:55 +00:00
Jayachandran C.
f6f7fc21c4 XLR PIC code update.
- Fix a bug in xlr_pic_init (use irq in PIC_IRQ_IS_EDGE_TRIGGERED)
- use new macro PIC_INTR_TO_IRQ() and PIC_IRT_x() in xlr_pic_init
2010-08-25 12:10:20 +00:00
Jayachandran C.
30eb8eda72 XLR PIC code update and style(9) fixes.
- style(9) fixes to mips/rmi platform files
- update pic.h to add pic_setup_intr() and use pic_setup_intr() for setting
  up interrupts which are routed thru PIC.
- remove rmi_spin_mutex_safe and haslock, and make sure that the functions
  are called only after mutexes are available.
2010-08-25 11:49:48 +00:00
Jayachandran C.
afc1e71002 Rename on_chip.c to fmn.c, as the file has just the fast messaging network
code.  The iodi.c has the bus for SoC devices, so the name on_chip.c is
misleading.
2010-08-25 09:53:00 +00:00
Jayachandran C.
5cdefefaed RMI XLR platform code clean-up.
- move PIC code to xlr_machdep.c
- move fast message ring code completely to on_chip.c
- move memory initialization to a new function xlr_mem_init()
- style fixes
2010-08-25 08:48:54 +00:00
Jayachandran C.
871726d7e9 Sync up XLR tick.c with the new MIPS tick.c 2010-08-25 07:33:35 +00:00
Adrian Chadd
813b73a5a9 Migrate if_arge to use the PLL cpuops.
This has been lightly tested on the AR7161 and AR9132.
2010-08-19 16:29:08 +00:00
Adrian Chadd
303fea5cdc Implement PLL generalisation in preparation for use in if_arge.
* Add a function to write to the relevant PLL register
* Break out the PLL configuration for the AR71XX into the CPU ops,
  lifted from if_arge.c.
* Add the AR91XX PLL configuration ops, using the AR91XX register
  definitions.
2010-08-19 16:25:15 +00:00
Adrian Chadd
44c5dea1d8 add the PLL set functions to cpuops 2010-08-19 16:15:30 +00:00
Adrian Chadd
88e08e7ce6 Fix mistaken indenting. 2010-08-19 12:52:49 +00:00
Adrian Chadd
c4df93502d Add some initial AR724X chipset support.
This is untested but should at least allow an AR724X to boot.

The current code is lacking the detail needed to expose the PCIe bus.
It is also lacking any NIC, PLL or flush/WB code.
2010-08-19 11:53:55 +00:00
Adrian Chadd
f3135331c6 Add initial Atheros AR91XX support.
This works well enough to bring a system up to single-user mode
using an MDROOT.

Known Issues:

* The EHCI USB doesn't currently work and will panic the kernel during
  attach.
* The onboard ethernet won't work until the PLL routines have been
  fleshed out and shoe-horned into if_arge.
* The WMAC device glue (and quite likely the if_ath support)
  hasn't yet been implemented.
2010-08-19 11:40:10 +00:00
Adrian Chadd
c2ddd1eef7 Add missing licence. 2010-08-19 11:18:50 +00:00
Adrian Chadd
8d19ed7cbc style(9) pick from imp@ . 2010-08-19 11:16:52 +00:00
Adrian Chadd
292899c376 Remove now unused 'reg'. 2010-08-19 02:15:39 +00:00
Adrian Chadd
6f96ebf309 Initialise the USB system using cpuops rather than the AR71XX specific method. 2010-08-19 02:14:53 +00:00
Adrian Chadd
1d11005672 Migrate the CPU reset path to use the new cpuops. 2010-08-19 02:12:04 +00:00
Adrian Chadd
5b877d30b5 Remove the now-unused DDR flush register value. 2010-08-19 02:10:05 +00:00
Adrian Chadd
23f10186b5 Make the PCI initialisation path use the new cpuops rather than directly
programming the reset register.
2010-08-19 02:05:16 +00:00
Adrian Chadd
fd11fd075a Make if_arge use the new cpuops rather than hard coding the DDR flush registers. 2010-08-19 02:04:35 +00:00
Adrian Chadd
70bd9230d1 Preparation work for supporting the AR91xx and AR724x.
* Implement a SoC probe function, from Linux, which determines the
  SoC family, type and revision. This only probes the AR71xx series
  SoC and (currently) panics on others.

* Migrate some of the AR71XX specific hardware init (USB device, determining
  system frequencies) into using the cpuops introduced in an earlier commit.
  Other SoC specific hardware stuff (per-device flush/WB, GPIO pin wiring,
  Ethernet PLL setup, other things I've likely missed) will be introduced in
  subsequent commits.

Reviewed by:	imp@
Obtained from:	(partially) Linux
2010-08-19 02:03:12 +00:00
Jayachandran C.
8eec5e8f9c MIPS n64 support - continued...
1. On n64, use XKPHYS to map page table pages instead of KSEG0. Maintain
   just one freepages list on n64.

   The changes are mainly to introduce MIPS_PHYS_TO_DIRECT(pa),
   MIPS_DIRECT_TO_PHYS(), which will use KSEG0 in 32 bit compilation
   and XKPHYS in 64 bit compilation.

2. Change macro based PMAP_LMEM_MAP1(), PMAP_LMEM_MAP2(), PMAP_LMEM_UNMAP()
  to inline functions.

3. Introduce MIPS_DIRECT_MAPPABLE(pa), which will further reduce the cases
   in which we will need to have a special case for 64 bit compilation.

4. Update CP0 hazard definitions for CPU_RMI - the cpu does not need any
   nops

Reviewed by:	neel
2010-08-18 12:52:21 +00:00
Adrian Chadd
5429211e0a Add a DDR flush function, inspired by both Linux and if_arge.c. 2010-08-18 09:11:45 +00:00
Adrian Chadd
3692b33ce3 Add a further register definition for USB device initialisation.
Obtained from:	Linux
2010-08-18 08:22:58 +00:00
Adrian Chadd
4d843b15ca Bring over the first cut of the Atheros-specific SoC operations.
Each of these SoCs have different devices, different hardware initialisation
methods and, quite likely, different quirks. These functions will abstract
out the SoC differences and keep these differences out of the drivers (eg
USB init, if_arge, etc.)
2010-08-18 08:22:09 +00:00
Jayachandran C.
e792023fe1 Make return statements style(9) compliant in MIPS pmap.c
Reported by: neel

Reviewed by:	neel (earlier version)
2010-08-18 07:38:13 +00:00
Adrian Chadd
7f8184068f Import initial AR91XX and AR724X CPU register definitions.
Obtained from:	Linux
2010-08-18 00:26:14 +00:00
Konstantin Belousov
ee235befcb Supply some useful information to the started image using ELF aux vectors.
In particular, provide pagesize and pagesizes array, the canary value
for SSP use, number of host CPUs and osreldate.

Tested by:	marius (sparc64)
MFC after:	1 month
2010-08-17 08:55:45 +00:00
Jayachandran C.
a7834bac09 Rename TARGET_XLR_XLS to CPU_RMI to match other CPU_xxx definitions.
use CPU_RMI all XLR configurations. Update ident string for N32 and
N64 kernels.
2010-08-13 12:56:00 +00:00