Commit Graph

8814 Commits

Author SHA1 Message Date
Tianfei Zhang
4507a3d1f8 raw/ifpga/base: fix physical address info
Fix miss phy_addr on ifpga_acc_get_region_info() function.

Fixes: 56bb54ea1b ("raw/ifpga/base: add Intel FPGA OPAE share code")
Cc: stable@dpdk.org

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2019-07-04 15:35:26 +02:00
Tianfei Zhang
a3056b6b05 raw/ifpga/base: fix bit fields definition
Fix CTRL_DEV_SELECT bit fields definition about eth_group devices.

Fixes: 8a256bef32 ("raw/ifpga/base: add eth group driver")
Cc: stable@dpdk.org

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2019-07-04 15:35:09 +02:00
Tianfei Zhang
8e80eb4e62 raw/ifpga/base: fix logically dead code
add temporary variable in max10_reg_write().

Coverity issue: 337927
Fixes: 96ebfcf ("raw/ifpga/base: add SPI and MAX10 device driver")
Cc: stable@dpdk.org

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2019-07-04 15:34:55 +02:00
Tianfei Zhang
8234347f99 raw/ifpga/base: fix use of untrusted scalar value
Add checking the buffer size and use
const char * for buffer declaration.

Coverity issue: 279449
Fixes: ef1e8ede ("raw/ifpga: add Intel FPGA bus rawdev driver")
Cc: stable@dpdk.org

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2019-07-04 15:30:52 +02:00
Bruce Richardson
0a92e63fc4 raw/ioat: add local API to perform copies
Add local APIs to trigger data copies, and retrieve handle values once
those copies are completed. Included are unit tests to validate the data
is copies correctly.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:44:40 +02:00
Bruce Richardson
39e4701f0b raw/ioat: add statistics functions
Add stats functions to track what is happening in the driver, and put
unit tests to check those.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:44:35 +02:00
Bruce Richardson
849470d522 raw/ioat: add configure, start and stop functions
Allow initializing a driver instance. Include selftest to validate these
functions.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:44:31 +02:00
Bruce Richardson
b69512dda1 raw/ioat: add device info function
Add in the "info_get" function to the driver, to allow us to query the
device. This allows us to have the unit test pick up the presence of
supported hardware or not.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:44:28 +02:00
Bruce Richardson
abff4333ec raw/ioat: create device on probe and destroy on release
Add the create/destroy driver functions so that we can actually allocate
a rawdev and destroy it when done. No rawdev API functions are actually
implemented at this point.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:44:23 +02:00
Bruce Richardson
f50979dc4c raw/ioat: add register definition file
Add in the list of registers for the device. File is taken from the SPDK
project:

  https://github.com/spdk/spdk/blob/master/include/spdk/ioat_spec.h

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:44:23 +02:00
Bruce Richardson
f687e842e3 raw/ioat: introduce IOAT driver
Add stubs for ioat rawdev driver support in DPDK, specifically:

  * makefile and meson build hooks
  * initial public header file
  * rawdev main C file, with probe and release functions
  * release note update announcing the driver
  * initial documentation for the new section in the rawdev doc
  * unit test stubs for device unit tests

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:43:42 +02:00
Morten Brørup
f0c2dc8201 net: move TCP flags from ethdev header
TCP flags were moved to the TCP header file from the Ethernet control
header file, and the RTE prefix was added to their names.

Missing TCP ECN flags were added.

The ALL mask did not include TCP ECN flags, so it was renamed to reflect
that it applies to N-tuple filtering only.

Updated other files affected by the renaming accordingly.

Signed-off-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2019-07-03 12:57:30 +02:00
Liron Himi
d72ce66556 net/mvneta: optimize checksum generation offload
For tx checksum offload it is not mandatory to provide
a valid packet_type in addition to a valid ol_flags.
This patch only use ol_flags information for this feature
as a performance improvement.

Signed-off-by: Liron Himi <lironh@marvell.com>
Reviewed-by: Yuri Chipchev <yuric@marvell.com>
Tested-by: Liron Himi <lironh@marvell.com>
2019-07-03 12:57:30 +02:00
Yuri Chipchev
15ae783a15 net/mvneta: reset stats during device init
reset device statistics on device initialization

Signed-off-by: Yuri Chipchev <yuric@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
Tested-by: Yuri Chipchev <yuric@marvell.com>
2019-07-03 12:57:30 +02:00
Liron Himi
09a6afe7e4 net/mvneta: fix ierror statistics
Error packets were counted twice due to use of redundant counters.

Fixes: e9d5faffd1 ("net/mvneta: support basic stats")
Cc: stable@dpdk.org

Signed-off-by: Liron Himi <lironh@marvell.com>
Reviewed-by: Yuri Chipchev <yuric@marvell.com>
Tested-by: Liron Himi <lironh@marvell.com>
2019-07-03 12:57:30 +02:00
Qiming Yang
d4c5136227 net/ice: support UDP tunnelling port
Enabled UDP tunnel port add and delete functions.

Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2019-07-03 12:57:30 +02:00
Qiming Yang
d76116a467 net/ice: add generic flow API
This patch adds ice_flow_create, ice_flow_destroy,
ice_flow_flush and ice_flow_validate support,
these are used to handle all the generic filters.

Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2019-07-03 12:57:30 +02:00
Wei Zhao
57c4f26935 net/ice: enable switch filter
The patch enables the backend of rte_flow. It transfers
rte_flow_xxx to device specific data structure and
configures packet process engine's binary classifier
(switch) properly.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2019-07-03 12:57:30 +02:00
Leyi Rong
60687da86a net/ice/base: fix inner L2 offset in GRE dummy packet
The offset for the inner L2 header in the dummy GRE packet
was off by 2 bytes so updated the offset.

Fixes: 839c0a4b77 ("net/ice/base: enable additional switch rules")

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-07-03 12:57:30 +02:00
Leyi Rong
ee3e244afb net/ice/base: support ethertype switch filters
Add protocol definitions for ethertype.
Add ice_ethtype_hdr structure definition into the ice_prot_hdr union.
Add ethtype offsets into the training packet maps.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Tested-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-07-03 12:57:30 +02:00
Leyi Rong
38d9b0b03c net/ice/base: support IPv6 based switch filters
- Add IPv6 switch rule support.
- Add IPv6 training packet.
- Correct name of IPv6 header variable.
- Fix enum values so that they point to the proper
  ice_prot_ext_tbl_entry field.

Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-07-03 12:57:30 +02:00
Dan Wei
aa6ff92898 net/ipn3ke: modify AFU configurations
Modify AFU configurations for new BBS (Blue Bitstream) of A10 on N3000
card:
- AFU register access: RTL changes the UPL (User Programmable Logic
which is the container of vBNG IP) base address and the read/write
commands of register indirect access.
- Poll the INIT_STS register to wait for the vBNG IP and DDR reset
completion.
- Refine log for debug: print UPL_version not only for vBNG bit stream,
but also for other bit streams.

Fixes: c01c748e4a ("net/ipn3ke: add new driver")
Cc: stable@dpdk.org

Signed-off-by: Dan Wei <dan.wei@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2019-07-03 12:57:30 +02:00
Rastislav Cernay
f37c57a1a3 net/nfb: support Silicom Mango card
Add support for Silicom FB2CGG3 smart NIC

Signed-off-by: Rastislav Cernay <cernay@netcope.com>
2019-07-03 12:57:30 +02:00
Rastislav Cernay
6595e2f72e net/szedata2: support Silicom Mango card
Add support for Silicom FB2CGG3 smart NIC

Signed-off-by: Rastislav Cernay <cernay@netcope.com>
Acked-by: Jan Remes <remes@netcope.com>
2019-07-03 12:57:30 +02:00
Pavan Nikhilesh
28e767e819 event/octeontx2: add devargs to control timer adapters
Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.

Example:
	--dev "0002:0e:00.0,tim_ring_ctl=[2-1023-1-0]"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:28 +02:00
Pavan Nikhilesh
b2530cda86 event/octeontx2: add devargs to limit timer adapters
Add devargs to limit the max number of TIM rings reserved on probe.
Since, TIM rings are HW resources we can avoid starving other
applications by not grabbing all the rings.

Example:
	--dev "0002:0e:00.0,tim_rings_lmt=2"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:22 +02:00
Pavan Nikhilesh
d202edd715 event/octeontx2: add timer adapter start and stop
Add event timer adapter start and stop functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:20 +02:00
Pavan Nikhilesh
f513827934 event/octeontx2: add timer stats get and reset
Add event timer adapter statistics get and reset functions.
Stats are disabled by default and can be enabled through devargs.

Example:
	--dev "0002:0e:00.0,tim_stats_ena=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:10 +02:00
Pavan Nikhilesh
17424ededb event/octeontx2: add timer cancel function
Add function to cancel event timer that has been armed.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:09 +02:00
Pavan Nikhilesh
95e4e4ec74 event/octeontx2: add timer arm timeout burst
Add event timer arm timeout burst function.
All the timers requested to be armed have the same timeout.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:08 +02:00
Pavan Nikhilesh
80999bac03 event/octeontx2: add timer arm routine
Add event timer arm routine.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:07 +02:00
Pavan Nikhilesh
f0b9982cb3 event/octeontx2: add TIM bucket operations
Add TIM bucket operations used for event timer arm and cancel.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:05 +02:00
Pavan Nikhilesh
984ffd72d6 event/octeontx2: add timer adapter info function
Add TIM event timer adapter info get function.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:04 +02:00
Pavan Nikhilesh
ffa4ec0b60 event/octeontx2: allow adapters to resize inflight buffers
Add internal SSO functions to allow event adapters to resize SSO buffers
that are used to hold in-flight events in DRAM.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:03 +02:00
Pavan Nikhilesh
f67c9e8df9 event/octeontx2: add TIM IRQ handlers
Register and implement TIM IRQ handlers for error interrupts

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:02 +02:00
Pavan Nikhilesh
d457de0fe0 event/octeontx2: add devargs to modify chunk slots
Add devargs support to modify number of chunk slots. Chunks are used to
store event timers, a chunk can be visualised as an array where the last
element points to the next chunk and rest of them are used to store
events. TIM traverses the list of chunks and enqueues the event timers
to SSO.
If no argument is passed then a default value of 255 is taken.

Example:
	--dev "0002:0e:00.0,tim_chnk_slots=511"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:52 +02:00
Pavan Nikhilesh
464060c02f event/octeontx2: add devargs to disable NPA
If the chunks are allocated from NPA then TIM can automatically free
them when traversing the list of chunks.
Add devargs to disable NPA and use software mempool to manage chunks.

Example:
	--dev "0002:0e:00.0,tim_disable_npa=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:43 +02:00
Pavan Nikhilesh
dc2aae650d event/octeontx2: allow TIM to optimize config
Allow TIM to optimize user supplied configuration based on
RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES flag.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:42 +02:00
Pavan Nikhilesh
411c062505 event/octeontx2: create and free timer adapter
When the application calls timer adapter create the following is used:
- Allocate a TIM lf based on number of lf's provisioned.
- Verify the config parameters supplied.
- Allocate memory required for
	* Buckets based on min and max timeout supplied.
	* Allocate the chunk pool based on the number of timers.

On Free:
- Free the allocated bucket and chunk memory.
- Free the TIM lf allocated.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:38 +02:00
Pavan Nikhilesh
278821213a event/octeontx2: add timer adapter capabilities
Add function to retrieve event timer adapter capabilities.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:37 +02:00
Pavan Nikhilesh
382f892267 event/octeontx2: support event timer
Add event timer adapter aka TIM initialization on SSO probe.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:35 +02:00
Pavan Nikhilesh
62561532ac event/octeontx2: add SSO selftest
Add selftest to verify sanity of SSO.
Can be run by passing devargs to SSO PF as follows:

Example:
	--dev "0002:0e:00.0,selftest=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:29 +02:00
Pavan Nikhilesh
de128f732f event/octeontx2: add device stop and close functions
Add event device stop and close callback functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:27 +02:00
Pavan Nikhilesh
9c96ff7696 event/octeontx2: add devargs to control SSO GGRP QoS
SSO GGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO GGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to GGRPs based on a preconfigured threshold.
We can control the QoS of SSO GGRP by modifying the above mentioned
thresholds. GGRPs that have higher importance can be assigned higher
thresholds than the rest.

Example:
	--dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]

Qx  -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.

The values need to be expressed in terms of percentages, 0 represents
default.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:23 +02:00
Pavan Nikhilesh
5d6c50ffec event/octeontx2: add device start function
Add eventdev start function along with few cleanup API's to maintain
sanity.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:22 +02:00
Pavan Nikhilesh
09d5c0f356 event/octeontx2: add devargs to force legacy mode
Octeontx2 SSO by default is set to use dual workslot mode.
Add devargs option to force legacy mode i.e. single workslot mode.
Example:
	--dev "0002:0e:00.0,single_ws=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:17 +02:00
Pavan Nikhilesh
54c5d3c24d event/octeontx2: add worker dual GWS dequeue functions
Add workder dual workslot mode dequeue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:16 +02:00
Pavan Nikhilesh
ad4a8adf25 event/octeontx2: add worker dual GWS enqueue functions
Add dual workslot mode event enqueue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:14 +02:00
Pavan Nikhilesh
21d8822180 event/octeontx2: add SSO dual GWS HW device operations
Add SSO dual workslot mode GWS HW device operations.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:12 +02:00
Pavan Nikhilesh
aa62547f7e event/octeontx2: add SSO dual workslot mode
OcteonTx2 AP core SSO cache contains two entries each entry caches
state of an single GWS aka event port.
AP core requests events from SSO by using following sequence :
1. Write to SSOW_LF_GWS_OP_GET_WORK
2. Wait for SSO to complete scheduling by polling on SSOW_LF_GWS_TAG[63]
3. SSO notifies core by clearing SSOW_LF_GWS_TAG[63] and if work is
valid SSOW_LF_GWS_WQP is non-zero.
The above sequence uses only one in-core cache entry.

In dual workslot mode we try to use both the in-core cache entries by
triggering GET_WORK on a second workslot as soon as the above sequence
completes. This effectively hides the schedule latency of SSO if there
are enough events with unique flow_tags in-flight.
This mode reserves two SSO GWS lf's for each event port effectively
doubling single core performance.
Dual workslot mode is the default mode of operation in octeontx2.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:10 +02:00
Pavan Nikhilesh
46244b5b14 event/octeontx2: add worker dequeue functions
Add worker event dequeue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:09 +02:00
Pavan Nikhilesh
0eaf90cff1 event/octeontx2: add worker enqueue functions
Add worker event enqueue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:08 +02:00
Pavan Nikhilesh
4095660db7 event/octeontx2: add SSO HW device operations
Add SSO HW device operations used for enqueue/dequeue.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:07 +02:00
Pavan Nikhilesh
284ea1cc38 event/octeontx2: support xstats
Add support for retrieving statistics from SSO GWS and GGRP.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-03 06:56:06 +02:00
Pavan Nikhilesh
9b8bc622a1 event/octeontx2: add register dump functions
Add SSO GWS and GGRP register dump function to aid debugging.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:05 +02:00
Pavan Nikhilesh
8c77f48337 event/octeontx2: add SSO GWS and GGRP IRQ handlers
Register and implement SSO GWS and GGRP IRQ handlers for error
interrupts.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:04 +02:00
Pavan Nikhilesh
f563b7fa8c event/octeontx2: support dequeue timeout tick conversion
Add function to convert dequeue timeout from ns to ticks.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:03 +02:00
Pavan Nikhilesh
f7ac8b66b2 event/octeontx2: support linking queues to ports
Links between queues and ports are controlled by setting/clearing GGRP
membership in SSOW_LF_GWS_GRPMSK_CHG.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:01 +02:00
Pavan Nikhilesh
67b5f46864 event/octeontx2: add port config functions
Add default config, setup and release functions for event ports
i.e. SSO GWS.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:55:59 +02:00
Pavan Nikhilesh
55e778ca46 event/octeontx2: add devargs for inflight buffer count
The number of events for a *open system* event device is specified
as -1 as per the eventdev specification.
Since, Octeontx2 SSO inflight events are only limited by DRAM size, the
xae_cnt devargs parameter is introduced to provide upper limit for
in-flight events.

Example:
	--dev "0002:0e:00.0,xae_cnt=8192"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:55:51 +02:00
Pavan Nikhilesh
5f96f77bb6 event/octeontx2: allocate event inflight buffers
Allocate buffers in DRAM that hold inflight events.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:55:50 +02:00
Pavan Nikhilesh
e3ffe19a53 event/octeontx2: add event queue config functions
Add default config, setup and release functions for event queues i.e.
SSO GGRPS.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:55:49 +02:00
Pavan Nikhilesh
cd24e70258 event/octeontx2: add device configure function
Add the device configure function that attaches the requested number of
SSO GWS(event ports) and GGRP(event queues) LF's to the PF.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:55:48 +02:00
Pavan Nikhilesh
bebc3dbcf4 event/octeontx2: add device capabilities function
Add the info_get function to return details on the queues, flow,
prioritization capabilities, etc. which this device has.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:55:47 +02:00
Pavan Nikhilesh
9b795ef7c6 event/octeontx2: add init and fini for SSO object
SSO object needs to be initialized to communicate with the kernel AF
driver through mbox using the common API's.
Also, initialize the internal eventdev structure to defaults.
Attach NPA lf to the PF if needed.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:55:46 +02:00
Pavan Nikhilesh
3ef6bbfead event/octeontx2: add build infra and device probe
Add the make and meson based build infrastructure along with the
eventdev(SSO) device probe.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-03 06:55:44 +02:00
Nipun Gupta
aad967bb3c event/dpaa2: fix timeout ticks
Correct timeout to tick conversion.

Fixes: 0ce3ce7c27 ("event/dpaa2: add configuration functions")
Cc: stable@dpdk.org

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
2019-07-03 06:55:37 +02:00
Bruce Richardson
530588f3cd drivers: add reasons for components being disabled
For each driver where we optionally disable it, add in the reason why it's
being disabled, so the user knows how to fix it.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
2019-07-02 23:21:11 +02:00
Bruce Richardson
8baad6f884 build: print list of disabled components
When configuring with meson we print out a list of enabled components, but
it is also useful to list out the disabled components and the reasons why.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
2019-07-02 23:20:26 +02:00
Bruce Richardson
863fd2930b rawdev: pass the device id as parameter to selftest
When running self-tests, the driver needs to know the device on which to
run the tests, so we need to take the device ID as parameter. Only the
skeleton driver is providing this selftest capability right now, so we can
easily update it for this change.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2019-07-02 17:04:30 +02:00
Bruce Richardson
88a81bcecb raw/skeleton: remove compile-time constant for device id
Use a variable value rather than compile-time constant zero as the
device id for the skeleton rawdev tests. This ensures we can make the
tests work even if other rawdevs are present.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2019-07-02 17:04:10 +02:00
Thinh Tran
dcb1595956 raw/skeleton: fix test of attribute set/get
Using memory on the stack instead of on the heap by calling malloc
also avoid memory leak in case of test case failures

Fixes: 88d0e47880 ("raw/skeleton: fix memory leak on test failure")
Cc: stable@dpdk.org

Signed-off-by: Thinh Tran <thinhtr@linux.vnet.ibm.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2019-07-01 19:52:52 +02:00
Ivan Malov
b51690ec69 mbuf: clarify outer offsets for non-tunnel packets
The default policy for offload-specific fields is that
they are undefined unless the corresponding offloads are
requested in mbuf ol_flags. This is also the case for outer
L2 and L3 length fields which must not be assumed to contain
zeros for non-tunnel packets. The patch clarifies this behaviour
in the comments and also adds appropriate checks to the PMDs which
do not check any tunnel-related offloads before using the said fields.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2019-07-01 17:15:01 +02:00
Jakub Grajciar
c41a04958b net/memif: support multi-process
Multi-process support for memif PMD.
Primary process handles connection establishment.
Secondary process queries for memory regions.

Signed-off-by: Jakub Grajciar <jgrajcia@cisco.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
2019-06-28 20:32:18 +02:00
Xiaolong Ye
45bba02c95 net/af_xdp: support need wakeup feature
This patch enables need_wakeup flag for Tx and fill rings, when this
flag is set by the driver, it means that the userspace application has
to explicitly wake up the kernel Rx or kernel Tx processing by issuing
a syscall. Poll() can wake up both and sendto() or its alternatives
will wake up Tx processing only.

This feature is to provide efficient support for case that application
and driver executing on the same core.

Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:32:18 +02:00
Cian Ferriter
a3f5252e5c net/pcap: enable infinitely Rx a pcap file
It can be useful to use pcap files for some rudimental performance
testing. This patch enables this functionality in the pcap driver.

At a high level, this works by creating a ring of sufficient size to
store the packets in the pcap file passed to the application. When the
rx function for this mode is called, packets are dequeued from the ring
for use by the application and also enqueued back on to the ring to be
"received" again.

A tx_drop mode is also added since transmitting to a tx_pcap file isn't
desirable at a high traffic rate.

Jumbo frames are not supported in this mode. When filling the ring at rx
queue setup time, the presence of multi segment mbufs is checked for.
The PMD will exit on detection of these multi segment mbufs.

Signed-off-by: Cian Ferriter <cian.ferriter@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:32:18 +02:00
Cian Ferriter
da6ba28f05 net/pcap: use a struct to pass user options
The argument lists on some of the device creation functions are quite
large. Using a struct to hold the user options parsed in
'pmd_pcap_probe' will allow for cleaner function calls and definitions.
Adding user options will also be easier.

Signed-off-by: Cian Ferriter <cian.ferriter@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:32:18 +02:00
Stephen Hemminger
cc9271f9e7 net/netvsc: fix xstats for VF device
The id values for VF stats were not being offset correctly.
And getting xstats for VF device only worked if VF device supported
it; it did not support the generic stats.

Fixes: dc7680e859 ("net/netvsc: support integrated VF")
Cc: stable@dpdk.org

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
2019-06-28 20:32:18 +02:00
Mohsin Mazhar Shaikh
b21ad01a82 net/netvsc: fix xstats id
The xstats_get was not setting id correctly for each entry.

Fixes: 4e9c73e96e ("net/netvsc: add Hyper-V network device")
Cc: stable@dpdk.org

Signed-off-by: Mohsin Mazhar Shaikh <mohsinmazhar_shaikh@trendmicro.com>
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
2019-06-28 20:32:18 +02:00
Stephen Hemminger
92d23a57ca net/netvsc: support configuring RSS parameters
Add RSS hash key and reta update and query functions.

Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com>
2019-06-28 20:32:18 +02:00
Stephen Hemminger
3a899f8afc net/netvsc: fix RSS offload settings
Use the result from querying host to show the RSS info.

Fixes: 4e9c73e96e ("net/netvsc: add Hyper-V network device")
Cc: stable@dpdk.org

Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com>
2019-06-28 20:32:18 +02:00
Ali Alnubani
843e720557 net/mlx5: fix 32-bit build
This is to fix the error:
  ```
  drivers/net/mlx5/mlx5_defs.h:14:26:
  error: format '%lx' expects argument of type 'long unsigned int',
  but argument 5 has type 'off_t {aka long long int}' [-Werror=format=]
  drivers/net/mlx5/mlx5_txq.c:569:48: note: format string is defined here
     DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%lx"
                                                ~~^
                                                %llx
  ```
Which reproduces with gcc (Ubuntu 7.4.0-1ubuntu1~18.04.1) 7.4.0.

Fixes: 6bf10ab69b ("net/mlx5: support 32-bit systems")
Cc: stable@dpdk.org

Signed-off-by: Ali Alnubani <alialnu@mellanox.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
cb7b6606eb net/hinic: add RSS stats and promiscuous ops
Add RSS, stats, promiscuous ops related function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
076221c8fe net/hinic: add Rx/Tx
This patch add package sending and receiving function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
2c473729dd net/hinic: add start/stop and queue ops
Add dev_start, dev_stop, link_update, queue_setup, queue_release
related function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
64727024d2 net/hinic: add device initialization
Add device initialization function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
1d09792a27 net/hinic: add build and doc files
Add build and doc files along with hinic_pmd_ethdev.c
which just includes PMD register and log initialization
for compilation.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
81d53291a4 net/hinic/base: add various headers
Add various headers that define mgmt commands, cmdq commands
and basic defines for use in the code.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
828d3e15a9 net/hinic/base: support context and work queue
Work queue is used for cmdq and Rx/Tx buff description.
NIC business needs to configure cmdq context and txq/rxq
context. This patch adds data structures and function codes
for work queue and context.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
2d5fd10181 net/hinic/base: add NIC business configurations
The items of configurations and queries for NIC business include
MAC, VLAN, MTU, RSS and so on. These configurations and queries
are handled by mgmt module. This patch introduces related
data structures and function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
d9ce191794 net/hinic/base: add hardware operation
Add code for hardware operation, including configuration,
query and so on.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
a4957d87e0 net/hinic/base: add mgmt module
Mgmt module is a kind of administration module for the chip.
It is responsible for handling administration command from host.
It uses api channel. This patch adds related data structures,
packaged interfaces and function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
78f6c5dbe2 net/hinic/base: add eq mechanism
Eqs include aeq and ceq. PMD supports aeq only. Aeq is a kind of
queue for mgmt asynchronous message and mgmt command response message.
This patch introduces data structures, initialization, and related
interfaces about aeq.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
7fcd6b05b9 net/hinic/base: support cmdq mechanism
Microcode is named ucode in Hi1822. Its main responsibility is data
transmission and reception. But it can also handle some administration
works. It uses cmdq mechanism. This patch introduces data structures,
initialization, interfaces, and commands sending functions of cmdq.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
53ffbf2caa net/hinic/base: add API command channel
API command channel is for communicating with mgmt module of chip.
This patch introduces data structures, initialization, interfaces,
and commands sending functions of API command channel.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
4b8441756f net/hinic/base: add HW interfaces of BAR operation
This patch adds some HW interfaces for bar operation interfaces,
including: mapped bar address getting, HW attributes getting,
msi-x reg operation, function type getting and so on.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
0020843cf4 net/hinic/base: add HW registers definition
Add HW registers definition header file for Hi1822 NIC.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
David Marchand
e7f2fa88a7 drivers/net: fix double free on init failure
If we don't clear mac_addrs, ethdev will double free it on cleanup.

Fixes: e16adf08e5 ("ethdev: free all common data when releasing port")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
David Marchand
eaa45270aa net/bnx2x: fix invalid free on unplug
mac_addrs points to a field in dev_private.
We can't let ethdev free it.

Fixes: e16adf08e5 ("ethdev: free all common data when releasing port")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
David Marchand
281183d851 net/nfb: avoid memory leak on unplug
Clearing mac_addrs on remove will prevent ethdev from freeing it.

Fixes: 6435f9a0ac ("net/nfb: add new netcope driver")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Allain Legacy
15fb42d511 net/avp: remove resources when port is closed
The rte_eth_dev_close() function now handles freeing resources for
devices (e.g., mac_addrs).  To conform with the new close() behaviour we
are asserting the RTE_ETH_DEV_CLOSE_REMOVE flag so that
rte_eth_dev_close() releases all device level dynamic memory.

Second level memory allocated to each individual rx/tx queue is now
freed as part of the close() operation therefore making it safe for the
rte_eth_dev_close() function to free the device private data without
orphaning the rx/tx queue pointers.

Signed-off-by: Allain Legacy <allain.legacy@windriver.com>
Acked-by: Matt Peters <matt.peters@windriver.com>
2019-06-28 20:31:49 +02:00
David Marchand
e876497c4f net/softnic: remove trace of legacy linuxapp
This check on Linux environment has been added at a time when we already
had switched to using the boolean RTE_EXEC_ENV_LINUXAPP.
It was then missed when converting to RTE_EXEC_ENV_LINUX.

Fixes: 7709a63bf1 ("net/softnic: add connection agent")
Fixes: 742bde12f3 ("build/linux: rename macro from LINUXAPP to LINUX")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
80a430d66f net/ice/base: update Tx context struct
Add internal usage flag, bit 91 as described in spec.
Update width of internal queue state to 122 also as described in spec.

Signed-off-by: Ashish Shah <ashish.n.shah@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
a0b1a2629b net/ice/base: change flow and profile removal
- Add function to remove ES profile map as it is now being used in
clearing and freeing HW tables.
- Locks were initially not used for releasing ES profile maps and
flow profiles as the sequence is part of driver unload. Adding
calls to acquire and release locks to ensure that any calls made
by the VF VSI during VFR or unload do not result in memory
access violations.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
e10a21d7b6 net/ice/base: update driver unloading field
According to recent specification versions, the field in the Queue
Shutdown AdminQ command consisting of the "driver unloading" indication
is not a 4 byte field (it is byte.bit 16.0). Change it to a byte and
remove the unnecessary endian conversion.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
21cb08fe68 net/ice/base: reduce calls to get profile associations
Added refresh_required flag to determine if we need to update the
recipe to profile mapping cache. This will reduce the number of
calls made to refresh the profile map.

Signed-off-by: Shivanshu Shukla <shivanshu.shukla@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
8d0fa8c7f5 net/ice/base: fix NVGRE header structure
Correct NVGRE header structure and its field offsets.

Fixes: 04b8ec1ea8 ("net/ice/base: add protocol structures and defines")
Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
dfbb0b98d4 net/ice/base: refactor zeroing bitmap size
A couple of places in the code use a 'sizeof(bitmap) * BITS_PER_BYTE'
construction to calculate the size of the bitmap when calling
ice_zero_bitmap. Instead of doing this, just use the same value as in
the ice_declare_bitmap declaration.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
a5e60297bb net/ice/base: refactor zeroing bitmap
A few places in the code used ice_memset instead of ice_zero_bitmap to
initialize a bitmap to zeros.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
2c3d02ca80 net/ice/base: fix copying bitmap
Fix ice_cp_bitmap to copy the entire storage.

Fixes: c9e37832c9 ("net/ice/base: rework on bit ops")
Cc: stable@dpdk.org

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
6567f9d59a net/ice/base: fix zeroing bitmap
Fix ice_zero_bitmap to zero the entire storage.

Fixes: c9e37832c9 ("net/ice/base: rework on bit ops")
Cc: stable@dpdk.org

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
a609b21fe0 net/ice/base: deduce TSA value in the CEE mode
In CEE mode, the TSA information can be derived from the reported
priority value.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
95d3619b09 net/ice/base: reduce adding advanced rule time
While calling ice_find_recp we were calling ice_get_recp_to_prof_map
every time we called ice_find_recp. ice_get_recp_to_prof_map is a very
expensive operation and we should try to reduce the number of times we
call this function. So moved it into ice_get_recp_frm_fw since we only
need to have fresh recp_to_profile mapping when we we check FW to see if
the recipe we are trying to add already exists in FW.

Signed-off-by: Shivanshu Shukla <shivanshu.shukla@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
776b48c112 net/ice/base: allow forward to Q groups in switch rule
Enable forward to Q group action in ice_add_adv_rule.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
839c0a4b77 net/ice/base: enable additional switch rules
Add capability to create inner IP and inner TCP switch recipes and
rules. Change UDP tunnel dummy packet to accommodate the training of
these new rules.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
884efe3ca1 net/ice/base: add VXLAN/generic tunnel management
Added routines for handling tunnel management:
	- ice_tunnel_port_in_use()
	- ice_tunnel_get_type()
	- ice_find_free_tunnel_entry()
	- ice_create_tunnel()
	- ice_destroy_tunnel()

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
b2de221a3b net/ice/base: add some minor new defines
1. Add defines for Link Topology Netlist Section.
2. Add missing Read MAC command response bits.
3. Adds AQ error 29.

Signed-off-by: Jacek Naczyk <jacek.naczyk@intel.com>
Signed-off-by: Lev Faerman <lev.faerman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
fdafeee39a net/ice/base: refactor VSI node scheduler
Refactored VSI node sched code to use port_info ptr as call arg.

The declaration of VSI node getter function has been modified to use
pointer to ice_port_info structure instead of pointer to hw structure.
This way suitable port_info structure is used to find VSI node.

Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
5c7057d02a net/ice/base: cleanup flex pipe files
Make functions that can be, static. Remove some code that is not
currently called.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
42fde0faf9 net/ice/base: cleanup unused code
Cleanup the useless code.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
73663725e1 net/ice/base: update marker to mark unused func parameters
use __ALWAYS_UNUSED to mark function parameters unused to replace
__always_unused marker.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
7a4a4a3481 net/ice/base: introduce some new macros
Introduce some more new macros, like ICE_VSI_LB and the like.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
fe59c0a131 net/ice/base: fix Rx functionality for ethertype filters
In the function ice_add_eth_mac(), there is a line that
hard-codes the filter info flag to TX. This is redundant
and inaccurate. That flag will be set by the calling
function that built the list of filters to add, and
hard-coding it eliminates the Rx functionality of this
code. The paired function ice_remove_eth_mac() does not
do this, making a mis-matched pair.

Fixes: 157d00901f ("net/ice/base: add functions for ethertype filter")
Cc: stable@dpdk.org

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
421d265c2a net/ice/base: protect list add with lock
Function ice_add_rule_internal needs to call ice_create_pkt_fwd_rule
with lock held because it uses the LIST_ADD to modify the filter
rule list. It needs to be protected when modified.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
171a4ae26d net/ice/base: check RSS flow profile list
Minor change to check if there are any RSS flow profiles to remove.
This will avoid flow profile lock acquisition and release
if the list is empty.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
16c14a0cd6 net/ice/base: add function to deallocate flow entry
Decouple ice_dealloc_flow_entry from ice_flow_rem_entry_sync.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
5c8af36253 net/ice/base: fix signed package download
In order to properly support signed packages, we always have
to send the complete buffer to firmware, regardless of any
unused space at the end. This is because the SHA hash value
is computed over the entire buffer.

Fixes: 51d04e4933 ("net/ice/base: add flexible pipeline module")
Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
79aec8237c net/ice/base: eliminate semantic parser warnings
Eliminate some semantic warnings, static analysis warnings.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
9396e6dab5 net/ice/base: optimize data structures
Move a bunch of members around to make more efficient use of
memory, eliminating holes where possible. None of these members
are hot path so cache line alignment is not very important here.

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
f02c720671 net/ice/base: fix flow director VSI count
Flow director keeps a list of VSIs for each flow type (TCP4, UDP6, etc.)
This list varies in length depending on the number of traffic classes
(ADQ). This patch uses the define of max TCs to calculate the size of
the VSI array.

Fixes: bd984f155f ("net/ice/base: support FDIR")
Cc: stable@dpdk.org

Signed-off-by: Henry Tieman <henry.w.tieman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
e4b73bee79 net/ice/base: fix rate limit burst size calculation
When the MSB is not set, the lower 11 bits do not represent bytes, but
chunks of 64 bytes. Adjust the rate limit burst size calculation
accordingly, and update the comments to indicate the way the hardware
actually works.

Fixes: 93e84b1bfc ("net/ice/base: add basic Tx scheduler")
Cc: stable@dpdk.org

Signed-off-by: Ben Shelton <benjamin.h.shelton@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
d678184976 net/ice/base: correct UDP/TCP packet types
1. Using the UDP-IL PTYPEs when processing packet segments as it
contains all PTYPEs with UDP and allow packets to be forwarded to
associated VSIs as switch rules are based on outer IPs.
2. Add PTYPE 0x088 to TCP PTYPE bitmap list.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
5e83abaefe net/ice/base: check new FD filter duplication
Function ice_fdir_is_dup_fltr tests if new Flow Director rule
is not a duplicate.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
9c710f2ad0 net/ice/base: implement LLDP persistent settings
This patch implements persistent, across reboots, start and stop
of LLDP agent. Added additional function parameter to
ice_aq_start_lldp and ice_aq_stop_lldp.

Signed-off-by: Jaroslaw Ilgiewicz <jaroslaw.ilgiewicz@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
dc2c385c9b net/ice/base: track HW stat registers past rollover
Modify ice_stat_update40 to use rd64 instead of two calls to rd32.
Additionally, drop the now unnecessary hireg function parameter.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
0c80804082 net/ice/base: support 64-bit read
Add function support for rd64.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
3940540c5d net/ice/base: cleanup update link info
1. Do not unnecessarily initialize local variable.
2. Cleanup ice_update_link_info.
3. Don't clear auto_fec bit in ice_cfg_phy_fec.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
ba389b4b24 net/ice/base: do not reuse result index already in use
To make sure that we don't reuse the same result index
which is already in use, for chaining some other recipe.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
27df96b284 net/ice/base: disable Tx pacing option
With the current NVM, after GLOBR, before the first link up event, FW
will return to base driver, the pacing value of 20 percents for some
reason, in the get-link-status AQ command. We then use this value as
the pacing param for the set-mac-info AQ command. As result, we are
limited to 20 percents of the available bandwidth until the first
set-mac-info AQ call after the link up event.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
1ff81a72d4 net/ice/base: enable HW to prefetch Rx descriptors
Currently we are always setting prefena to 0. This is causing the
hardware to only fetch descriptors when there are none free in the cache
for a received packet instead of prefetching when it has used the last
descriptor regardless of incoming packets.

Fix this by allowing the hardware to prefetch Rx descriptors.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
d9d698f82a net/ice/base: use a different log type for FW
Replace the use of the ICE_DBG_AQ_MSG bit when dumping firmware logging
messages with a separate distinct type ICE_DBG_FW_LOG. This is useful
so that developers may enable ICE_DBG_FW_LOG and get firmware logging
messages, without also dumping AdminQ messages at the same time.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
5274e7b35b net/ice/base: make FDID available for flex descriptor
The FDID (flow director filter ID) was not inserted into Flex Descriptor
writebacks. The data for FDID is always 0xffffffff when FDID-priority is
0 in the flow director programming descriptor.

This patch changes the FDID-priority to 1 so the FDID is available for
the Flex Descriptor. With this patch the FDID is placed into the Flex
Descriptor.

Signed-off-by: Henry Tieman <henry.w.tieman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
b965268f82 net/ice/base: set max number of TCs per port to 4
On devices with more than 4 ports, the maximum number of TCs per port is
limited to 4.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
0463655bf6 net/ice/base: prefix capability logs for func and dev
This patch makes a change to add a "func cap" prefix when printing
function capabilities, and a "dev cap" prefix when printing device
capabilities.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
8c98bf7e45 net/ice/base: support 32-bit hamming weight
Add function support for hweight32.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
4b60132f43 net/ice/base: update some defines
Update the defines for ice_aqc_manage_mac_read,
ice_aqc_manage_mac_write, ice_aqc_get_phy_caps_data.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
192ea17693 net/ice/base: forbid VSI to remove unassociated ucast filter
If a VSI is not using a unicast filter or did not configure that
particular unicast filter, driver should not allow it to be removed
by the VSI.

Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
bd91c68f05 net/ice/base: add and fix debug logs
Adding missing debug logs and fixing existing debug logs.

Signed-off-by: Marta Plantykow <marta.a.plantykow@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
39e30e38c4 net/ice/base: add sibling head to parse nodes
There was a bug in the previous code which never traverses all the
children to get the first node of the requested layer.

Added a sibling head pointer to point the first node of each layer
per TC. This helps the traverse easy and quicker and also removed the
recursive, complexity of the code.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
c419e75cd9 net/ice/base: separate out control queue lock creation
The ice_init_all_ctrlq and ice_shutdown_all_ctrlq functions create and
destroy the locks used to protect the send and receive process of each
control queue.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
f21a02d833 net/ice/base: move and redefine debug cq function
The ice_debug_cq function is only called from ice_controlq.c, and has no
other callers outside of that file. Move it and mark it static to avoid
namespace pollution.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
8da4460979 net/ice/base: use macro instead of magic 8
Replace the use of the magic number 8 by BITS_PER_BYTE when calculating
the number of bits from the number of bytes.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
6c0befff8d net/ice/base: add functions to initialize FW logging
In order to initialize the current status of the FW logging,
the api ice_get_fw_log_cfg is added. The function retrieves
the current setting of the FW logging from HW and updates the
ice_hw structure accordingly.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
964443bdcd net/ice/base: add compatibility check for package version
1. Perform a check against the package version to make sure that
it will be compatible with the shared code implementation. There
will be points in time when the shared code and package will need
to be changed in lock step; the mechanism added here is meant to
deal with those situations.
2. Support package tunnel labels owned by PF. VXLAN and GENEVE
tunnel labels names in the package are changing to incorporate
the PF that owns them.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
8efad8b6a4 net/ice/base: protect profile map list with locks
Add locking mechanism around profile map list.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
966dd8e290 net/ice/base: refactor HW table init function
1. Separated the calls to initialize and allocate the HW XLT tables
from call to fill table. This is to allow the ice_init_hw_tbls call
to be made prior to package download so that all HW structures are
correctly initialized. This will avoid any invalid memory references
if package download fails on unloading the driver.
2. Fill HW tables with package content after successful package download.
3. Free HW table and flow profile allocations when unloading driver.
4. Add flag in block structure to check if lists in block are
initialized. This is to avoid any NULL reference in releasing flow
profiles that may have been freed in previous calls to free tables.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
67ed9ebfd2 net/ice/base: save user provided PHY config
After the transition from cable-unplug to cable-plug events, FW will
clear the set-phy-cfg data, sent by user. Thus, we will need to
cache these info.
1. The submitted data when set-phy-cfg is called. This info will be used
later to check if FW clears out the PHY info, requested by user.
2. The FC, FEC and LinkSpeed, requested by user. This info will be used
later, by device driver, to construct the new input data for the
set-phy-cfg AQ command.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
9a716e7d00 net/ice/base: move RSS replay list
1. Move the RSS list pointer and lock from the VSI context to the ice_hw
structure. This is to ensure that the RSS configurations added to the
list prior to reset and maintained until the PF is unloaded. This will
ensure that the configuration list is unaffected by VFRs that would
destroy the VSI context. This will allow the replay of RSS entries for
VF VSI, as against current method of re-adding default configurations
and also eliminates the need to re-allocate the RSS list and lock post-VFR.
2. Align RSS flow functions to the new position of the RSS list and lock.
3. Adding bitmap for flow type status.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Henry Tieman <henry.w.tieman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
a7dcf506c4 net/ice/base: rollback AVF RSS configurations
Adding support to remove RSS configurations added
prior to failing case in AVF.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
1b969112dc net/ice/base: save queue bandwidth for replay after reset
Added code to save the queue bandwidth information when it is applied
and it is replayed when queue is re-enabled again. Earlier saved value
is used for replay purpose.
Added vsi_handle, tc, and q_handle argument to the ice_cfg_q_bw_lmt,
ice_cfg_q_bw_dflt_lmt.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
f89aa3affa net/ice/base: support removing advanced rule
This patch also contains ice_remove_adv_rule function to remove existing
advanced rules. It also handles the case when we have multiple VSI using
the same rule using the following helper functions:

ice_adv_rem_update_vsi_list - function to remove VS from VSI list for
advanced rules.

Signed-off-by: Shivanshu Shukla <shivanshu.shukla@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
e215716441 net/ice/base: replay advanced rule after reset
Code added to replay the advanced rule per VSI basis and remove the
advanced rule information from shared code recipe list.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
fed0c5ca5f net/ice/base: support programming a new switch recipe
1. Added an interface to support adding advanced switch rules.
2. Advanced rules are provided in a form of protocol headers and values
to match in addition to actions (limited actions are current supported).
3. Retrieve field vectors for ICE configuration package to determine
extracted fields and extracted locations for recipe creation.
4. Chain multiple recipes together to match multiple protocol headers.
5. Add structure to manage the dynamic recipes.

Signed-off-by: Grishma Kotecha <grishma.kotecha@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
afa96f6fb7 net/ice/base: add functions to create new switch recipe
Add functions to support following admin queue commands:
1. 0x0208: allocate resource to hold a switch recipe. This is needed
when a new switch recipe needs to be created.
2. 0x0290: create a recipe with protocol header information and
other details that determine how this recipe filter work.
3. 0x0292: get details of an existing recipe.
4. 0x0291: associate a switch recipe to a profile.

Signed-off-by: Grishma Kotecha <grishma.kotecha@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
e5f50fe608 net/ice/base: add more recipe commands
Add the Add Recipe (0x0290), Recipe to Profile (0x0291), Get Recipe
(0x0292) and Get Recipe to Profile (0x0293) Commands.

Signed-off-by: Lev Faerman <lev.faerman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
ec5545ef44 net/ice/base: fix DCBx initialization
When a port is not cabled, but DCBx is enabled in the firmware, the
status of DCBx will be NOT_STARTED. This is a valid state for FW
enabled and should not be treated as a is_fw_lldp true automatically.

Add the code to treat NOT_STARTED as another valid state.

Fixes: 1082f78654 ("net/ice/base: support DCB")
Cc: stable@dpdk.org

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
53c7ea0c53 net/ice/base: add function to configure MIB
Decouple ice_cfg_lldp_mib_change from the ice_init_dcb function call.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
83a148038e net/ice/base: include DIR flag in extraction sequence
Once upon a time, the ice_flow_create_xtrct_seq() function in ice_flow.c
extracted only protocol fields explicitly specified by the caller of the
ice_flow_add_prof() function via its struct ice_flow_seg_info instances.

However, to support different ingress and egress flow profiles with the
same matching criteria, it would be necessary to also match on the
packet Direction metadata. The primary reason was because there could
not be more than one HW profile with the same CDID, PTG, and VSIG. The
Direction metadata was not a parameter used to select HW profile IDs.

Thus, for ACL, the direction flag would need to be added to the
extraction sequence. This information will be use later as one criteria
for ACL scenario entry matching.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Ilya Maximets
75b66decdb eal: fix positive error codes from probe/remove
According to API, 'rte_dev_probe()' and 'rte_dev_remove()' must
return 0 or negative error code. Bus code returns positive values
if device wasn't recognized by any driver, so the result of
'bus->plug/unplug()' must be converted. 'local_dev_probe()' and
'local_dev_remove()' also has their internal API, so the conversion
should be done there.

Positive on remove means that device not found by driver.
Positive on probe means that there are no suitable buses/drivers,
i.e. device is not supported.

Users of these API fixed to provide a good example by respecting
DPDK API. This also will allow to catch such issues in the future.

Fixes: a3ee360f44 ("eal: add hotplug add/remove device")
Fixes: 244d513071 ("eal: enable hotplug on multi-process")
Cc: stable@dpdk.org

Signed-off-by: Ilya Maximets <i.maximets@samsung.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2019-06-29 21:28:38 +02:00
David Marchand
18218713bf enforce experimental tag at beginning of declarations
Putting a '__attribute__((deprecated))' in the middle of a function
prototype does not result in the expected result with gcc (while clang
is fine with this syntax).

$ cat deprecated.c
void * __attribute__((deprecated)) incorrect() { return 0; }
__attribute__((deprecated)) void *correct(void) { return 0; }
int main(int argc, char *argv[]) { incorrect(); correct(); return 0; }
$ gcc -o deprecated.o -c deprecated.c
deprecated.c: In function ‘main’:
deprecated.c:3:1: warning: ‘correct’ is deprecated (declared at
deprecated.c:2) [-Wdeprecated-declarations]
 int main(int argc, char *argv[]) { incorrect(); correct(); return 0; }
 ^

Move the tag on a separate line and make it the first thing of function
prototypes.
This is not perfect but we will trust reviewers to catch the other not
so easy to detect patterns.

sed -i \
     -e '/^\([^#].*\)\?__rte_experimental */{' \
     -e 's//\1/; s/ *$//; i\' \
     -e __rte_experimental \
     -e '/^$/d}' \
     $(git grep -l __rte_experimental -- '*.h')

Special mention for rte_mbuf_data_addr_default():

There is either a bug or a (not yet understood) issue with gcc.
gcc won't drop this inline when unused and rte_mbuf_data_addr_default()
calls rte_mbuf_buf_addr() which itself is experimental.
This results in a build warning when not accepting experimental apis
from sources just including rte_mbuf.h.

For this specific case, we hide the call to rte_mbuf_buf_addr() under
the ALLOW_EXPERIMENTAL_API flag.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
2019-06-29 19:04:48 +02:00
David Marchand
cfe3aeb170 remove experimental tags from all symbol definitions
We had some inconsistencies between functions prototypes and actual
definitions.
Let's avoid this by only adding the experimental tag to the prototypes.
Tests with gcc and clang show it is enough.

git grep -l __rte_experimental |grep \.c$ |while read file; do
	sed -i -e '/^__rte_experimental$/d' $file;
	sed -i -e 's/  *__rte_experimental//' $file;
	sed -i -e 's/__rte_experimental  *//' $file;
done

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
2019-06-29 19:04:43 +02:00
David Marchand
136ab94a5b net/atlantic: add missing experimental API tags
Those symbols are declared in the library map but the prototypes are
missing the experimental tag.
Without it, existing users won't notice it is experimental.

Fixes: ec0dec44ec ("net/atlantic: enable MACsec configuration")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
2019-06-29 19:04:37 +02:00
David Marchand
da6cab7646 raw/dpaa2_qdma: remove incorrect experimental tag
The incriminated commit promoted this symbol as stable but the
prototype still has the tag.

Fixes: fb1a20331d ("raw/dpaa2_qdma: remove experimental tag from APIs")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
2019-06-29 19:04:30 +02:00
Stephen Hemminger
b11b76c22c bus/vmbus: skip non-network devices
The vmbus scan code can just skip non-network devices.
More importantly, this fixes the bug where some vmbus devices
don't have all the attributes (like monitor_id) and a single
failure would cause the scan to break the loop.

Fixes: 831dba47bd ("bus/vmbus: add Hyper-V virtual bus support")
Cc: stable@dpdk.org

Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com>
2019-06-27 23:13:57 +02:00
Stephen Hemminger
da5fa4d4d6 mempool/octeontx2: fix build with icc
The Intel compiler is pickier about casts and generates:
otx2_mempool_ops.c(344):
     error #191: type qualifier is meaningless on cast type
  	int64_t * const addr = (int64_t * const)
  	                        ^
This is because of the nature of const.
In this example, the expression is being cast into a pointer
that can not be modified. This is meaningless because the
expression is already a lvalue.

See https://en.wikipedia.org/wiki/Const_(computer_programming)

Fixes: d7a0da3c00 ("mempool/octeontx2: add fast path mempool ops")

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-27 08:55:02 +01:00
Marcin Smoczynski
28188cee2a build: enable BSD features visibility for FreeBSD
When a component uses either XOPEN_SOURCE or POSIX_C_SOURCE macro
explicitly in its build recipe, it restricts visibility of a non POSIX
features subset, such as IANA protocol numbers (IPPROTO_* macros).
Non standard features are enabled by default for DPDK both for Linux
thanks to _GNU_SOURCE and for FreeBSD thanks to __BSD_VISIBLE. However
using XOPEN_SOURCE or POSIX_(C_)SOURCE in a component causes
__BSD_VISIBLE to be defined to 0 for FreeBSD, causing different feature
sets visibility for Linux and FreeBSD. It restricts from using IPPROTO
macros in public headers, such as rte_ip.h, despite the fact they are
already widely used in sources.

Add __BSD_VISIBLE macro specified unconditionally for FreeBSD targets
which enforces feature sets visibility unification between Linux and
FreeBSD.

Add single -D_GNU_SOURCE to config/meson.build as a project argument
instead of adding separate directive for each project subtree.

This patch solves the problem of build breaks for [1] on FreeBSD [2]
following the discussion [3].

[1] https://mails.dpdk.org/archives/dev/2019-May/131885.html
[2] http://mails.dpdk.org/archives/test-report/2019-May/082263.html
[3] https://mails.dpdk.org/archives/dev/2019-May/132110.html

Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2019-06-26 16:50:33 +02:00
Rasesh Mody
fabeca044f net/bnx2x: fix icc build
Fix a compilation issue seen with icc 19

Signed-off-by: Rasesh Mody <rmody@marvell.com>
2019-06-26 09:14:24 +02:00
Jerin Jacob
9a8e7062c8 mempool/octeontx2: add devargs for max pool selection
The maximum number of mempools per application needs to be configured
on HW during mempool driver initialization. HW can support up to 1M
mempools, Since each mempool costs set of HW resources, the max_pools
devargs parameter is being introduced to configure the number of
mempools required for the application.
For example:

-w 0002:02:00.0,max_pools=512

With the above configuration, the driver will set up only 512 mempools
for the given application to save HW resources.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
2019-06-25 23:35:57 +02:00
Pavan Nikhilesh
ee338015e7 mempool/octeontx2: add optimized dequeue operation for arm64
This patch adds an optimized arm64 instruction based routine to leverage
CPU pipeline characteristics of octeontx2. The theme is to fill the
pipeline with CASP operations as much HW can do so that HW can do alloc()
HW ops in full throttle.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
d7a0da3c00 mempool/octeontx2: add fast path mempool ops
Add enqueue and dequeue mempool fastpath operations.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
e5271c507a mempool/octeontx2: add remaining slow path ops
Add remaining get_count(), calc_mem_size() and populate() slow path
mempool operations.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
ae930c2cd6 mempool/octeontx2: add mempool free op
The DPDK mempool free operation frees HW AURA
and POOL reserved in alloc operation. In addition to that it free all
the memory resources allocated in mempool alloc operations.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
7bcc47cbe2 mempool/octeontx2: add mempool alloc op
The DPDK mempool allocation reserves a single HW AURA
and POOL in 1:1 map mode. Upon reservation, SW programs the slow path
operations such as allocate stack memory for DMA and
bunch HW configurations to respective HW blocks.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
2548ab774f mempool/octeontx2: add context dump support
Add a helper function to dump aura and pool context for NPA debugging.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vivek Sharma <viveksharma@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
50b95c3ea7 mempool/octeontx2: add NPA IRQ handler
Register and implement NPA IRQ handler for RAS and all type of
error interrupts to get the fatal errors from HW.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
35e628db9d mempool/octeontx2: add NPA HW operations
Implement the low-level NPA HW operations such as
alloc, free memory, etc.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
b6288e236e drivers: add init and fini on octeontx2 NPA object
NPA object needs to initialize memory for queue interrupts context,
pool resource management, etc. This patch adds support for initializing
and finalizing the NPA object.

This patch also updates the otx2_npa_lf definition to meet the init/fini
requirements.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
732377a679 mempool/octeontx2: add build infra and device probe
Add the make and meson based build infrastructure along
with the mempool(NPA) device probe.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-06-25 23:35:57 +02:00
Nithin Dabilpuram
3da1b85b6d common/octeontx2: add FLR IRQ handler
Upon receiving FLR request from VF, It is PF responsibly
forward to AF and enable FLR for VFs.

This patch adds support for VF FLR support in PF.

This patch also add otx2_dev_active_vfs() API to find
the number of active VF for given PF.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
2019-06-25 23:35:57 +02:00
Nithin Dabilpuram
05a58afca1 common/octeontx2: add uplink message support
The events like PHY link status change by AF or PHY configuration
change by PF would call for the uplink message.
The AF initiated uplink would land it in PF and PF would further
forward to VF(if it is intended for that specific VF)

The PF initiated uplink would be distributed to all active VFs.
This patch adds support for the same.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
af3c28fa63 common/octeontx2: add VF mailbox IRQ and msg handler
This patch adds support for PF <-> VF mailbox interrupt
mailbox message interrupt handling.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-06-25 23:35:57 +02:00
Nithin Dabilpuram
302e7d4958 common/octeontx2: add PF to VF mailbox IRQ and msg handlers
PF has additional responsibility being server for VF messages
and forward to AF and once AF process it then forward
the response back to VF.
otx2_vf_pf_mbox_irq() will process the VF mailbox request and
af_pf_wait_msg() will until getting a response back from AF.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2019-06-25 23:35:57 +02:00
Nithin Dabilpuram
9190acdd7a common/octeontx2: add AF to PF mailbox IRQ and msg handlers
This patch adds support for AF to PF mailbox interrupt and message
handling. PF writes the message on mapped mailbox region
followed by writing the mailbox doorbell register. Upon receiving,
the mailbox request in AF(In Linux kernel), It processes the messages
and update the counter memory and update the AF mbox doorbell
register. That would trigger a VFIO interrupt to userspace and
otx2_process_msgs() will handle it.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
0e9734fe41 common/octeontx2: handle intra device operations
The mempool device(NPA) may be provisioned as a standalone device or
it can be part of ethdev/eventdev device. In order to address
mempool as standalone or integrated with ethdev/eventdev device,
An intra device structure being introduced.

When the _first_ ethdev/eventdev PCIe device or standalone mempool(NPA)
devices get probed by the eal PCI subsystem,
The NPA object(struct otx2_npa_lf) stored in otx2_dev base class.
Once it is accomplished, the other consumer drivers like
ethdev driver or eventdev driver use otx2_npa_* API to operate on
shared NPA object.

The similar concept followed for SSO object, Which needs to share between
PCIe devices.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
5868ccdbf1 common/octeontx2: introduce irq handling functions
All PCIe drivers(ethdev, mempool, cryptodev and eventdev) in octeontx2,
needs to handle interrupt for mailbox and error handling.
Create a helper function over rte interrupt API to register,
unregister, disable interrupts.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
e1d9a02ad8 common/octeontx2: introduce common device class
Introduce otx2_dev class to hold octeontx2 PCIe device specific
information and operations.

All PCIe drivers(ethdev, mempool, cryptodev and eventdev) in octeontx2,
inherits this base object to avail the common functionalities such
as mailbox creation, interrupt registration, etc of the PCIe device.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
c707a7332d common/octeontx2: add mailbox send and receive support
Each RVU device has a dedicated 64KB mailbox region
shared with its peer for communication. RVU AF has
a separate mailbox region shared with each of RVU PFs
and an RVU PF has a separate region shared with each of
it's VF.

This patch add use 64KB memory and implemented mailbox
send and receive support.

These set of APIs are used by this driver (RVU AF) and
other RVU PF/VF drivers eg ethdev, cryptodev e.t.c.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
dd543124cd common/octeontx2: add runtime log infra
Various consumers of this common code need runtime
logging infrastructure. This patch adds the same.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
5ca59711f7 common/octeontx2: add mailbox base support infra
This patch adds mailbox init and fini support.
Each RVU device has a dedicated 64KB mailbox region
shared with its peer for communication. RVU AF has
a separate mailbox region shared with each of RVU PFs
and an RVU PF has a separate region shared with
each of it's VF.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-06-25 23:35:57 +02:00
Jerin Jacob
2b71657c86 common/octeontx2: add mbox request and response definition
The admin function driver sits in Linux kernel as mailbox
server. The DPDK AF mailbox client, send the message to mailbox
server to complete the administrative task such as get mac
address.

This patch adds mailbox request and response definition of
existing mailbox defined between AF driver and DPDK driver.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Vivek Sharma <viveksharma@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Signed-off-by: Zyta Szpak <zyta@marvell.com>
2019-06-25 23:35:57 +02:00