This patch sets up and configure hierarchy in hw
nodes. Since all the registers are with RVU AF,
register configuration is also done using mbox
communication.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Allocate and free shaper/scheduler hardware resources for
nodes of hierarchy levels in sw.
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Introduce traffic manager infra and default hierarchy
creation.
Upon ethdev configure, a default hierarchy is
created with one-to-one mapped tm nodes. This topology
will be overridden when user explicitly creates and commits
a new hierarchy using rte_tm interface.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Add queue start and stop operations. Tx queue needs
to update the flow control value, Which will be
added in sub subsequent patch.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
setup tx & rx queues with the previous configuration during
port reconfig, it handles cases like port reconfigure without
reconfiguring tx & rx queues.
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Add RSS support and expose RSS related functions
to implement RSS action for rte_flow driver.
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Add unicast MAC filter for PF device and
update the respective feature list.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add promiscuous and allmulticast mode for PF devices and
update the respective feature list.
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add basic stat operation and updated the feature list.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Add link stats related operations and mark respective
items in the documentation.
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Add register dump support and mark Registers dump in features.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Add device configure operation. This would call lf_alloc
mailbox to allocate a NIX LF and upon return, AF will
return the attributes for the select LF.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Add basic init and uninit function which includes
attaching LF device to probed PCIe device.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Adding bare minimum PMD library and doc build infrastructure
and claim the maintainership for octeontx2 PMD.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Testpmd would stuck and result in core dump when user specifies an
invalid VF queue number, for example when setting txq or rxq to 0.
When txq or rxq is set to 0, pointer of pointer rxq or txq in
function i40evf_configure_vsi_queues is NULL. The usage of txq[i]
or rxq[0] is valid. This patch fixes this issue.
Fixes: d6b1972909 ("i40evf: support configurable crc stripping")
Cc: stable@dpdk.org
Signed-off-by: Andy Pei <andy.pei@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
The definition of ipsec and rsc offloads was incorrect.
Neither one of these is used by current driver, but the values
should be fixed now for future RSC support.
Fixes: 4e9c73e96e ("net/netvsc: add Hyper-V network device")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Kernel validates block size to be aligned to page size. Code works on
platforms with page size 4k, but on others e.g. Arm64 fails with default
parameters.
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
This patch implements additional actions of packet header
modifications.
Add actions:
- INC_TCP_SEQ - Increase sequence number in the outermost TCP header.
- DEC_TCP_SEQ - Decrease sequence number in the outermost TCP header.
- INC_TCP_ACK - Increase acknowledgment number in the outermost TCP
header.
- DEC_TCP_ACK - Decrease acknowledgment number in the outermost TCP
header.
Original work by Xiaoyu Min.
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Set RTE_ETH_DEV_CLOSE_REMOVE upon probe so all the resources
for the port can be freed by rte_eth_dev_close() and the ethdev
port freed.
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
PCI device may be unplugged when ethdev is not closed yet.
Fixes: aaa3f5f0f7 ("net/sfc: add configure and close stubs")
Cc: stable@dpdk.org
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Now that everything that has ever accessed the shared memory
config is doing so through the public API's, we can make it
internal. Since we're removing quite a few headers from
rte_eal_memconfig.h, we need to add them back in places
where this header is used.
This bumps the ABI, so also change all build files and make
update documentation.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: David Marchand <david.marchand@redhat.com>
Currently, the memory hotplug is locked automatically by all
memory-related _walk() functions, but sometimes locking the
memory subsystem outside of them is needed. There is no
public API to do that, so it creates a dependency on shared
memory config to be public. Fix this by introducing a new
API to lock/unlock the memory hotplug subsystem.
Create a new common file for all things mem config, and a
new API namespace rte_mcfg_*, and search-and-replace all
usages of the locks with the new API.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: David Marchand <david.marchand@redhat.com>
When selecting the preferred IOVA mode of the pci bus, the current
heuristic ("are devices bound?", "are devices bound to UIO?", "are pmd
drivers supporting IOVA as VA?" etc..) should honor the device
white/blacklist so that an unwanted device does not impact the decision.
There is no reason to consider a device which has no driver available.
This applies to all OS, so implements this in common code then call a
OS specific callback.
On Linux side:
- the VFIO special considerations should be evaluated only if VFIO
support is built,
- there is no strong requirement on using VA rather than PA if a driver
supports VA, so defaulting to DC in such a case.
Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Anatoly Burakov <anatoly.burakov@intel.com>
When using _mm_set_epi64() rather than _mm_set_epi64x() intrinsic, ICC
tries to use the x87 floating point registers, leading to warnings about
not properly clearing value when switching between x87 and SSE/AVX modes.
error #13203: No EMMS instruction before call to function
Fix this by using the set64x() intrinsic.
Fixes: 0a92e63fc4 ("raw/ioat: add local API to perform copies")
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Tested-by: Anatoly Burakov <anatoly.burakov@intel.com>
Enable an example for rawdev ntb. Support interactive mode to send
file on one host and receive file from another host. The command line
would be 'send [filepath]' and 'receive [filepath]'.
But since the FIFO is not enabled right now, use rte_memcpy as the enqueue
and dequeue functions and only support transmitting file no more than 4M.
Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Add handshake process using doorbell so that two hosts can
communicate to start and stop.
Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Add in the list of registers for the device.
And enable NTB device ops for Intel Skylake platform.
Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Introduce rawdev driver support for NTB (Non-transparent Bridge) which
can help to connect two separate hosts with each other.
Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Sample test to verify DMA functionality, this test covers
internal transfer mode.
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Send message to PF to stop DMA queue when device close is
called from application.
Defined the required data structures to support enqueue and
dequeue APIs.
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Register dev_configure API to configure DPI PCI devices.
After successful initialization send message to PF to open
corresponding DPI DMA queue. At present hardware doesn't
support mail box for DPI, so PMD to PF communication uses
pre build kernel devfs.
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Add the make and meson based build infrastructure along
with the DMA device probe with documentation infrastructure.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
The ARMv8.1 CASP instruction works with even register pairs and since
there no register constraint in older versions of GCC/Clang, use
explicit register allocation to satisfy CASP requirements.
Remove function level optimization specification as Clang doesn't have
support for it and explicit register allocation removes the need for it.
Fixes build issue with arm64-armv8a-linux-clang.
Fixes: ee338015e7 ("mempool/octeontx2: add optimized dequeue operation for arm64")
Reported-by: Gavin Hu <gavin.hu@arm.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
When compiling with clang on 32-bit platforms, we are missing
copies of 64-bit atomic functions. We can solve this by linking
against libatomic for the drivers and libs which need those
atomic ops.
Fixes: f0b9982cb3 ("event/octeontx2: add TIM bucket operations")
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Fix the following ICC specific compilation issue with i686 build.
dpdk/drivers/common/octeontx2/otx2_mbox.c(47): error #2259:
non-pointer conversion from "unsigned long long" to "struct mbox_hdr *"
may lose significant bits
(struct mbox_hdr *)((uintptr_t)mdev->mbase + mbox->tx_start);
Fixes: 732377a679 ("mempool/octeontx2: add build infra and device probe")
Fixes: 371d3212cb ("common/octeontx2: add build infrastructure and HW definition")
Signed-off-by: Amit Gupta <agupta3@marvell.com>
cast unsigned int ports_per_retimer, unsigned int nums_retimer,
unsigned int nums_fvl and unsigned int ports_per_fvl to uint64_t
before multiply operation, to avoid Unintentional integer overflow.
Coverity issue: 337924, 337926
Fixes: d1cd4eb2d4 ("raw/ifpga: support ipn3ke")
Cc: stable@dpdk.org
Signed-off-by: Andy Pei <andy.pei@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Fix the readout retimer link status incorrectly when we
remove the linux intel-fpga-driver and run the DPDK application.
The linux driver will stop the retimer when remove the kernel
modules.
Fixes: 8a256bef ("raw/ifpga/base: add eth group driver")
Cc: stable@dpdk.org
Reported-by: Amrutha Sampath <amrutha.sampath@intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Add local APIs to trigger data copies, and retrieve handle values once
those copies are completed. Included are unit tests to validate the data
is copies correctly.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Add stats functions to track what is happening in the driver, and put
unit tests to check those.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Allow initializing a driver instance. Include selftest to validate these
functions.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Add in the "info_get" function to the driver, to allow us to query the
device. This allows us to have the unit test pick up the presence of
supported hardware or not.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Add the create/destroy driver functions so that we can actually allocate
a rawdev and destroy it when done. No rawdev API functions are actually
implemented at this point.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Add in the list of registers for the device. File is taken from the SPDK
project:
https://github.com/spdk/spdk/blob/master/include/spdk/ioat_spec.h
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Add stubs for ioat rawdev driver support in DPDK, specifically:
* makefile and meson build hooks
* initial public header file
* rawdev main C file, with probe and release functions
* release note update announcing the driver
* initial documentation for the new section in the rawdev doc
* unit test stubs for device unit tests
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
TCP flags were moved to the TCP header file from the Ethernet control
header file, and the RTE prefix was added to their names.
Missing TCP ECN flags were added.
The ALL mask did not include TCP ECN flags, so it was renamed to reflect
that it applies to N-tuple filtering only.
Updated other files affected by the renaming accordingly.
Signed-off-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
For tx checksum offload it is not mandatory to provide
a valid packet_type in addition to a valid ol_flags.
This patch only use ol_flags information for this feature
as a performance improvement.
Signed-off-by: Liron Himi <lironh@marvell.com>
Reviewed-by: Yuri Chipchev <yuric@marvell.com>
Tested-by: Liron Himi <lironh@marvell.com>
This patch adds ice_flow_create, ice_flow_destroy,
ice_flow_flush and ice_flow_validate support,
these are used to handle all the generic filters.
Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
The patch enables the backend of rte_flow. It transfers
rte_flow_xxx to device specific data structure and
configures packet process engine's binary classifier
(switch) properly.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
The offset for the inner L2 header in the dummy GRE packet
was off by 2 bytes so updated the offset.
Fixes: 839c0a4b77 ("net/ice/base: enable additional switch rules")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Add protocol definitions for ethertype.
Add ice_ethtype_hdr structure definition into the ice_prot_hdr union.
Add ethtype offsets into the training packet maps.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Tested-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
- Add IPv6 switch rule support.
- Add IPv6 training packet.
- Correct name of IPv6 header variable.
- Fix enum values so that they point to the proper
ice_prot_ext_tbl_entry field.
Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Modify AFU configurations for new BBS (Blue Bitstream) of A10 on N3000
card:
- AFU register access: RTL changes the UPL (User Programmable Logic
which is the container of vBNG IP) base address and the read/write
commands of register indirect access.
- Poll the INIT_STS register to wait for the vBNG IP and DDR reset
completion.
- Refine log for debug: print UPL_version not only for vBNG bit stream,
but also for other bit streams.
Fixes: c01c748e4a ("net/ipn3ke: add new driver")
Cc: stable@dpdk.org
Signed-off-by: Dan Wei <dan.wei@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.
Example:
--dev "0002:0e:00.0,tim_ring_ctl=[2-1023-1-0]"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add devargs to limit the max number of TIM rings reserved on probe.
Since, TIM rings are HW resources we can avoid starving other
applications by not grabbing all the rings.
Example:
--dev "0002:0e:00.0,tim_rings_lmt=2"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add event timer adapter statistics get and reset functions.
Stats are disabled by default and can be enabled through devargs.
Example:
--dev "0002:0e:00.0,tim_stats_ena=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add event timer arm timeout burst function.
All the timers requested to be armed have the same timeout.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add internal SSO functions to allow event adapters to resize SSO buffers
that are used to hold in-flight events in DRAM.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add devargs support to modify number of chunk slots. Chunks are used to
store event timers, a chunk can be visualised as an array where the last
element points to the next chunk and rest of them are used to store
events. TIM traverses the list of chunks and enqueues the event timers
to SSO.
If no argument is passed then a default value of 255 is taken.
Example:
--dev "0002:0e:00.0,tim_chnk_slots=511"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
If the chunks are allocated from NPA then TIM can automatically free
them when traversing the list of chunks.
Add devargs to disable NPA and use software mempool to manage chunks.
Example:
--dev "0002:0e:00.0,tim_disable_npa=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Allow TIM to optimize user supplied configuration based on
RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES flag.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
When the application calls timer adapter create the following is used:
- Allocate a TIM lf based on number of lf's provisioned.
- Verify the config parameters supplied.
- Allocate memory required for
* Buckets based on min and max timeout supplied.
* Allocate the chunk pool based on the number of timers.
On Free:
- Free the allocated bucket and chunk memory.
- Free the TIM lf allocated.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add selftest to verify sanity of SSO.
Can be run by passing devargs to SSO PF as follows:
Example:
--dev "0002:0e:00.0,selftest=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
SSO GGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO GGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to GGRPs based on a preconfigured threshold.
We can control the QoS of SSO GGRP by modifying the above mentioned
thresholds. GGRPs that have higher importance can be assigned higher
thresholds than the rest.
Example:
--dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]
Qx -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.
The values need to be expressed in terms of percentages, 0 represents
default.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Octeontx2 SSO by default is set to use dual workslot mode.
Add devargs option to force legacy mode i.e. single workslot mode.
Example:
--dev "0002:0e:00.0,single_ws=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
OcteonTx2 AP core SSO cache contains two entries each entry caches
state of an single GWS aka event port.
AP core requests events from SSO by using following sequence :
1. Write to SSOW_LF_GWS_OP_GET_WORK
2. Wait for SSO to complete scheduling by polling on SSOW_LF_GWS_TAG[63]
3. SSO notifies core by clearing SSOW_LF_GWS_TAG[63] and if work is
valid SSOW_LF_GWS_WQP is non-zero.
The above sequence uses only one in-core cache entry.
In dual workslot mode we try to use both the in-core cache entries by
triggering GET_WORK on a second workslot as soon as the above sequence
completes. This effectively hides the schedule latency of SSO if there
are enough events with unique flow_tags in-flight.
This mode reserves two SSO GWS lf's for each event port effectively
doubling single core performance.
Dual workslot mode is the default mode of operation in octeontx2.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Add support for retrieving statistics from SSO GWS and GGRP.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Register and implement SSO GWS and GGRP IRQ handlers for error
interrupts.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Links between queues and ports are controlled by setting/clearing GGRP
membership in SSOW_LF_GWS_GRPMSK_CHG.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
The number of events for a *open system* event device is specified
as -1 as per the eventdev specification.
Since, Octeontx2 SSO inflight events are only limited by DRAM size, the
xae_cnt devargs parameter is introduced to provide upper limit for
in-flight events.
Example:
--dev "0002:0e:00.0,xae_cnt=8192"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add the device configure function that attaches the requested number of
SSO GWS(event ports) and GGRP(event queues) LF's to the PF.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add the info_get function to return details on the queues, flow,
prioritization capabilities, etc. which this device has.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
SSO object needs to be initialized to communicate with the kernel AF
driver through mbox using the common API's.
Also, initialize the internal eventdev structure to defaults.
Attach NPA lf to the PF if needed.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add the make and meson based build infrastructure along with the
eventdev(SSO) device probe.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
For each driver where we optionally disable it, add in the reason why it's
being disabled, so the user knows how to fix it.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
When configuring with meson we print out a list of enabled components, but
it is also useful to list out the disabled components and the reasons why.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
When running self-tests, the driver needs to know the device on which to
run the tests, so we need to take the device ID as parameter. Only the
skeleton driver is providing this selftest capability right now, so we can
easily update it for this change.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Use a variable value rather than compile-time constant zero as the
device id for the skeleton rawdev tests. This ensures we can make the
tests work even if other rawdevs are present.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Using memory on the stack instead of on the heap by calling malloc
also avoid memory leak in case of test case failures
Fixes: 88d0e47880 ("raw/skeleton: fix memory leak on test failure")
Cc: stable@dpdk.org
Signed-off-by: Thinh Tran <thinhtr@linux.vnet.ibm.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
The default policy for offload-specific fields is that
they are undefined unless the corresponding offloads are
requested in mbuf ol_flags. This is also the case for outer
L2 and L3 length fields which must not be assumed to contain
zeros for non-tunnel packets. The patch clarifies this behaviour
in the comments and also adds appropriate checks to the PMDs which
do not check any tunnel-related offloads before using the said fields.
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Multi-process support for memif PMD.
Primary process handles connection establishment.
Secondary process queries for memory regions.
Signed-off-by: Jakub Grajciar <jgrajcia@cisco.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
This patch enables need_wakeup flag for Tx and fill rings, when this
flag is set by the driver, it means that the userspace application has
to explicitly wake up the kernel Rx or kernel Tx processing by issuing
a syscall. Poll() can wake up both and sendto() or its alternatives
will wake up Tx processing only.
This feature is to provide efficient support for case that application
and driver executing on the same core.
Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
It can be useful to use pcap files for some rudimental performance
testing. This patch enables this functionality in the pcap driver.
At a high level, this works by creating a ring of sufficient size to
store the packets in the pcap file passed to the application. When the
rx function for this mode is called, packets are dequeued from the ring
for use by the application and also enqueued back on to the ring to be
"received" again.
A tx_drop mode is also added since transmitting to a tx_pcap file isn't
desirable at a high traffic rate.
Jumbo frames are not supported in this mode. When filling the ring at rx
queue setup time, the presence of multi segment mbufs is checked for.
The PMD will exit on detection of these multi segment mbufs.
Signed-off-by: Cian Ferriter <cian.ferriter@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
The argument lists on some of the device creation functions are quite
large. Using a struct to hold the user options parsed in
'pmd_pcap_probe' will allow for cleaner function calls and definitions.
Adding user options will also be easier.
Signed-off-by: Cian Ferriter <cian.ferriter@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
The id values for VF stats were not being offset correctly.
And getting xstats for VF device only worked if VF device supported
it; it did not support the generic stats.
Fixes: dc7680e859 ("net/netvsc: support integrated VF")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
The xstats_get was not setting id correctly for each entry.
Fixes: 4e9c73e96e ("net/netvsc: add Hyper-V network device")
Cc: stable@dpdk.org
Signed-off-by: Mohsin Mazhar Shaikh <mohsinmazhar_shaikh@trendmicro.com>
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Use the result from querying host to show the RSS info.
Fixes: 4e9c73e96e ("net/netvsc: add Hyper-V network device")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com>
This is to fix the error:
```
drivers/net/mlx5/mlx5_defs.h:14:26:
error: format '%lx' expects argument of type 'long unsigned int',
but argument 5 has type 'off_t {aka long long int}' [-Werror=format=]
drivers/net/mlx5/mlx5_txq.c:569:48: note: format string is defined here
DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%lx"
~~^
%llx
```
Which reproduces with gcc (Ubuntu 7.4.0-1ubuntu1~18.04.1) 7.4.0.
Fixes: 6bf10ab69b ("net/mlx5: support 32-bit systems")
Cc: stable@dpdk.org
Signed-off-by: Ali Alnubani <alialnu@mellanox.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
This patch add package sending and receiving function codes.
Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add build and doc files along with hinic_pmd_ethdev.c
which just includes PMD register and log initialization
for compilation.
Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add various headers that define mgmt commands, cmdq commands
and basic defines for use in the code.
Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Work queue is used for cmdq and Rx/Tx buff description.
NIC business needs to configure cmdq context and txq/rxq
context. This patch adds data structures and function codes
for work queue and context.
Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
The items of configurations and queries for NIC business include
MAC, VLAN, MTU, RSS and so on. These configurations and queries
are handled by mgmt module. This patch introduces related
data structures and function codes.
Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add code for hardware operation, including configuration,
query and so on.
Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Mgmt module is a kind of administration module for the chip.
It is responsible for handling administration command from host.
It uses api channel. This patch adds related data structures,
packaged interfaces and function codes.
Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Eqs include aeq and ceq. PMD supports aeq only. Aeq is a kind of
queue for mgmt asynchronous message and mgmt command response message.
This patch introduces data structures, initialization, and related
interfaces about aeq.
Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Microcode is named ucode in Hi1822. Its main responsibility is data
transmission and reception. But it can also handle some administration
works. It uses cmdq mechanism. This patch introduces data structures,
initialization, interfaces, and commands sending functions of cmdq.
Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
API command channel is for communicating with mgmt module of chip.
This patch introduces data structures, initialization, interfaces,
and commands sending functions of API command channel.
Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
This patch adds some HW interfaces for bar operation interfaces,
including: mapped bar address getting, HW attributes getting,
msi-x reg operation, function type getting and so on.
Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
If we don't clear mac_addrs, ethdev will double free it on cleanup.
Fixes: e16adf08e5 ("ethdev: free all common data when releasing port")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
mac_addrs points to a field in dev_private.
We can't let ethdev free it.
Fixes: e16adf08e5 ("ethdev: free all common data when releasing port")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Clearing mac_addrs on remove will prevent ethdev from freeing it.
Fixes: 6435f9a0ac ("net/nfb: add new netcope driver")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
