Commit Graph

4764 Commits

Author SHA1 Message Date
Satha Rao
2fced8a1c1 net/cnxk: support basic port/queue statistics
This patch implements regular port statistics and queue mapping set
api to get queue statistics

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2021-06-30 01:22:49 +02:00
Sunil Kumar Kori
a7ce2f546f net/cnxk: support Rx interrupt
Application may choose to enable/disable interrupts on Rx queues
so that application can select its processing if no packets are
available on queues for a longer period.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2021-06-30 01:08:04 +02:00
Sunil Kumar Kori
aa898299d3 net/cnxk: support EEPROM module queries
Patch implements eeprom module info get ethops for cn9k and
cn10k platforms.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2021-06-30 01:00:41 +02:00
Sunil Kumar Kori
d2bebb1fee net/cnxk: support flow control operations
Patch implements set and get operations for flow control.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2021-06-30 00:45:54 +02:00
Sunil Kumar Kori
611c771c35 net/cnxk: support Rx/Tx burst mode query
Patch implements ethdev operations to get Rx and Tx burst
mode.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2021-06-30 00:38:32 +02:00
Sunil Kumar Kori
325d79c00a net/cnxk: support all multicast
L2 multicast packets can be allowed or blocked. Patch implements
corresponding ethops.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2021-06-30 00:31:11 +02:00
Sunil Kumar Kori
cbb8c8098c net/cnxk: support DMAC filter
DMAC filter support is added for cn9k and cn10k platforms.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2021-06-30 00:23:48 +02:00
Sunil Kumar Kori
9cc3f3417f net/cnxk: support promiscuous mode
Add device operations to enable and disable promisc mode
for cn9k and cn10k.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2021-06-30 00:16:23 +02:00
Sunil Kumar Kori
8589ec212e net/cnxk: support MTU set
This Patch implements mtu set dev op for cn9k and cn10k platforms.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2021-06-30 00:09:00 +02:00
Nithin Dabilpuram
89df2225c9 net/cnxk: add device start and stop
Add device start and stop operation callbacks for
CN9K and CN10K. Device stop is common for both platforms
while device start as some platform dependent portion where
the platform specific offload flags are recomputed and
the right Rx/Tx burst function is chosen.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-29 23:54:17 +02:00
Jerin Jacob
19f3af2371 net/cnxk: add Tx burst for CN10K
Add Tx burst scalar version for CN10K.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
2021-06-29 23:32:09 +02:00
Jerin Jacob
77100cc8fe net/cnxk: add vector Rx for CN10K
Add Rx burst vector version for CN10K.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-29 23:24:49 +02:00
Nithin Dabilpuram
706eeae607 net/cnxk: add multi-segment Rx for CN10K
Add Rx burst multi-segment version for CN10K.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-06-29 23:17:31 +02:00
Nithin Dabilpuram
06d7544052 net/cnxk: support queue start and stop
Add Rx/Tx queue start and stop callbacks for
CN9K and CN10K.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-29 22:18:36 +02:00
Nithin Dabilpuram
7ee79e83fd net/cnxk: support packet type
Add support for packet type lookup on Rx to translate HW
specific types to  RTE_PTYPE_* defines

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-29 22:11:16 +02:00
Nithin Dabilpuram
a24af6361e net/cnxk: add Tx queue setup and release
aDD tx queue setup and release for CN9K and CN10K.
Release is common while setup is platform dependent due
to differences in fast path Tx queue structures.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-29 22:03:54 +02:00
Nithin Dabilpuram
a86144cd9d net/cnxk: add Rx queue setup and release
Add Rx queue setup and release op for CN9K and CN10K
SoC. Release is completely common while setup is platform
dependent due to fast path Rx queue structure variation.
Fastpath is platform dependent partly due to core cacheline
size difference.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-29 21:56:32 +02:00
Nithin Dabilpuram
0f5ee447f5 net/cnxk: support link status update
Add link status update callback to get current
link status.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-29 21:49:12 +02:00
Nithin Dabilpuram
b75e0aca84 net/cnxk: add device configuration operation
Add device configuration op for CN9K and CN10K. Most of the
device configuration is common between two platforms except for
some supported offloads.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-29 21:41:53 +02:00
Nithin Dabilpuram
dac12650eb net/cnxk: support device infos query
Add support to retrieve dev infos get for CN9K and CN10K.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-29 21:34:36 +02:00
Nithin Dabilpuram
d25433c7a8 net/cnxk: add common devargs parsing
Add various devargs parsing command line arguments
parsing functions supported by CN9K and CN10K.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-29 21:27:16 +02:00
Nithin Dabilpuram
47db46bb76 net/cnxk: add build infra and common probing
Add build infrastructure and common probe and remove for cnxk driver
which is used by both CN10K and CN9K SoC.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-29 21:12:43 +02:00
Tomasz Duszynski
82a153151f raw/cnxk_bphy: support BPHY self test
Add support for performing selftest.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:48 +02:00
Tomasz Duszynski
64fa1ebd7c raw/cnxk_bphy: support registering BPHY IRQ handlers
Custom IRQ handlers may be registered/removed on demand.
Since registration and removal are related they are in the
same patch.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:46 +02:00
Tomasz Duszynski
e50cb22331 raw/cnxk_bphy: support retrieving BPHY device memory
Allow user to retrieve baseband phy memory resources.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:44 +02:00
Tomasz Duszynski
7cf1976845 raw/cnxk_bphy: support interrupt init and cleanup
Add support for interrupt initialization and cleanup. Internally
interrupt initialization performs low level setup that allows
custom interrupt handler registration later on.

Interrupt initialization and cleanup are related hence they
are in the same patch.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:35 +02:00
Tomasz Duszynski
4d2b226726 raw/cnxk_bphy: support CGX self test
Add support for performing selftest operation.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:32 +02:00
Tomasz Duszynski
df39890f0c raw/cnxk_bphy: support CGX enqueue operation
Add support for enqueueing messages.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:29 +02:00
Tomasz Duszynski
8614a69195 raw/cnxk_bphy: support reading CGX queue count
Add support for reading number of available queues i.e number
of available logical macs (LMACs).

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:24 +02:00
Tomasz Duszynski
3d27e49e07 raw/cnxk_bphy: add BPHY CGX/RPM skeleton driver
Add baseband PHY CGX/RPM skeleton driver which merely probes a matching
device. CGX/RPM are Ethernet MACs hardwired to baseband subsystem.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:16 +02:00
Xueming Li
1afce3086c bus/auxiliary: introduce auxiliary bus
Auxiliary bus [1] provides a way to split function into child-devices
representing sub-domains of functionality. Each auxiliary device
represents a part of its parent functionality.

Auxiliary device is identified by unique device name, sysfs path:
  /sys/bus/auxiliary/devices/<name>

Devargs legacy syntax of auxiliary device:
  -a auxiliary:<name>[,args...]
Devargs generic syntax of auxiliary device:
  -a bus=auxiliary,name=<name>/class=<class>/driver=<driver>[,args...]

[1] kernel auxiliary bus document:
https://www.kernel.org/doc/html/latest/driver-api/auxiliary_bus.html

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-07-05 18:11:28 +02:00
Thomas Monjalon
dbba7c9efb eal: save error in string copy
The string copy api rte_strscpy() did not set rte_errno during failures,
instead it just returned negative error number.

Set rte_errrno if the destination buffer is too small.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-07-05 15:11:30 +02:00
Ajit Khaparde
478614ee1f doc: fix default burst size in testpmd
Default burst size in testpmd has been changed from 16 to 32
for some time now. But the documentation had not been updated.

Fixes: 836853d3d4 ("app/testpmd: increase default burst size to 32")
Cc: stable@dpdk.org

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-06-17 09:47:25 +02:00
Kevin Traynor
f56a6ca4ed doc: fix typo in SPDX tag
A stray character got added. Remove it.

Fixes: cb056611a8 ("eal: rename lcore master and slave")
Cc: stable@dpdk.org

Signed-off-by: Kevin Traynor <ktraynor@redhat.com>
2021-06-17 09:43:25 +02:00
Lance Richardson
c4e4c18963 net/bnxt: add AVX2 RX/Tx
Implement AVX2 vector PMD.

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-06-07 23:36:13 +02:00
David Marchand
66b3a54b9f version: 21.08-rc0
Start a new release cycle with empty release notes.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-21 20:07:04 +02:00
John McNamara
b69512462e doc: update release notes for 21.05
Fix grammar, spelling and formatting of DPDK 21.05 release notes.

Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-05-21 16:52:55 +02:00
Kevin Traynor
146132eeb2 doc: update backport guidelines
Updating the docs to elaborate on the stable release
characteristics and better document the current practice
about new features in stable releases.

Signed-off-by: Kevin Traynor <ktraynor@redhat.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Acked-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
2021-05-21 16:22:21 +02:00
Thomas Monjalon
4821fa1099 doc: improve lstopo tip
The tool lstopo from hwloc package can provide a graphical
or textual view.
In its textual form, the option --merge gives a shorter summary
which fits well with the DPDK need.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-21 15:42:02 +02:00
Thomas Monjalon
520e2b67e9 doc: explain steps for improved code spell checking
The script build-dict.sh was added in DPDK 20.08.
It generates a better dictionary for spell checking
done via checkpatch.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-05-21 15:41:57 +02:00
Timothy McDaniel
fcc5489c18 event/dlb2: select scalar dequeue by default
Optimized dequeue using x86 vector instructions was added
in 21.05, but due to limited testing the default has been
changed back to the scalar mode implementation. The vector mode
implementation can be enabled via the devargs option
"vector_opts_enabled=<y/Y>".

Fixes: 000a7b8e75 ("event/dlb2: optimize dequeue operation")

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
2021-05-21 15:40:52 +02:00
Timothy McDaniel
9e35ae0700 doc: fix runtime options in DLB2 guide
Convert to PCI "--allow" devarg format.
The documentation was previously using the "--vdev" form, which cannot
be used with the DLB2 PF PMD.

Fixes: f3cad285bb ("event/dlb2: add infos get and configure")
Fixes: f7cc194b0f ("event/dlb2: add enqueue and its burst variants")
Fixes: a2e4f1f5e7 ("event/dlb2: add dequeue and its burst variants")
Fixes: 95aa7101cd ("doc: add some features to DLB2 guide")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
2021-05-21 15:40:03 +02:00
Timothy McDaniel
0e94408f00 event/dlb2: remove references to deferred scheduling
Deferred scheduling is a DLB v1.0 feature, and is not valid for
DLB v2.0 or v2.5.

Fixes: bc62748bd7 ("event/dlb2: add private data structures and constants")
Fixes: a2e4f1f5e7 ("event/dlb2: add dequeue and its burst variants")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-21 15:40:02 +02:00
Pablo de Lara
5a36ec7351 doc: support IPsec Multi-buffer lib v1.0
Updated AESNI MB and AESNI GCM, KASUMI, ZUC and SNOW3G PMD documentation
guides with information about the latest Intel IPSec Multi-buffer
library supported.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2021-05-20 23:10:22 +02:00
Kevin Traynor
71acf81bf7 doc: add GCC 11 and clang 12 support to release notes
Note added support for GCC 11 and clang 12 in the
DPDK 21.05 release notes.

Signed-off-by: Kevin Traynor <ktraynor@redhat.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-05-20 23:10:22 +02:00
Ferruh Yigit
e32b525aae doc: clarify PMD order in release notes
PMD updates are expected in alphabetical order based on their vendor
name. Clarify this expectation in the section comment.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-05-20 09:34:54 +02:00
Conor Walsh
413c75c33c doc: show how to include code in guides
Currently the documentation describes how to add code snippets to the
docs using code blocks. This can be problematic as the code snippets
in the docs may fall out of sync with the actual code it is referencing
within DPDK. This patch adds instructions to the contribution guide
about how to include code in the docs using literalinclude which will
dynamically get the code from source when the docs are generated. This
will help to ensure that the code within the docs is up to date and not
out of sync with the actual code.

Signed-off-by: Conor Walsh <conor.walsh@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-19 23:36:02 +02:00
Adam Dybkowski
a395143ac9 doc: fix release notes for QAT compression PMD
This patch extends the DPDK 21.05 release notes with the QAT GEN3
compression update.

Fixes: da573c0e42 ("compress/qat: enable compression on GEN3")

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2021-05-19 14:54:29 +02:00
Thomas Monjalon
05577f145e doc: remove obsolete future considerations in flow guide
After 4 years, rte_flow has evolved enough to not require
special notes about what could be added in future.
Part of the removed plans were obsolete anyway.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ori Kam <orika@nvidia.com>
2021-05-19 21:27:26 +02:00
Stephen Hemminger
d2feae68bf doc: update minimum supported Linux kernel
The DPDK project is only committed to supporting upstream kernel
versions that are still in support. The 3.16 kernel has reached
End Of Life (in June 2020). The next LTS kernel is 4.4 and is
supported until February 2020.

This does not change the existing policy that distribution kernels
that are older are still supported.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-19 18:40:49 +02:00
Asaf Penso
bdbe00de10 doc: fix description of some mlx5 features
The support of the new RTE_FLOW_ITEM_TYPE_INTEGRITY
was added in the release notes 21.02 by mistake.

The support of the Sub-Function representors was missing
in the release notes and the mlx5 guide.

Fixes: 79f8952783 ("net/mlx5: support integrity flow item")
Fixes: cb95feefdd ("net/mlx5: support sub-function representor")

Signed-off-by: Asaf Penso <asafp@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-19 16:20:35 +02:00
Yan Xia
974edb66c0 doc: add tested Intel platforms with Intel NICs
Add tested Intel platforms with Intel NICs to v21.05 release note.

Signed-off-by: Yan Xia <yanx.xia@intel.com>
2021-05-19 14:33:19 +02:00
Raslan Darawsheh
edd89fd53f doc: add tested platforms with Mellanox NICs
Add tested platforms with Mellanox NICs to the 21.05 release notes.

Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>
2021-05-19 12:54:56 +02:00
Stephen Hemminger
0df466959f doc: add SPDX tag to custom CSS file
Trivial file, but add SPDX license tag per policy.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-19 11:02:02 +02:00
Thomas Monjalon
0a91cdd486 doc: add flow API features tables
The NICs overview table lists all supported features per driver.
There was a single row for "Flow API",
although rte_flow is composed of many items and actions.

The row "Flow API" is replaced with two new tables for items and actions.

Also, since rte_flow is not implemented in all drivers,
it would be ugly to add empty sections in some files.
That's why the error message for missing INI section is removed.

The lists are sorted alphabetically.
The extra files for some VF and vectorized data paths are not filled.

Signed-off-by: Asaf Penso <asafp@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Kiran Kumar K <kirankumark@marvell.com>
---
v6 changes:
	- rebase/update
	- remove deprecated shared action
2021-05-18 19:06:56 +02:00
Thomas Monjalon
37f8bd7ede doc: rename sfc features file
The driver directory is drivers/net/sfc
but the features file was doc/guides/nics/features/sfc_efx.ini.

sfc_efx.ini is renamed sfc.ini to match the driver directory name.
It will help automatic checks of this file.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-18 17:59:39 +02:00
Ciara Power
e65da89c15 test/crypto: build block-cipher suite dynamically
In the existing implementation, the blockcipher test cases are being run
and reported as one test case per type, even though multiple test cases
are hidden in each. For example, "test_AES_chain_all" runs 46 test cases.
Each blockcipher type should have a testsuite instead.

The blockcipher testsuite is dynamically built, depending on the
blockcipher type chosen. The testcase struct is modified to allow
running a testcase with data, which is used for data required when
running each blockcipher testcase.

The blockcipher testsuites are added dynamically to parent testsuites
as sub-testsuites where needed.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Tested-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-05-12 16:17:07 +02:00
Michal Krawczyk
b418f0d299 net/ena: indicate Rx RSS hash presence
To make it possible to the app to determine if the hash was calculated
for the packet or not, the PKT_RX_RSS_HASH should be set in the mbuf's
ol_flags.

As the PMD wasn't setting that, the application couldn't check if there
is a hash in a proper way.

The hash is valid only if it's UDP or TCP and the IP packet wasn't
fragmented.

Fixes: e5df9f33db ("net/ena: fix passing RSS hash to mbuf")
Cc: stable@dpdk.org

Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Igor Chauskin <igorch@amazon.com>
Reviewed-by: Amit Bernstein <amitbern@amazon.com>
2021-05-12 14:19:02 +02:00
Haifei Luo
c5c507100e app/testpmd: support action meter color
Currently action RTE_FLOW_ACTION_TYPE_METER_COLOR is defined.
Add the CLI for this action:  color type (types)
There are three types: green, yellow and red.

Example for the new policy meter CLIs:
   add port meter policy 0 1 g_actions color type green / end y_actions
     color type yellow / end r_actions color type red / end

In the above command, the action type is
RTE_FLOW_ACTION_TYPE_METER_COLOR, the meter policy action list:
green -> green, yellow -> yellow, red -> red.

Signed-off-by: Haifei Luo <haifeil@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-05-12 14:06:27 +02:00
John Daley
61c7b522d9 net/enic: enable GENEVE offload via VNIC configuration
The admin-configured vNIC settings (i.e. via CIMC or UCSM) now include
Geneve offload. Use that setting to decide whether to enable or
disable Geneve offload and remove the devarg 'geneve-opt'.

Also, the firmware now allows the driver to change the Geneve port
number. So extend udp_tunnel_port_{add,del} to accept Geneve port, in
addition to VXLAN.

Fixes: 93fb21fdbe ("net/enic: enable overlay offload for VXLAN and GENEVE")
Cc: stable@dpdk.org

Signed-off-by: John Daley <johndale@cisco.com>
Reviewed-by: Hyong Youb Kim <hyonkim@cisco.com>
2021-05-11 23:52:26 +02:00
Min Hu (Connor)
63a0f65c95 doc: add more description in hns3 guide
This patch adds more description for hns3 PMD document, that is:
'Sample Application Notes', 'Statistics','Performance tuning'.

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-05-11 16:30:41 +02:00
Michal Krawczyk
b4f8decd38 net/ena/base: unify parameter names for functions
Instead of using 'queue' for struct ena_com_admin_queue and 'dev' for
struct ena_com_dev variables, use more descriptive 'admin_queue' and
'ena_dev'.

This also unifies the names of variables of the type struct ena_com_dev
in the driver.

Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Igor Chauskin <igorch@amazon.com>
Reviewed-by: Guy Tzalik <gtzalik@amazon.com>
2021-05-11 15:00:43 +02:00
Igor Chauskin
142778b370 net/ena: switch memcpy to optimized version
memcpy is now mapped to rte_memcpy macro on x86 architectures.

Fixes: 9ba7981ec9 ("ena: add communication layer for DPDK")
Cc: stable@dpdk.org

Signed-off-by: Igor Chauskin <igorch@amazon.com>
Reviewed-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Artur Rojek <ar@semihalf.com>
2021-05-11 15:00:43 +02:00
Thomas Monjalon
428eaeb822 doc: remove PDF requirements
The documentation is generated in HTML only.
The PDF format is abandoned since DPDK 20.11
while dropping support of the make-based build.

This decision has been mentioned by the Technical Board:
https://mails.dpdk.org/archives/dev/2021-January/195549.html

Fixes: 3cc6ecfdfe ("build: remove makefiles")
Cc: stable@dpdk.org

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-05-12 16:52:20 +02:00
Thomas Monjalon
86ff066363 doc: fix build with Sphinx 4
Sphinx 4.0 became stricter with permalink configuration:
"
html_add_permalinks has been deprecated since v3.5.0.
Please use html_permalinks and html_permalinks_icon instead.
"

The new variable is used while keeping compatibility
with older Sphinx versions.

Cc: stable@dpdk.org

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-05-11 23:01:06 +02:00
David Marchand
c3946acf22 doc: fix Arm SoCs list
Keep the list of SoCs in a single place and include it so that the
documentation won't get outdated.

Fixes: 8f5ea6a464 ("config/arm: fix implementer and its SoCs")
Fixes: 1b4c86a721 ("config/arm: add Marvell CN10K")
Fixes: 7cf32a22b2 ("config/arm: add Hisilicon kunpeng")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-05-06 09:41:25 +02:00
Bing Zhao
4f74cb68b9 net/mlx5: support connection tracking between two ports
After creating a connection tracking context, it can be used between
two ports. For each port, the flow for one direction traffic will
be created.

The context can only be shared between the owner port and the peer
port that was specified when being created. Only the owner port
could update the context or query it in current implementation.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-05-05 14:30:18 +02:00
Bing Zhao
2db75e8b1d net/mlx5: add actions for connection tracking creation
Allocating a CT from the management pools and creating the DR actions
for both directions by default.

If there is no available connection tracking action, a new pool will
be created with a fixed size bulk allocation. Right now, all the
resources are controlled by the linked list.

The ASO connection tracking context associated with these actions
need to be updated via WQE before using for steering.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-05-05 14:30:13 +02:00
Bing Zhao
8ebbc01f42 net/mlx5: use meter color register for connection tracking
Based on the capacity, 3 registers could be used. Due to the register
allocation, only the one REG_C_3 for meter color could be reused
right now.

Then in the same flow, no more than one ASO action can be supported.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-05-05 14:30:11 +02:00
Bing Zhao
0c6285b727 common/mlx5: check connection tracking offload capability
During startup, the ASO connection tracking offload capability could
be queried via HCA_CAP_QUERY command. If the HW doesn't support ASO
CT, the value would be 0 by default. The following initialization
should be skipped and the creation of the CT object should return
a failure directly.

The following CT creation should also check this capability. With
the old driver, the pre-processing macro should be used in order to
make the compiling pass.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-05-05 14:30:10 +02:00
Alexander Kozyrev
a8f0df6bf9 net/mlx5: support power monitoring
Support the PMD power management API in MLX5 driver.
The monitor policy of this API puts a CPU core to sleep until
a data in some monitored memory address is changed by the NIC.
Implement the get_monitor_addr function to return an address
of a CQE owner bit to monitor the arrival of a new packet.

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-05-03 12:12:42 +02:00
David Marchand
ca7036b4af vhost: fix offload flags in Rx path
The vhost library currently configures Tx offloading (PKT_TX_*) on any
packet received from a guest virtio device which asks for some offloading.

This is problematic, as Tx offloading is something that the application
must ask for: the application needs to configure devices
to support every used offloads (ip, tcp checksumming, tso..), and the
various l2/l3/l4 lengths must be set following any processing that
happened in the application itself.

On the other hand, the received packets are not marked wrt current
packet l3/l4 checksumming info.

Copy virtio rx processing to fix those offload flags with some
differences:
- accept VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP,
- ignore anything but the VIRTIO_NET_HDR_F_NEEDS_CSUM flag (to comply with
  the virtio spec),

Some applications might rely on the current behavior, so it is left
untouched by default.
A new RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS flag is added to enable the
new behavior.

The vhost example has been updated for the new behavior: TSO is applied to
any packet marked LRO.

Fixes: 859b480d5a ("vhost: add guest offload setting")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-05-04 10:22:17 +02:00
Matan Azrad
99f9d799ce vdpa/mlx5: improve interrupt management
The driver should notify the guest for each traffic burst detected by CQ
polling.

The CQ polling trigger is defined by `event_mode` device argument,
either by busy polling on all the CQs or by blocked call to HW
completion event using DevX channel.

Also, the polling event modes can move to blocked call when the
traffic rate is low.

The current blocked call uses the EAL interrupt API suffering a lot
of overhead in the API management and serve all the drivers and
libraries using only single thread.

Use blocking FD of the DevX channel in order to do blocked call
directly by the DevX channel FD mechanism.

Signed-off-by: Matan Azrad <matan@nvidia.com>
Acked-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-05-04 10:22:17 +02:00
Cheng Jiang
873e8dad6f vhost: support packed ring in async datapath
For now async vhost data path only supports split ring. This patch
enables packed ring in async vhost data path to make async vhost
compatible with virtio 1.1 spec.

Signed-off-by: Cheng Jiang <cheng1.jiang@intel.com>
Reviewed-by: Jiayu Hu <jiayu.hu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-05-04 10:21:52 +02:00
Gregory Etelson
79f8952783 net/mlx5: support integrity flow item
MLX5 PMD supports the following integrity filters for outer and
inner network headers:
- l3_ok
- l4_ok
- ipv4_csum_ok
- l4_csum_ok

`level` values 0 and 1 reference outer headers.
`level` > 1 reference inner headers.

Flow rule items supplied by application must explicitly specify
network headers referred by integrity item. For example:
flow create 0 ingress
  pattern
    integrity level is 0 value mask l3_ok value spec l3_ok /
    eth / ipv6 / end …

or

flow create 0 ingress
  pattern
    integrity level is 0 value mask l4_ok value spec 0 /
    eth / ipv4 proto is udp / end …

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-05-04 17:37:22 +02:00
Min Hu (Connor)
21938cf4e4 doc: add build config option in hns3 guide
This patch adds description of max TQP number per PF for config file
option.

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-05-04 14:54:41 +02:00
Michael Baum
f3191849f2 net/mlx5: support flow count action handle
Existing API supports counter action to count traffic of a single flow.
The user can share the count action among different flows using the
shared flag and the same counter ID in the count action configuration.

Recent patch [1] introduced the indirect action API.
Using this API, an action can be created as indirect, unattached to any
flow rule.
Multiple flows can then be created using the same indirect action.
The new API also supports query operation of an indirect action.

The new API is more efficient because the driver gets it's own handler
for the count action instead of managing a mapping between the user ID
to the driver handle.

Support create, query and destroy indirect action operations for flow
count action.

Application will use the indirect action query operation to query this
count action.

In the meantime the old sharing mechanism (with the sharing flag)
continues to be supported, and the user can choose the way he wants to
share the counter.
The new indirect action API is only supported in DevX, so sharing
counter action in Verbs can only be done through the old mechanism.

[1] https://mails.dpdk.org/archives/dev/2020-July/174110.html

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-04-30 12:41:07 +02:00
Jiawen Wu
f8aadb64df net/txgbe: add copyright owner
All rights reserved by Beijing Wangxun Technology Co., Ltd.
Part of the code references Intel.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-29 17:01:06 +02:00
Jiawen Wu
b950203be7 net/txgbe: support VXLAN-GPE
Support VXLAN-GPE in UDP tunnel port add and delete.
Fix to parsing packet type to pass hardware checksum.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-04-29 17:01:06 +02:00
Li Zhang
aa065a9cf3 net/mlx5: support meter PPS profile
Currently meter algorithms only supports bytes units for meter profiles.
Using ASO feature, the driver can support metering in per packet units.

Add support for packet units in meter profiles.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-04-27 14:27:08 +02:00
Shun Hao
51ec04dc7b net/mlx5: connect meter policy to created flows
Currently ASO meter must be followed by policy table, so this adds
the support that connecting meter and policy table.

There are several cases to be considered:
1. For non-termination policy, connect meter to the default policy
table.
2. For non-RSS termination policy case, simply get the policy
table id and connect meter to it.
3. For RSS termination policy case, need to split the flow due
to RSS info in policy, and translate each sub-flow using that RSS,
then create the sub policy table to be connected.
4. In termination policy case, if there's no actions to modify the
packet before meter, no need to use set_tag to save meter id in
register. Only add a new flow in drop table using the same match
criteria as suf-flow, to save cache miss.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-04-27 13:20:36 +02:00
Jiayu Hu
bcabc70abb doc: update async vhost register/unregister
This patch is to update programmer guide for register/unregister
copy devices in vhost.

Signed-off-by: Jiayu Hu <jiayu.hu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-04-28 03:52:44 +02:00
Ajit Khaparde
ea2066b13f doc: fix formatting in testpmd guide
Fix formatting in testpmd user guide for hairpin operation.

Fixes: 01817b10d2 ("app/testpmd: change hairpin queues setup")
Cc: stable@dpdk.org

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
Reviewed-by: Bing Zhao <bingz@nvidia.com>
2021-04-27 14:02:14 +02:00
Min Hu (Connor)
cdf6a5fbc5 doc: add runtime option examples to hns3 guide
This patch added examples for runtime config options, to help user
how to use this.

Fixes: a124f9e959 ("net/hns3: add runtime config to select IO burst function")
Fixes: 7079121324 ("net/hns3: support masking device capability")

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-26 18:04:08 +02:00
Chaoyong He
8202309f9f doc: fix multiport syntax in nfp guide
Fix up the suffix of the PCI ID to be consistent with the code.

Fixes: 979f2bae07 ("doc: improve multiport PF in nfp guide")
Cc: stable@dpdk.org

Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Signed-off-by: Heinrich Kuhn <heinrich.kuhn@netronome.com>
2021-04-26 11:39:08 +02:00
Shijith Thotton
8a3d58c189 event/cnxk: add option to control timer adapters
Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.

Example:
	--dev "0002:1e:00.0,tim_ring_ctl=[2-1023-1-0]"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:45:52 +02:00
Shijith Thotton
853623b9e5 event/cnxk: add timer stats
Add event timer adapter statistics get and reset functions.
Stats are disabled by default and can be enabled through devargs.

Example:
	--dev "0002:1e:00.0,tim_stats_ena=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:31:48 +02:00
Shijith Thotton
a66fa85668 event/cnxk: add options for timer chunk size and rings
Add devargs to control default chunk size and max numbers of
timer rings to attach to a given RVU PF.

Example:
	--dev "0002:1e:00.0,tim_chnk_slots=1024"
	--dev "0002:1e:00.0,tim_rings_lmt=4"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 07:56:05 +02:00
Pavan Nikhilesh
1b06a817b8 event/cnxk: add option to disable NPA
If the chunks are allocated from NPA then TIM can automatically free
them when traversing the list of chunks.
Add devargs to disable NPA and use software mempool to manage chunks.

Example:
	--dev "0002:0e:00.0,tim_disable_npa=1"

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 07:35:00 +02:00
Shijith Thotton
3d9a7181e4 event/cnxk: support timer
Add event timer adapter a.k.a TIM initialization on SSO probe.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 07:13:54 +02:00
Pavan Nikhilesh
7ffa737996 event/cnxk: add option to configure getwork mode
Add devargs to configure the platform specific getwork mode.

CN9K getwork mode by default is set to use dual workslot mode.
Add option to force single workslot mode.
Example:
	--dev "0002:0e:00.0,single_ws=1"

CN10K supports multiple getwork prefetch modes, by default the
prefetch mode is set to none.
Add option to select getwork prefetch mode
Example:
	--dev "0002:1e:00.0,gw_mode=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 06:17:19 +02:00
Shijith Thotton
38c2e3240b event/cnxk: add option to control SSO HWGRP QoS
SSO HWGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO HWGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to HWGRPs based on a preconfigured threshold.
We can control the QoS of SSO HWGRP by modifying the above mentioned
thresholds. HWGRPs that have higher importance can be assigned higher
thresholds than the rest.

Example:
        --dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]

Qx  -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.

The values need to be expressed in terms of percentages, 0 represents
default.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 05:56:16 +02:00
Shijith Thotton
e656d40fd1 event/cnxk: add option for in-flight buffer count
The number of events for a *open system* event device is specified
as -1 as per the eventdev specification.
Since, SSO inflight events are only limited by DRAM size, the
xae_cnt devargs parameter is introduced to provide upper limit for
in-flight events.

Example:
        --dev "0002:0e:00.0,xae_cnt=8192"

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 05:49:19 +02:00
Pavan Nikhilesh
8558dcaa05 event/cnxk: add build infra and device setup
Add meson build infra structure along with the event device
SSO initialization and teardown functions.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2021-05-04 05:00:18 +02:00
Timothy McDaniel
7c6cc633fc doc: update guide for DLB v2.5
Update the dlb documentation for v2.5. Notable differences include
the new cobined credit scheme. Also cleaned up a couple of sections,
and removed a duplicate section.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:31 +02:00
Bruce Richardson
245efe544d raw/ioat: report status of completed jobs
Add improved error handling to rte_ioat_completed_ops(). This patch adds
new parameters to the function to enable the user to track the completion
status of each individual operation in a batch. With this addition, the
function can help the user to determine firstly, how many operations may
have failed or been skipped and then secondly, which specific operations
did not complete successfully.

Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:43:50 +02:00
Bruce Richardson
b7aaf417f9 raw/ioat: add bus driver for device scanning automatically
Rather than using a vdev with args, DPDK can scan and initialize the
devices automatically using a bus-type driver. This bus does not need to
worry about registering device drivers, rather it can initialize the
devices directly on probe.

The device instances (queues) to use are detected from /dev with the
additional info about them got from /sys.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:29:06 +02:00
Bruce Richardson
2ef79bea8f raw/ioat: support limiting queues for idxd PCI device
When using a full device instance via vfio, allow the user to specify a
maximum number of queues to configure rather than always using the max
number of supported queues.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:04:46 +02:00
Stanislaw Kardach
1abb185d6c stack: allow lock-free only on relevant architectures
Since commit 7911ba0473 ("stack: enable lock-free implementation for
aarch64"), lock-free stack is supported on arm64 but this description was
missing from the doxygen for the flag.

Currently it is impossible to detect programmatically whether lock-free
implementation of rte_stack is supported. One could check whether the
header guard for lock-free stubs is defined (_RTE_STACK_LF_STUBS_H_) but
that's an unstable implementation detail. Because of that currently all
lock-free ring creations silently succeed (as long as the stack header
is 16B long) which later leads to push and pop operations being NOPs.
The observable effect is that stack_lf_autotest fails on platforms not
supporting the lock-free. Instead it should just skip the lock-free test
altogether.

This commit adds a new errno value (ENOTSUP) that may be returned by
rte_stack_create() to indicate that a given combination of flags is not
supported on a current platform.
This is detected by checking a compile-time flag in the include logic in
rte_stack_lf.h which may be used by applications to check the lock-free
support at compile time.

Use the added RTE_STACK_LF_SUPPORTED flag to disable the lock-free stack
tests at the compile time.
Perf test doesn't fail because rte_ring_create() succeeds, however
marking this test as skipped gives a better indication of what actually
was tested.

Fixes: 7911ba0473 ("stack: enable lock-free implementation for aarch64")

Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2021-05-03 18:46:15 +02:00
Thomas Monjalon
c6bd9f4b28 doc: announce support of Alpine Linux
After many patches in several releases to make DPDK buildable with musl,
and few adjustments for busybox, it is time to show the support of DPDK
built in Alpine Linux.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-04-22 00:14:11 +02:00