Commit Graph

4688 Commits

Author SHA1 Message Date
Shun Hao
51ec04dc7b net/mlx5: connect meter policy to created flows
Currently ASO meter must be followed by policy table, so this adds
the support that connecting meter and policy table.

There are several cases to be considered:
1. For non-termination policy, connect meter to the default policy
table.
2. For non-RSS termination policy case, simply get the policy
table id and connect meter to it.
3. For RSS termination policy case, need to split the flow due
to RSS info in policy, and translate each sub-flow using that RSS,
then create the sub policy table to be connected.
4. In termination policy case, if there's no actions to modify the
packet before meter, no need to use set_tag to save meter id in
register. Only add a new flow in drop table using the same match
criteria as suf-flow, to save cache miss.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-04-27 13:20:36 +02:00
Jiayu Hu
bcabc70abb doc: update async vhost register/unregister
This patch is to update programmer guide for register/unregister
copy devices in vhost.

Signed-off-by: Jiayu Hu <jiayu.hu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-04-28 03:52:44 +02:00
Ajit Khaparde
ea2066b13f doc: fix formatting in testpmd guide
Fix formatting in testpmd user guide for hairpin operation.

Fixes: 01817b10d2 ("app/testpmd: change hairpin queues setup")
Cc: stable@dpdk.org

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
Reviewed-by: Bing Zhao <bingz@nvidia.com>
2021-04-27 14:02:14 +02:00
Min Hu (Connor)
cdf6a5fbc5 doc: add runtime option examples to hns3 guide
This patch added examples for runtime config options, to help user
how to use this.

Fixes: a124f9e959 ("net/hns3: add runtime config to select IO burst function")
Fixes: 7079121324 ("net/hns3: support masking device capability")

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-26 18:04:08 +02:00
Chaoyong He
8202309f9f doc: fix multiport syntax in nfp guide
Fix up the suffix of the PCI ID to be consistent with the code.

Fixes: 979f2bae07 ("doc: improve multiport PF in nfp guide")
Cc: stable@dpdk.org

Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Signed-off-by: Heinrich Kuhn <heinrich.kuhn@netronome.com>
2021-04-26 11:39:08 +02:00
Shijith Thotton
8a3d58c189 event/cnxk: add option to control timer adapters
Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.

Example:
	--dev "0002:1e:00.0,tim_ring_ctl=[2-1023-1-0]"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:45:52 +02:00
Shijith Thotton
853623b9e5 event/cnxk: add timer stats
Add event timer adapter statistics get and reset functions.
Stats are disabled by default and can be enabled through devargs.

Example:
	--dev "0002:1e:00.0,tim_stats_ena=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:31:48 +02:00
Shijith Thotton
a66fa85668 event/cnxk: add options for timer chunk size and rings
Add devargs to control default chunk size and max numbers of
timer rings to attach to a given RVU PF.

Example:
	--dev "0002:1e:00.0,tim_chnk_slots=1024"
	--dev "0002:1e:00.0,tim_rings_lmt=4"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 07:56:05 +02:00
Pavan Nikhilesh
1b06a817b8 event/cnxk: add option to disable NPA
If the chunks are allocated from NPA then TIM can automatically free
them when traversing the list of chunks.
Add devargs to disable NPA and use software mempool to manage chunks.

Example:
	--dev "0002:0e:00.0,tim_disable_npa=1"

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 07:35:00 +02:00
Shijith Thotton
3d9a7181e4 event/cnxk: support timer
Add event timer adapter a.k.a TIM initialization on SSO probe.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 07:13:54 +02:00
Pavan Nikhilesh
7ffa737996 event/cnxk: add option to configure getwork mode
Add devargs to configure the platform specific getwork mode.

CN9K getwork mode by default is set to use dual workslot mode.
Add option to force single workslot mode.
Example:
	--dev "0002:0e:00.0,single_ws=1"

CN10K supports multiple getwork prefetch modes, by default the
prefetch mode is set to none.
Add option to select getwork prefetch mode
Example:
	--dev "0002:1e:00.0,gw_mode=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 06:17:19 +02:00
Shijith Thotton
38c2e3240b event/cnxk: add option to control SSO HWGRP QoS
SSO HWGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO HWGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to HWGRPs based on a preconfigured threshold.
We can control the QoS of SSO HWGRP by modifying the above mentioned
thresholds. HWGRPs that have higher importance can be assigned higher
thresholds than the rest.

Example:
        --dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]

Qx  -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.

The values need to be expressed in terms of percentages, 0 represents
default.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 05:56:16 +02:00
Shijith Thotton
e656d40fd1 event/cnxk: add option for in-flight buffer count
The number of events for a *open system* event device is specified
as -1 as per the eventdev specification.
Since, SSO inflight events are only limited by DRAM size, the
xae_cnt devargs parameter is introduced to provide upper limit for
in-flight events.

Example:
        --dev "0002:0e:00.0,xae_cnt=8192"

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 05:49:19 +02:00
Pavan Nikhilesh
8558dcaa05 event/cnxk: add build infra and device setup
Add meson build infra structure along with the event device
SSO initialization and teardown functions.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2021-05-04 05:00:18 +02:00
Timothy McDaniel
7c6cc633fc doc: update guide for DLB v2.5
Update the dlb documentation for v2.5. Notable differences include
the new cobined credit scheme. Also cleaned up a couple of sections,
and removed a duplicate section.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:31 +02:00
Bruce Richardson
245efe544d raw/ioat: report status of completed jobs
Add improved error handling to rte_ioat_completed_ops(). This patch adds
new parameters to the function to enable the user to track the completion
status of each individual operation in a batch. With this addition, the
function can help the user to determine firstly, how many operations may
have failed or been skipped and then secondly, which specific operations
did not complete successfully.

Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:43:50 +02:00
Bruce Richardson
b7aaf417f9 raw/ioat: add bus driver for device scanning automatically
Rather than using a vdev with args, DPDK can scan and initialize the
devices automatically using a bus-type driver. This bus does not need to
worry about registering device drivers, rather it can initialize the
devices directly on probe.

The device instances (queues) to use are detected from /dev with the
additional info about them got from /sys.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:29:06 +02:00
Bruce Richardson
2ef79bea8f raw/ioat: support limiting queues for idxd PCI device
When using a full device instance via vfio, allow the user to specify a
maximum number of queues to configure rather than always using the max
number of supported queues.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:04:46 +02:00
Stanislaw Kardach
1abb185d6c stack: allow lock-free only on relevant architectures
Since commit 7911ba0473 ("stack: enable lock-free implementation for
aarch64"), lock-free stack is supported on arm64 but this description was
missing from the doxygen for the flag.

Currently it is impossible to detect programmatically whether lock-free
implementation of rte_stack is supported. One could check whether the
header guard for lock-free stubs is defined (_RTE_STACK_LF_STUBS_H_) but
that's an unstable implementation detail. Because of that currently all
lock-free ring creations silently succeed (as long as the stack header
is 16B long) which later leads to push and pop operations being NOPs.
The observable effect is that stack_lf_autotest fails on platforms not
supporting the lock-free. Instead it should just skip the lock-free test
altogether.

This commit adds a new errno value (ENOTSUP) that may be returned by
rte_stack_create() to indicate that a given combination of flags is not
supported on a current platform.
This is detected by checking a compile-time flag in the include logic in
rte_stack_lf.h which may be used by applications to check the lock-free
support at compile time.

Use the added RTE_STACK_LF_SUPPORTED flag to disable the lock-free stack
tests at the compile time.
Perf test doesn't fail because rte_ring_create() succeeds, however
marking this test as skipped gives a better indication of what actually
was tested.

Fixes: 7911ba0473 ("stack: enable lock-free implementation for aarch64")

Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2021-05-03 18:46:15 +02:00
Thomas Monjalon
c6bd9f4b28 doc: announce support of Alpine Linux
After many patches in several releases to make DPDK buildable with musl,
and few adjustments for busybox, it is time to show the support of DPDK
built in Alpine Linux.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-04-22 00:14:11 +02:00
Thomas Monjalon
b7fe612ac1 doc: fix names of UIO drivers
Fix typos in the names of kernel drivers based on UIO,
and make sure the generic term for the interface is UIO in capitals.

Fixes: 3a78b2f732 ("doc: add virtio crypto PMD guide")
Fixes: 3cc4d996fa ("doc: update VFIO usage in qat crypto guide")
Fixes: 39922c470e ("doc: add known uio_pci_generic issue for i40e")
Fixes: 86fa6c57a1 ("doc: add known igb_uio issue for i40e")
Fixes: beff6d8e8e ("net/netvsc: add documentation")
Cc: stable@dpdk.org

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-04-22 00:06:47 +02:00
Dmitry Kozlyuk
b5674be414 net/pcap: build on Windows
Implement OS-dependent functions and enable build for Windows.
Account for different library name in Windows libpcap distributions.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2021-04-21 23:48:38 +02:00
Huisong Li
f4367c0b97 app/testpmd: show link flow control info
This patch supports the query of the link flow control parameter
on a port.

The command format is as follows:
show port <port_id> flow_ctrl

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Kevin Traynor <ktraynor@redhat.com>
2021-04-21 13:43:41 +02:00
Chengwen Feng
bafe8a68f0 app/testpmd: support cleanup Tx queue mbufs
This patch supports cleanup txq mbufs command:
port cleanup (port_id) txq (queue_id) (free_cnt)

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-21 13:25:19 +02:00
Haifei Luo
f29fa2c59b app/testpmd: support policy actions per color
Add the create/del policy CLIs to support actions per color.
The CLIs are:
Create:  add port meter policy (port_id) (policy_id) g_actions (actions)
y_actions (actions) r_actions (actions)
Delete:  del port meter policy (port_id) (policy_id)

Examples:
testpmd> add port meter policy 0 1 g_actions rss / end y_actions end
r_actions drop / end
testpmd> del port meter policy 0 1

Signed-off-by: Haifei Luo <haifeil@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-04-21 12:22:18 +02:00
Li Zhang
5f0d54f372 ethdev: add pre-defined meter policy API
Currently, the flow meter policy does not support multiple actions
per color; also the allowed action types per color are very limited.
In addition, the policy cannot be pre-defined.

Due to the growing in flow actions offload abilities there is a potential
for the user to use variety of actions per color differently.
This new meter policy API comes to allow this potential in the most ethdev
common way using rte_flow action definition.
A list of rte_flow actions will be provided by the user per color
in order to create a meter policy.
In addition, the API forces to pre-define the policy before
the meters creation in order to allow sharing of single policy
with multiple meters efficiently.

meter_policy_id is added into struct rte_mtr_params.
So that it can get the policy during the meters creation.

Allow coloring the packet using a new rte_flow_action_color
as could be done by the old policy API.

Add two common policy template as macros in the head file.

The next API function were added:
- rte_mtr_meter_policy_add
- rte_mtr_meter_policy_delete
- rte_mtr_meter_policy_update
- rte_mtr_meter_policy_validate
The next struct was changed:
- rte_mtr_params
- rte_mtr_capabilities
The next API was deleted:
- rte_mtr_policer_actions_update

To support this API the following app were changed:
app/test-flow-perf: clean meter policer
app/testpmd: clean meter policer

To support this API the following drivers were changed:
net/softnic: support meter policy API
1. Cleans meter rte_mtr_policer_action.
2. Supports policy API to get color action as policer action did.
   The color action will be mapped into rte_table_action_policer.

net/mlx5: clean meter creation management
Cleans and breaks part of the current meter management
in order to allow better design with policy API.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Signed-off-by: Haifei Luo <haifeil@nvidia.com>
Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Jasvinder Singh <jasvinder.singh@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-04-21 12:22:17 +02:00
Li Zhang
c99b4f8bc2 net/mlx5: support ASO meter action
When ASO action is available, use it as the meter action

Signed-off-by: Shun Hao <shunh@nvidia.com>
Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-04-21 08:28:08 +02:00
Li Zhang
5df35867d9 net/mlx5: optimize meter statistics
Meter statistics are each policer action each counter.
Totally 4 counters per each meter.
It causes cache missed
and lead to data forwarding performance low.

To optimize it, support pass counter for green
and drop counter for red.
Totally two counters per each meter.
Also use the global drop statistics for
all meter drop action.

Limitations as below:
1. It does not support yellow counter and return 0.
2. All the meter colors with drop action will be
   counted only by the global drop statistics.
3. Red color must be with drop action.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-04-21 08:27:49 +02:00
Min Hu (Connor)
8e321f7df1 doc: fix Rx burst function in hns3 guide
The patch 'net/hns3: rename Rx burst function' changed `simple'
Rx function name from 'scalar' to 'scalar simple', but doc
ignored that.

This patch fixed it.

Fixes: aa5baf47e1 ("net/hns3: rename Rx burst function")
Cc: stable@dpdk.org

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-20 12:55:28 +02:00
Bing Zhao
4d07cbefe3 app/testpmd: add commands for conntrack
The command line for testing connection tracking is added. To create
a conntrack object, 3 parts are needed.
  set conntrack com peer ...
  set conntrack orig scale ...
  set conntrack rply scale ...
This will create a full conntrack action structure for the indirect
action. After the indirect action handle of "conntrack" created, it
could be used in the flow creation. Before updating, the same
structure is also needed together with the update command
"conntrack_update" to update the "dir" or "ctx".

After the flow with conntrack action created, the packet should jump
to the next flow for the result checking with conntrack item. The
state is defined with bits and a valid combination could be
supported.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
2021-04-20 01:24:57 +02:00
Bing Zhao
9847fd125d ethdev: introduce conntrack flow action and item
This commit introduces the conntrack action and item.

Usually the HW offloading is stateless. For some stateful offloading
like a TCP connection, HW module will help provide the ability of a
full offloading w/o SW participation after the connection was
established.

The basic usage is that in the first flow rule the application should
add the conntrack action and jump to the next flow table. In the
following flow rule(s) of the next table, the application should use
the conntrack item to match on the result.

A TCP connection has two directions traffic. To set a conntrack
action context correctly, the information of packets from both
directions are required.

The conntrack action should be created on one ethdev port and supply
the peer ethdev port as a parameter to the action. After context
created, it could only be used between these two ethdev ports
(dual-port mode) or a single port. The application should modify the
action via the API "rte_action_handle_update" only when before using
it to create a flow rule with conntrack for the opposite direction.
This will help the driver to recognize the direction of the flow to
be created, especially in the single-port mode, in which case the
traffic from both directions will go through the same ethdev port
if the application works as an "forwarding engine" but not an end
point. There is no need to call the update interface if the
subsequent flow rules have nothing to be changed.

Query will be supported via "rte_action_handle_query" interface,
about the current packets information and connection status. The
fields query capabilities depends on the HW.

For the packets received during the conntrack setup, it is suggested
to re-inject the packets in order to make sure the conntrack module
works correctly without missing any packet. Only the valid packets
should pass the conntrack, packets with invalid TCP information,
like out of window, or with invalid header, like malformed, should
not pass.

Naming and definition:
https://elixir.bootlin.com/linux/latest/source/include/uapi/linux/
        netfilter/nf_conntrack_tcp.h
https://elixir.bootlin.com/linux/latest/source/net/netfilter/
        nf_conntrack_proto_tcp.c

Other reference:
https://www.usenix.org/legacy/events/sec01/invitedtalks/rooij.pdf

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-04-20 01:24:57 +02:00
Robin Zhang
e9c5672ac1 net/iavf: deprecate i40evf PMD
The i40evf PMD will be deprecated, iavf will be the only VF driver for
Intel 700 serial (i40e) NIC family.

To reach this, there will be 2 steps:

Step 1: iavf will be the default VF driver, while i40evf still can be
selected by devarg: "driver=i40evf".
This is covered by this patch, which include:
1) add all 700 serial NIC VF device ID into iavf PMD
2) skip probe if devargs contain "driver=i40evf" in iavf
3) continue probe if devargs contain "driver=i40evf" in i40evf

Step 2: i40evf and related devarg are removed, this will happen at DPDK
21.11

Between step 1 and step 2, no new feature will be added into i40evf
except bug fix.

Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2021-04-19 10:36:17 +02:00
Chengwen Feng
7079121324 net/hns3: support masking device capability
This patch supports runtime config of mask device capability, it was
used to mask the capability which queried from firmware.

The device argument key is "dev_caps_mask" which takes hexadecimal
bitmask where each bit represents whether mask corresponding capability.

Its main purpose is to debug and avoid problems.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-19 19:15:45 +02:00
Ori Kam
0797fa6ccf app/testpmd: support integrity flow item
The integrity item allows the application to match
on the integrity of a packet.

Usage example:
match that packet integrity checks are OK. The checks depend on
packet layers. For example ICMP packet will not check L4 level.
flow create 0 ingress pattern integrity value mask 0x01 value spec 0x01

Match that L4 packet is OK - check L2 & L3 & L4 layers:
flow create 0 ingress pattern integrity value mask 0xfe value spec 0xfe

Signed-off-by: Ori Kam <orika@nvidia.com>
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-04-19 19:05:17 +02:00
Ori Kam
b10a421a1f ethdev: add packet integrity check flow rules
Currently, DPDK application can offload the checksum check,
and report it in the mbuf.

However, as more and more applications are offloading some or all
logic and action to the HW, there is a need to check the packet
integrity so the right decision can be taken.

The application logic can be positive meaning if the packet is
valid jump / do  actions, or negative if packet is not valid
jump to SW / do actions (like drop) and add default flow
(match all in low priority) that will direct the miss packet
to the miss path.

Since currently rte_flow works in positive way the assumption is
that the positive way will be the common way in this case also.

When thinking what is the best API to implement such feature,
we need to consider the following (in no specific order):
1. API breakage.
2. Simplicity.
3. Performance.
4. HW capabilities.
5. rte_flow limitation.
6. Flexibility.

First option: Add integrity flags to each of the items.
For example add checksum_ok to IPv4 item.

Pros:
1. No new rte_flow item.
2. Simple in the way that on each item the app can see
what checks are available.

Cons:
1. API breakage.
2. Increase number of flows, since app can't add global rule and must
   have dedicated flow for each of the flow combinations, for example
   matching on ICMP traffic or UDP/TCP  traffic with IPv4 / IPv6 will
   result in 5 flows.

Second option: dedicated item

Pros:
1. No API breakage, and there will be no for some time due to having
   extra space. (by using bits)
2. Just one flow to support the ICMP or UDP/TCP traffic with IPv4 /
   IPv6.
3. Simplicity application can just look at one place to see all possible
   checks.
4. Allow future support for more tests.

Cons:
1. New item, that holds number of fields from different items.

For starter the following bits are suggested:
1. packet_ok - means that all HW checks depending on packet layer have
   passed. This may mean that in some HW such flow should be split to
   number of flows or fail.
2. l2_ok - all check for layer 2 have passed.
3. l3_ok - all check for layer 3 have passed. If packet doesn't have
   L3 layer this check should fail.
4. l4_ok - all check for layer 4 have passed. If packet doesn't
   have L4 layer this check should fail.
5. l2_crc_ok - the layer 2 CRC is O.K.
6. ipv4_csum_ok - IPv4 checksum is O.K. It is possible that the
   IPv4 checksum will be O.K. but the l3_ok will be 0. It is not
   possible that checksum will be 0 and the l3_ok will be 1.
7. l4_csum_ok - layer 4 checksum is O.K.
8. l3_len_OK - check that the reported layer 3 length is smaller than the
   frame length.

Example of usage:
1. Check packets from all possible layers for integrity.
   flow create integrity spec packet_ok = 1 mask packet_ok = 1 .....

2. Check only packet with layer 4 (UDP / TCP)
   flow create integrity spec l3_ok = 1, l4_ok = 1 mask l3_ok = 1
   l4_ok = 1

Signed-off-by: Ori Kam <orika@nvidia.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-04-19 19:05:17 +02:00
Qi Zhang
8bb87d65ba doc: update matching versions in ice guide
Updated ice recommended matching list for DPDK 21.02.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2021-04-19 18:37:00 +02:00
Qi Zhang
d63dab349a doc: fix matching versions in ice guide
Fixed matching kernel driver version for DPDK 20.11.

Fixes: e89aebf3b5 ("doc: update ice user guide")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2021-04-19 18:37:00 +02:00
Bing Zhao
4b61b8774b ethdev: introduce indirect flow action
Right now, rte_flow_shared_action_* APIs are used for some shared
actions, like RSS, count. The shared action should be created before
using it inside a flow. These shared actions sometimes are not
really shared but just some indirect actions decoupled from a flow.

The new functions rte_flow_action_handle_* are added to replace
the current shared functions rte_flow_shared_action_*.

There are two types of flow actions:
1. the direct (normal) actions that could be created and stored
   within a flow rule. Such action is tied to its flow rule and
   cannot be reused.
2. the indirect action, in the past, named shared_action. It is
   created from a direct actioni, like count or rss, and then used
   in the flow rules with an object handle. The PMD will take care
   of the retrieve from indirect action to the direct action
   when it is referenced.

The indirect action is accessed (update / query) w/o any flow rule,
just via the action object handle. For example, when querying or
resetting a counter, it could be done out of any flow using this
counter, but only the handle of the counter action object is
required.
The indirect action object could be shared by different flows or
used by a single flow, depending on the direct action type and
the real-life requirements.
The handle of an indirect action object is opaque and defined in
each driver and possibly different per direct action type.

The old name "shared" is improper in a sense and should be replaced.

Since the APIs are changed from "rte_flow_shared_action*" to the new
"rte_flow_action_handle*", the testpmd application code and command
line interfaces also need to be updated to do the adaption.
The testpmd application user guide is also updated. All the "shared
action" related parts are replaced with "indirect action" to have a
correct explanation.

The parameter of "update" interface is also changed. A general
pointer will replace the rte_flow_action struct pointer due to the
facts:
1. Some action may not support fields updating. In the example of a
   counter, the only "update" supported should be the reset. So
   passing a rte_flow_action struct pointer is meaningless and
   there is even no such corresponding action struct. What's more,
   if more than one operations should be supported, for some other
   action, such pointer parameter may not meet the need.
2. Some action may need conditional or partial update, the current
   parameter will not provide the ability to indicate which part(s)
   to update.
   For different types of indirect action objects, the pointer could
   either be the same of rte_flow_action* struct - in order not to
   break the current driver implementation, or some wrapper
   structures with bits as masks to indicate which part to be
   updated, depending on real needs of the corresponding direct
   action. For different direct actions, the structures of indirect
   action objects updating will be different.

All the underlayer PMD callbacks will be moved to these new APIs.

The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
break the ABI. All the implementations are changed by using
RTE_FLOW_ACTION_TYPE_INDIRECT.

Since the APIs are changed from "rte_flow_shared_action*" to the new
"rte_flow_action_handle*" and the "update" interface's 3rd input
parameter is changed to generic pointer, the mlx5 PMD that uses these
APIs needs to do the adaption to the new APIs as well.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Andrey Vesnovaty <andreyv@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-04-19 18:25:42 +02:00
Min Hu (Connor)
e2cd696ba4 doc: add Kunpeng 930 support in hns3 guide
Hns3 PMD has already supported Kunpeng 930 SoC.

This patch added description for it.

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-19 18:25:42 +02:00
Lijun Ou
9ad9ff476c ethdev: add queue state in queried queue information
Currently, upper-layer application could get queue state only
through pointers such as dev->data->tx_queue_state[queue_id],
this is not the recommended way to access it. So this patch
add get queue state when call rte_eth_rx_queue_info_get and
rte_eth_tx_queue_info_get API.

Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
it could be ABI compatible.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-19 18:25:35 +02:00
Min Hu (Connor)
be1650f734 doc: fix HiSilicon copyright syntax
This patch fixes HiSilicon copyright syntax.

According to the suggestion of our legal department,
to standardize the copyright license of our code to
avoid potential copyright risks, we make a unified
modification to the "Hisilicon", which was nonstandard,
in the main modules we maintain.

We change it to "HiSilicon", which is consistent with
the terms used on the following official website:
https://www.hisilicon.com/en/terms-of-use.

Fixes: 565829db8b ("net/hns3: add build and doc infrastructure")
Cc: stable@dpdk.org

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-16 17:42:15 +02:00
Huisong Li
a2258ea1be doc: remove queue stats mapping from testpmd guide
The "--tx-queue-stats-mapping" and "--rx-queue-stats-mapping"
and display and clear of "stats_map" have been removed from
testpmd.

This patch deletes some descriptions about queue stats mapping
in testpmd doc.

Fixes: 08dcd18706 ("app/testpmd: fix queue stats mapping configuration")
Cc: stable@dpdk.org

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-16 17:42:15 +02:00
Bruce Richardson
99a2dd955f lib: remove librte_ prefix from directory names
There is no reason for the DPDK libraries to all have 'librte_' prefix on
the directory names. This prefix makes the directory names longer and also
makes it awkward to add features referring to individual libraries in the
build - should the lib names be specified with or without the prefix.
Therefore, we can just remove the library prefix and use the library's
unique name as the directory name, i.e. 'eal' rather than 'librte_eal'

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-04-21 14:04:09 +02:00
Bruce Richardson
f2cdd95f2d doc: add Meson coding style to contributors guide
To help with consistency across all files, add a section to the
contributors guide on meson coding style. Although short, this covers
the basics for now, and can be extended in future as we see the need.

Meson style guide recommends four-space indents, like for python,
so add to editorconfig file.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-04-21 14:04:09 +02:00
Bruce Richardson
8dcb898c65 build: change indentation in infrastructure files
Switch from using tabs to 4 spaces for meson.build indentation, for the
basic infrastructure and tooling files, as well as doc and kernel
directories.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-04-21 14:04:09 +02:00
Vladimir Medvedkin
28ebff11c2 hash: add predictable RSS
This patch adds predictable RSS API.
It is based on the idea of searching partial Toeplitz hash collisions.

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Yipeng Wang <yipeng1.wang@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2021-04-20 23:13:23 +02:00
Vladimir Medvedkin
534fe5f339 doc: add Toeplitz hash guide
Add documentation for the Toeplitz hash library.

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Reviewed-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Reviewed-by: John McNamara <john.mcnamara@intel.com>
2021-04-20 23:12:47 +02:00
Conor Walsh
6a094e3285 examples/l3fwd: implement FIB lookup method
This patch implements the Forwarding Information Base (FIB) library
in l3fwd using the function calls and infrastructure introduced in
the previous patch.

Signed-off-by: Conor Walsh <conor.walsh@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
2021-04-20 20:18:29 +02:00
Conor Walsh
9510dd1feb examples/l3fwd: add FIB infrastructure
The purpose of this commit is to add the necessary function calls
and supporting infrastructure to allow the Forwarding Information Base
(FIB) library to be integrated into the l3fwd sample app.
Instead of adding an individual flag for FIB, a new flag '--lookup' has
been added that allows the user to select their desired lookup method.
The flags '-E' and '-L' have been retained for backwards compatibility.

Signed-off-by: Conor Walsh <conor.walsh@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
2021-04-20 20:13:34 +02:00
Akhil Goyal
f96a8ebb27 eventdev: introduce crypto adapter enqueue API
In case an event from a previous stage is required to be forwarded
to a crypto adapter and PMD supports internal event port in crypto
adapter, exposed via capability
RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD, we do not have
a way to check in the API rte_event_enqueue_burst(), whether it is
for crypto adapter or for eth tx adapter.

Hence we need a new API similar to rte_event_eth_tx_adapter_enqueue(),
which can send to a crypto adapter.

Note that RTE_EVENT_TYPE_* cannot be used to make that decision,
as it is meant for event source and not event destination.
And event port designated for crypto adapter is designed to be used
for OP_NEW mode.

Hence, in order to support an event PMD which has an internal event port
in crypto adapter (RTE_EVENT_CRYPTO_ADAPTER_OP_FORWARD mode), exposed
via capability RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD,
application should use rte_event_crypto_adapter_enqueue() API to enqueue
events.

When internal port is not available(RTE_EVENT_CRYPTO_ADAPTER_OP_NEW mode),
application can use API rte_event_enqueue_burst() as it was doing earlier,
i.e. retrieve event port used by crypto adapter and bind its event queues
to that port and enqueue events using the API rte_event_enqueue_burst().

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-04-17 18:49:52 +02:00
Yuying Zhang
2321e34c23 net/ice: support flow priority for DCF switch filter
Support rte flow priority attribute for DCF switch filter.
When a packet is matched by two rules, the behavior of it
is not defined. This patch supports flow priority to create
different recipes for this situation. Only priority 0 and 1
are supported and higher value denotes higher priority.

for example:
1. flow create 0 priority 0 ingress pattern eth / vlan tci is 2 / vlan
   tci is 2 / end actions vf id 2 / end
2. flow create 0 priority 1 ingress pattern eth / vlan / vlan / ipv4 dst
   is 192.168.0.1 / end actions vf id 1 / end

These two rules can be created at the same time in DCF switch
filter and priority of rule 2 is higher. Packet hits rule 2
when two conditions of rules are satisfied.

Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-04-16 12:22:00 +02:00
Yuying Zhang
a65126d1ad net/ice: support GTPU TEID pattern for switch filter
Enable GTPU pattern for CVL switch filter. Support teid and
qfi field of GTPU pattern. Patterns without inner l3/l4 field
support outer dst/src ip. Patterns with inner l3/l4 field only
support inner dst/src ip and inner dst/src port.

+----------------------------------+------------------------------------+
| Pattern                          | Input Set                          |
+----------------------------------+------------------------------------+
| pattern_eth_ipv4_gtpu            | teid, dst/src ip                   |
| pattern_eth_ipv6_gtpu            | teid, dst/src ip                   |
| pattern_eth_ipv4_gtpu_ipv4       | teid, dst/src ip                   |
| pattern_eth_ipv4_gtpu_ipv4_tcp   | teid, dst/src ip, dst/src port     |
| pattern_eth_ipv4_gtpu_ipv4_udp   | teid, dst/src ip, dst/src port     |
| pattern_eth_ipv4_gtpu_ipv6       | teid, dst/src ip                   |
| pattern_eth_ipv4_gtpu_ipv6_tcp   | teid, dst/src ip, dst/src port     |
| pattern_eth_ipv4_gtpu_ipv6_udp   | teid, dst/src ip, dst/src port     |
| pattern_eth_ipv6_gtpu_ipv4       | teid, dst/src ip                   |
| pattern_eth_ipv6_gtpu_ipv4_tcp   | teid, dst/src ip, dst/src port     |
| pattern_eth_ipv6_gtpu_ipv4_udp   | teid, dst/src ip, dst/src port     |
| pattern_eth_ipv6_gtpu_ipv6       | teid, dst/src ip                   |
| pattern_eth_ipv6_gtpu_ipv6_tcp   | teid, dst/src ip, dst/src port     |
| pattern_eth_ipv6_gtpu_ipv6_udp   | teid, dst/src ip, dst/src port     |
| pattern_eth_ipv4_gtpu_eh_ipv4    | teid, qfi, dst/src ip              |
| pattern_eth_ipv4_gtpu_eh_ipv4_tcp| teid, qfi, dst/src ip, dst/src port|
| pattern_eth_ipv4_gtpu_eh_ipv4_udp| teid, qfi, dst/src ip, dst/src port|
| pattern_eth_ipv4_gtpu_eh_ipv6    | teid, qfi, dst/src ip              |
| pattern_eth_ipv4_gtpu_eh_ipv6_tcp| teid, qfi, dst/src ip, dst/src port|
| pattern_eth_ipv4_gtpu_eh_ipv6_udp| teid, qfi, dst/src ip, dst/src port|
| pattern_eth_ipv6_gtpu_eh_ipv4    | teid, qfi, dst/src ip              |
| pattern_eth_ipv6_gtpu_eh_ipv4_tcp| teid, qfi, dst/src ip, dst/src port|
| pattern_eth_ipv6_gtpu_eh_ipv4_udp| teid, qfi, dst/src ip, dst/src port|
| pattern_eth_ipv6_gtpu_eh_ipv6    | teid, qfi, dst/src ip              |
| pattern_eth_ipv6_gtpu_eh_ipv6_tcp| teid, qfi, dst/src ip, dst/src port|
| pattern_eth_ipv6_gtpu_eh_ipv6_udp| teid, qfi, dst/src ip, dst/src port|
+----------------------------------+------------------------------------+

Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-04-15 14:22:13 +02:00
Huisong Li
09e0de1f41 net/hns3: report speed capability for PF
The speed capability of the device can be reported to the upper-layer app
in rte_eth_dev_info_get API. In this API, the speed capability is derived
from the 'supported_speed', which is the speed capability actually
supported by the NIC. The value of the 'supported_speed' is obtained
once in the probe stage and may be updated in the scheduled task to deal
with the change of the transmission interface.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-15 02:55:04 +02:00
Wenzhuo Lu
9c9aa00403 net/iavf: add offload path for Rx AVX512 flex descriptor
Add a specific path for RX AVX512 (flexible descriptor).
In this path, support the HW offload features, like,
checksum, VLAN stripping, RSS hash.
This path is chosen automatically according to the
configuration.

'inline' is used, then the duplicate code is generated
by the compiler.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-04-14 14:48:06 +02:00
Raslan Darawsheh
7d96f5717a ethdev: update flow item GTP QFI definition
'qfi' field is 8 bits which represent single bit for
PPP (paging Policy Presence) single bit for RQI
(Reflective QoS Indicator) and 6 bits for QFI
(QoS Flow Identifier)
This is based on RFC 38415-g30
https://www.3gpp.org/ftp/Specs/archive/38_series/38.415/38415-g30.zip

Updated the doxygen comment and the mask for 'qfi'
to properly identify the full 8 bits of the field.

note: changing the default mask would cause different
patterns generated by testpmd.

Fixes: 346553db5b ("ethdev: add GTP extension header to flow API")
Cc: stable@dpdk.org

Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-14 14:17:41 +02:00
Haifei Luo
bf085dcba1 app/testpmd: add command for single flow dump
Add support for single flow dump.
The CLIs to dump one rule: flow dump PORT rule ID
to dump all: flow dump PORT all
Examples:
testpmd> flow dump 0 all
testpmd> flow dump 0 rule 0

Signed-off-by: Haifei Luo <haifeil@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-04-14 13:19:55 +02:00
Haifei Luo
50c383793b ethdev: dump single flow rule
Previous implementations support dump all the flows. Add new arg
rte_flow in rte_flow_dev_dump to dump one flow.

Signed-off-by: Haifei Luo <haifeil@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Ori Kam <orika@nvidia.com>
2021-04-14 13:19:55 +02:00
Li Zhang
c5a3860f36 app/testpmd: add meter profile packet mode option
add meter profile packet_mode to the ethernet device.
One example:
add port meter profile rfc2697 (port_id) (profile_id)
(cir) (cbs) (ebs) (packet_mode)

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-04-13 18:40:58 +02:00
Li Zhang
74c8ec894d ethdev: add packet mode in meter profile structure
Currently meter algorithms only supports rate is bytes per second (BPS).
Add packet_mode flag in meter profile parameters data structure.
So that it can meter traffic by packet per second.

When packet_mode is 0, the profile rates and bucket sizes are
specified in bytes per second and bytes
when packet_mode is not 0, the profile rates and bucket sizes are
specified in packets and packets per second.

The below structure will be extended:
rte_mtr_meter_profile
rte_mtr_capabilities

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-04-13 18:40:58 +02:00
Dong Zhou
cb299214a6 doc: update push/pop VLAN support in mlx5 guide
Updates the documentation for push/pop VLAN support. In E-Switch
mode, push VLAN on ingress traffic and pop VLAN in egress traffic
are both support.

Signed-off-by: Dong Zhou <dongzhou@nvidia.com>
Reviewed-by: Asaf Penso <asafp@nvidia.com>
2021-04-13 13:37:50 +02:00
Chengwen Feng
3b37cbe617 net/hns3: refactor PF LSC event report
Currently, PF driver will report lsc when it detects the link status
change, it's not a generic implementation.

We refactor PF lsc event report by following scheme:
1. PF driver marks RTE_PCI_DRV_INTR_LSC in rte_pci_driver by default.
2. In the init stage, PF driver will detect whether firmware supports
   lsc interrupt or not, driver will clear RTE_ETH_DEV_INTR_LSC flag if
   firmware doesn't support lsc interrupt.
3. PF driver will report lsc event only when dev_conf.intr_conf.lsc is
   set.

Note: If the firmware supports lsc interrupt, we also keep periodic
polling to deal with the interrupt loss.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-13 02:44:20 +02:00
Chengwen Feng
9bc2289fe5 net/hns3: refactor VF LSC event report
Currently, VF driver periodically obtains link status from PF kernel
driver, and reports lsc event when detects link status change. Because
the period is 1 second, it's probably too late to report especially
in such as bonding scenario.

To solve this problem we use the following scheme:
1. PF kernel driver support immediate push link status to all VFs when
   it detects the link status changes.
2. VF driver will detect PF kernel driver whether support push link
   status in device init stage by sending request link info mailbox
   message to PF, PF then tell VF the push capability by extend
   HNS3_MBX_LINK_STAT_CHANGE mailbox message.
3. VF driver marks RTE_PCI_DRV_INTR_LSC in rte_pci_driver by default,
   when it detects PF doesn't support push link status then it will clear
   RTE_ETH_DEV_INTR_LSC flag.

So if PF kernel driver supports push link status to VF, then VF driver
will have RTE_ETH_DEV_INTR_LSC capability.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-13 02:44:20 +02:00
Asaf Penso
d1355fcc46 doc: add links for build requirements per OS
To compile with meson some dependencies should be installed.
Section "Getting the Tools" describes what needed, but per
OS there are additional steps to do.

Add links to Linux, FreeBSD, and Windows guide for more info.

Signed-off-by: Asaf Penso <asafp@nvidia.com>
2021-04-17 12:37:38 +02:00
Jie Zhou
b729b3c039 doc: update minimum required Meson version for Windows
Meson with Windows clang generates incorrect linker flag
"--subsystem,console" instead of "/subsystem:console" which
will fail the DPDK build. This is discovered at porting testpmd.

Meson 0.57.0 has the fix and should be used for DPDK Windows build.
Update the WindowsGSG DPDK Build document for the proper meson version.

Signed-off-by: Jie Zhou <jizh@microsoft.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
2021-04-16 19:52:58 +02:00
Gabriel Ganne
8c10530836 build: update minimum required Meson version
Bump Meson required version to 0.49.2 which is chosen so as
to be provided by both redhat-8 and debian-10.

Update documentation and travis setup script accordingly.

This fixes the following warning:
WARNING: Project targeting '>= 0.47.1' but tried to use feature introduced
         in '0.48.0': console arg in custom_target

'console' argument is used within kernel/linux/kni/meson.build

Signed-off-by: Gabriel Ganne <gabriel.ganne@6wind.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2021-04-16 18:51:51 +02:00
Matan Azrad
07b0b75370 cryptodev: formalize key wrap method in API
The Key Wrap approach is used by applications in order to protect keys
located in untrusted storage or transmitted over untrusted
communications networks. The constructions are typically built from
standard primitives such as block ciphers and cryptographic hash
functions.

The Key Wrap method and its parameters are a secret between the keys
provider and the device, means that the device is preconfigured for
this method using very secured way.

The key wrap method may change the key length and layout.

Add a description for the cipher transformation key to allow wrapped key
to be forwarded by the same API.

Add a new feature flag RTE_CRYPTODEV_FF_CIPHER_WRAPPED_KEY to be enabled
by PMDs support wrapped key in cipher trasformation.

Signed-off-by: Matan Azrad <matan@nvidia.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-04-16 12:43:33 +02:00
Fan Zhang
c21574edc5 cryptodev: add dequeue count parameter in raw API
This patch changes the experimental raw data path dequeue burst API.
Originally the API enforces the user to provide callback function
to get maximum dequeue count. This change gives the user one more
option to pass directly the expected dequeue count.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-04-16 12:43:33 +02:00
Tejasree Kondoj
398b70cbbb crypto/octeontx2: support lookaside IPv4 transport mode
Adding support for IPv4 lookaside IPsec transport mode.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-04-16 12:43:33 +02:00
Tejasree Kondoj
9a1cc8f1ed examples/ipsec-secgw: support UDP encapsulation
Adding lookaside IPsec UDP encapsulation support
for NAT traversal.
Application has to add udp-encap option to sa config file
to enable UDP encapsulation on the SA.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2021-04-16 12:43:33 +02:00
Tejasree Kondoj
0ff065d096 crypto/octeontx2: support UDP encapsulation
Adding UDP encapsulation support for IPsec in
lookaside protocol mode.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-04-16 12:43:33 +02:00
Matan Azrad
d014dddb2d cryptodev: support multiple cipher data-units
In cryptography, a block cipher is a deterministic algorithm operating
on fixed-length groups of bits, called blocks.

A block cipher consists of two paired algorithms, one for encryption
and the other for decryption. Both algorithms accept two inputs:
an input block of size n bits and a key of size k bits; and both yield
an n-bit output block. The decryption algorithm is defined to be the
inverse function of the encryption.

For AES standard the block size is 16 bytes.
For AES in XTS mode, the data to be encrypted\decrypted does not have to
be multiple of 16B size, the unit of data is called data-unit.
The data-unit size can be any size in range [16B, 2^24B], so, in this
case, a data stream is divided into N amount of equal data-units and
must be encrypted\decrypted in the same data-unit resolution.

For ABI compatibility reason, the size is limited to 64K (16-bit field).
The new field dataunit_len is inserted in a struct padding hole,
which is only 2 bytes long in 32-bit build.
It could be moved and extended later during an ABI-breakage window.

The current cryptodev API doesn't allow the user to select a specific
data-unit length supported by the devices.
In addition, there is no definition how the IV is detected per data-unit
when single operation includes more than one data-unit.

That causes applications to use single operation per data-unit even though
all the data is continuous in memory what reduces datapath performance.

Add a new feature flag to support multiple data-unit sizes, called
RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS.
Add a new field in cipher capability, called dataunit_set,
where the devices can report the range of the supported data-unit sizes.
Add a new cipher transformation field, called dataunit_len, where the user
can select the data-unit length for all the operations.

All the new fields do not change the size of their structures,
by filling some struct padding holes.
They are added as exceptions in the ABI check file libabigail.abignore.

Using a bitmap to report the supported data-unit sizes capability allows
the devices to report a range simply as same as the user to read it
simply. also, thus sizes are usually common and probably will be shared
among different devices.

Signed-off-by: Matan Azrad <matan@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-04-16 12:43:33 +02:00
Anoob Joseph
5c727feebb doc: update limitations of OCTEON TX crypto PMDs
Update known limitations of OCTEON TX crypto PMDs.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
2021-04-16 12:43:33 +02:00
Tejasree Kondoj
de5eb0a604 common/cpt: support encrypted digest mode
Added support for DIGEST_ENCRYPTED mode for octeontx
and octeontx2 platforms.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-04-16 12:43:33 +02:00
Ciara Power
08a3bd1d34 doc: fix dpdk-graph-crypto-perf dependencies
The script dependencies list was incomplete,
this patch adds missing modules and removes an unnecessary entry.
The installation command was also added.

Fixes: f400e0b82b ("app/crypto-perf: add script to graph perf results")
Cc: stable@dpdk.org

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-04-16 12:43:33 +02:00
Juraj Linkeš
f2340c8580 config/arm: add platform config option
Add Arm SoC configuration sets to Arm meson.build and add an arch
agnostic meson option, 'platform', to select from these SoC
configurations for meson native builds. This is preferable to
specifying a cross file when doing aarch64 -> aarch64 builds, since the
cross file specifies the toolchain as well.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Tested-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-04-15 22:34:37 +02:00
Juraj Linkeš
2e33309ebe config: enable/disable drivers in Arm builds
Add support for enabling or disabling drivers for Arm cross build. Do
not implement any enable/disable lists yet.

Enabling drivers is useful when building for an SoC where we only want
to build a few drivers. That way the list won't be too long.

Similarly, disabling drivers is useful when we want to disable only a
few drivers.

Both of these are advantageous mainly in aarch64 -> aarch64 (or arch ->
same arch) builds, where the build machine may have the required driver
dependencies, yet we don't want to build drivers for a specific SoC.

If enable_drivers is a non-empty list, build only those drivers,
otherwise build all drivers and add them to enable_drivers.  If
disable_drivers is non-empty list, build all drivers specified in
enable_drivers except those in disable_drivers.

There are two drivers, bus/pci and bus/vdev, which break the build if
not enabled. Address this by always enabling these if the user disables
them or doesn't specify in their allowlist.

Also remove the old Makefile arm configuration options which don't do
anything in Meson.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-04-15 22:34:37 +02:00
Stephen Hemminger
9667d97c25 pflock: add phase-fair reader writer locks
This is a new type of reader-writer lock that provides better fairness
guarantees which better suited for typical DPDK applications.
A pflock has two ticket pools, one for readers and one
for writers.

Phase-fair reader writer locks ensure that neither reader nor writer will
be starved.
Neither reader or writer are preferred, they execute in alternating
phases.
All operations of the same type (reader or writer) that acquire the lock
are handled in FIFO order.
Write operations are exclusive, and multiple read operations can be run
together (until a write arrives).

A similar implementation is in Concurrency Kit package in FreeBSD.
For more information see:
   "Reader-Writer Synchronization for Shared-Memory Multiprocessor
    Real-Time Systems",
    http://www.cs.unc.edu/~anderson/papers/ecrts09b.pdf

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2021-04-14 21:59:47 +02:00
Pavan Nikhilesh
005e6265e0 doc: announce event Rx adapter config changes
The Rx adapter event vector configuration will be merged into
Rx adapter queue configuration to simplify enabling event
vectorization.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
2021-04-12 09:23:34 +02:00
Pavan Nikhilesh
2eaa37b866 app/eventdev: add vector mode in pipeline test
Add event vector support in pipeline tests. By default this mode
is disabled, it can be enabled by using the option --enable_vector.
example:
	dpdk-test-eventdev -l 7-23 -s 0xff00 -- --prod_type_ethdev
	--nb_pkts=0 --verbose 2 --test=pipeline_atq --stlist=a
	--wlcores=20-23  --enable_vector

Additional options to configure vector size and vector timeout are
also implemented and can be used by specifying --vector_size and
--vector_tmo_ns

This patch also adds a new option to set the number of Rx queues
configured per event eth rx adapter.
example:
	dpdk-test-eventdev -l 7-23 -s 0xff00 -- --prod_type_ethdev
	--nb_pkts=0 --verbose 2 --test=pipeline_atq --stlist=a
	--wlcores=20-23  --nb_eth_queues 4

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-04-12 09:23:34 +02:00
Pavan Nikhilesh
d7c428e557 eventdev: support Rx adapter event vector
Add event vector support for event eth Rx adapter, the implementation
creates vector flows based on port and queue identifier of the received
mbufs.
The flow id for SW Rx event vectorization will use 12-bits of queue
identifier and 8-bits port identifier when custom flow id is not set
for simplicity.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
2021-04-12 09:23:34 +02:00
Pavan Nikhilesh
3da4060a30 eventdev: introduce event vector Tx capability
Introduce event vector transmit capability for event eth
tx adapter.

The capability indicates that the Tx adapter is capable of
transmitting event vectors.
When rte_event_vector::union_valid is set, the Tx adapter should
transmit all the packets to the rte_event_vector::port using the
rte_event_vector::queue.
If rte_event_vector::union_valid is not set then the Tx adapter
should peek into each mbuf to get the destination port and queue
pair.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
2021-04-12 09:23:34 +02:00
Pavan Nikhilesh
3c838062b9 eventdev: introduce event vector Rx capability
Introduce event ethernet Rx adapter event vector capability.

If an event eth Rx adapter has the capability of
RTE_EVENT_ETH_RX_ADAPTER_CAP_EVENT_VECTOR then a given Rx queue
can be configured to enable event vectorization by passing the
flag RTE_EVENT_ETH_RX_ADAPTER_QUEUE_EVENT_VECTOR to
rte_event_eth_rx_adapter_queue_conf::rx_queue_flags while configuring
Rx adapter through rte_event_eth_rx_adapter_queue_add().

The max vector size, vector timeout define the vector size and
mempool used for allocating vector event are configured through
rte_event_eth_rx_adapter_queue_add. The element size of the element
in the vector pool should be equal to
    sizeof(struct rte_event_vector) + (vector_sz * sizeof(uintptr_t))

Application can use `rte_event_vector_pool_create` to create the
vector mempool used for
rte_event_eth_rx_adapter_queue_conf::vector_mp.

The Rx adapter would be responsible for vectorizing the mbufs
based on the flow, the vector limits configured by the application
and add the vector event of mbufs to the event queue set via
rte_event_eth_rx_adapter_queue_conf::ev::queue_id.
It should also mark rte_event_vector::union_valid and fill
rte_event_vector::port, rte_event_vector::queue.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
2021-04-12 09:23:34 +02:00
Pavan Nikhilesh
1cc44d4092 eventdev: introduce event vector capability
Introduce rte_event_vector datastructure which is capable of holding
multiple uintptr_t of the same flow thereby allowing applications
to vectorize their pipeline and reducing the complexity of pipelining
the events across multiple stages.
This approach also reduces the scheduling overhead on a event device.

Add a event vector mempool create handler to create mempools based on
the best mempool ops available on a given platform.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
2021-04-12 09:23:34 +02:00
Shijith Thotton
64ea4ae178 event/octeontx2: support timer periodic mode
Add support for periodic mode in event timer adapter.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-04-12 09:23:34 +02:00
Shijith Thotton
a10d79a60b eventdev: introduce adapter flags for periodic mode
A timer adapter in periodic mode can be used to arm periodic timers.
This patch adds flags used to advertise capability and configure timer
adapter in periodic mode. Capability flag should be set for adapters
which support periodic mode.

Below is a programming sequence on the usage:
	/* check for periodic mode support by reading capability. */
	rte_event_timer_adapter_caps_get(...);

	/* create adapter in periodic mode by setting periodic flag
	   (RTE_EVENT_TIMER_ADAPTER_F_PERIODIC) and resolution. */
	rte_event_timer_adapter_create_ext(...);

	/* arm periodic timer of configured resolution */
	rte_event_timer_arm_burst(...);

	/* timer event will be periodically generated at configured
	   resolution till cancel is called. */
	while (running) { rte_event_dequeue_burst(...); }

	/* cancel periodic timer which stops generating events */
	rte_event_timer_cancel_burst(...);

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-04-12 09:23:34 +02:00
Timothy McDaniel
698fa82941 event/dlb: remove driver
Remove event/dlb driver from DPDK code base.
Updated release note's removal section to reflect the same.

Also updated doc/guides/rel_notes/release_20_11.rst to fix the
the missing link issue due to removal of doc/guides/eventdevs/dlb.rst

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-04-12 09:21:30 +02:00
Wisam Jaddo
eb4df25f53 app/flow-perf: add runtime option to use unique data
Current support for unique data is to compile with config.h
var FIXED_VALUES as 0, and this is only supported on
compilation time, as a result the user may use only single
mode for each compilation.

Starting with this commit the user will have the ability to
use this feature on the fly by using this new option:
--unique-data

Example of unique data usage:
Insert many rules with different encap data for a flows that
have encap action in it.

Signed-off-by: Wisam Jaddo <wisamm@nvidia.com>
Acked-by: Alexander Kozyrev <akozyrev@nvidia.com>
2021-04-12 15:51:04 +02:00
Smadar Fuks
1b14508b3b net/octeontx2: support flow action port ID
Action port_id was not supported until now.
In this patch the action port_id supports passing from input
port PF to output port which is one of input port respective VF

Signed-off-by: Smadar Fuks <smadarf@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-04-08 17:09:57 +02:00
Alexander Kozyrev
d2cf28145f doc: add fields enum for modify action in flow guide
Fix the documentation about the MODIFY_FIELD flow action.
1. Include the rte_flow_field_id enumeration reference to point
to the full list of all supported Field IDs available.
2. Correct the formatting of the MODIFY_FIELD action and the
destination/source field definition tables.

Fixes: 73b68f4c54 ("ethdev: introduce generic modify flow action")
Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-08 15:21:43 +02:00
Salem Sol
3b622711bc app/testpmd: support NVGRE encap as sample action
Add support for rte_flow_action_nvge_encap as a sample action.

The example of test-pmd command:

1.  set nvgre ip-version ... tni ... ip-src ... ip-dst ...
    set raw_encap 1 eth src... / ipv4... /...
    set sample_actions 2 nvgre / port_id id 0 / end
    flow create 0 ... pattern eth / end actions
       sample ratio 1 index 2 / raw_encap index 1 / port_id id 0...

    The flow will result in all the matched egress packets will be
    encapsulated and sent to wire, and also mirrored the packets
    using NVGRE encapsulation data and sent to wire.

Signed-off-by: Salem Sol <salems@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-08 01:09:24 +02:00
Salem Sol
a1f20f1abc app/testpmd: support VXLAN encap as sample action
Add support for rte_flow_action_vxlan_encap as a sample action.

The example of test-pmd command:

1.  set vxlan ip-version ... vni ... udp-src ...
    set raw_encap 1 eth src.../ ipv4.../...
    set sample_actions 2 vxlan_encap / port_id id 0 / end
    flow create 0 ... pattern eth / end actions
       sample ratio 1 index 2 / raw_encap index 1 / port_id id 0...

    The flow will result in all the matched egress packets will be
    encapsulated and sent to wire, and also mirrored the packets
    using VXLAN encapsulation data and sent to wire.

Signed-off-by: Salem Sol <salems@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-08 01:09:24 +02:00
Salem Sol
fd44e8288f net/mlx5: support NVGRE encap action in sampling
Add support for NVGRE encap as a sample action
and validate it.

Signed-off-by: Salem Sol <salems@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-04-08 01:09:24 +02:00
Salem Sol
be47c9819f net/mlx5: support VXLAN encap action in sampling
Add support for VXLAN encap as a sample action
and validate it.

Signed-off-by: Salem Sol <salems@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-04-08 01:09:24 +02:00
Robin Zhang
13489381cc doc: update recommended versions for i40e
Kernel driver 2.13.10 is removed, so update recommended matching list
for i40e.

Cc: stable@dpdk.org

Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2021-04-01 10:02:57 +02:00
Pallavi Kadam
de853a3bb1 net/ice: disable DDP package on Windows
Disable loading of external DDP package as it is not
supported on Windows.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Jie Zhou <jizh@microsoft.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-06 19:00:36 +02:00
Pallavi Kadam
ce6617a069 net/ice: build on Windows
- Add Intel ice PMD support on Windows.
- Remove #include sys/ioctl header file as it is not needed.
- Replace x86intrin.h with rte_vect.h to avoid __m_prefetchw conflicting
  types.
- Replace POSIX usleep() API with rte API.
- Add a new macro for the access() API as the original function
  has been deprecated on Windows.
- Add extra cflags '-fno-asynchronous-unwind-tables'
  to avoid MinGW build error:
  Error: invalid register for .seh_savexmm
- Add documentation to support ice PMD on Windows.
  Update the release notes and features list for the same.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Jie Zhou <jizh@microsoft.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-06 19:00:36 +02:00
Min Hu (Connor)
38b539d96e net/hns3: support IEEE 1588 PTP
Add hns3 support for new ethdev APIs to enable and read IEEE1588/
802.1AS PTP timestamps.

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-01 18:39:55 +02:00
Qi Zhang
bb6270dab3 ethdev: refine debug build option
PMDs use RTE_LIBRTE_<PMD_NAME>_DEBUG_RX|TX as build option to wrap
data path debug code. As .config has been removed since the meson build,
It is not friendly for new DPDK users to notice those debug options.

The patch introduces below build options for data path debug, so PMD
can choose to reuse them to avoid maintain their own.

- RTE_ETHDEV_DEBUG_RX
- RTE_ETHDEV_DEBUG_TX

All the build options are documented at programming guide
"3.1 Driver Option", so users can easily find them.

The original undocumented RTE_LIBRTE_ETHDEV_DEBUG will alias to
both RTE_ETHDEV_DEBUG_RX and RTE_ETHDEV_DEBUG_TX for backward
compatibility.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-01 16:10:20 +02:00
Jiawei Wang
01ee2e49f6 doc: add sampling and mirroring in testpmd guide
Update documentation for sample action usage in testpmd and
show the command line example.

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-01 13:50:50 +02:00
Ashwin Sekhar T K
db2a347a50 mempool/cnxk: add batch operation init
Marvell CN10k mempool supports batch enqueue/dequeue which can
dequeue up to 512 pointers and enqueue up to 15 pointers using
a single instruction.

These batch operations require a DMA memory to enqueue/dequeue
pointers. This patch adds the initialization of this DMA memory.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
89627db18f mempool/cnxk: add cn10k mempool operations
Add Marvell CN10k mempool ops and implement CN10k mempool alloc.

CN10k has 64 bytes L1D cache line size. Hence the CN10k mempool
alloc does not make the element size an odd multiple L1D cache
line size as NPA requires the element sizes to be multiples of
128 bytes.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
2655241a7e mempool/cnxk: add cn9k optimized enqueue/dequeue
Add Marvell CN9k mempool enqueue/dequeue. Marvell CN9k
supports burst dequeue which allows to dequeue up to 32
pointers using pipelined casp instructions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
0a50a5aad2 mempool/cnxk: add device probe/remove
Add the implementation for CNXk mempool device
probe and remove.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
2da3159197 mempool/cnxk: add build infra and doc
Add the meson based build infrastructure for Marvell
CNXK mempool driver along with stub implementations
for mempool device probe.

Also add Marvell CNXK mempool base documentation.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Nithin Dabilpuram
68a03efeed doc: add Marvell cnxk platform guide
Platform specific guide for Marvell OCTEON CN9K/CN10K SoC is added.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2021-04-09 08:32:24 +02:00
Juraj Linkeš
5b3a6ca6fd build: alias default build as generic
The current machine='default' build name is not descriptive. The actual
default build is machine='native'. Add an alternative string which does
the same build and better describes what we're building:
machine='generic'. Leave machine='default' for backwards compatibility.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-04-09 19:11:26 +02:00
Bruce Richardson
bc46174338 build: enable a developer mode setting
To allow support for additional build checks and tests only really
relevant for developers, we add support for a developer mode option to
DPDK. The default, "auto", value for this enables developer mode if a
".git" folder is found at the root of the source tree - as was the case
with the previous "make" build system. There is also support for
explicitly enabling or disabling this option using "meson configure" if
so desired.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-04-09 19:07:25 +02:00
Suanming Mou
cace2d7ef2 app/test-regex: add scattered mbuf input
This commits adds the scattered mbuf input support.

Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
2021-04-08 22:52:55 +02:00
Suanming Mou
330a70b773 regex/mlx5: add data path scattered mbuf process
UMR (User-Mode Memory Registration) WQE can present data buffers
scattered within multiple mbufs with single indirect mkey. Take
advantage of the UMR WQE, scattered mbuf in one operation can be
presented to an indirect mkey. The RegEx which only accepts one
mkey can now process the whole scattered mbuf in one operation.

The maximum scattered mbuf can be supported in one UMR WQE is now
defined as 64. The mbufs from multiple operations can be combined
into one UMR WQE as well if there is enough space in the KLM array,
since the operations can address their own mbuf's content by the
mkey's address and length. However, one operation's scattered mbuf's
can't be placed in two different UMR WQE's KLM array, if the UMR
WQE's KLM does not has enough free space for one operation, the
extra UMR WQE will be engaged.

In case the UMR WQE's indirect mkey will be over wrapped by the SQ's
WQE move, the mkey's index used by the UMR WQE should be the index
of last the RegEX WQE in the operations. As one operation consumes
one WQE set, build the RegEx WQE by reverse helps address the mkey
more efficiently. Once the operations in one burst consumes multiple
mkeys, when the mkey KLM array is full, the reverse WQE set index
will always be the last of the new mkey's for the new UMR WQE.

In GGA mode, the SQ WQE's memory layout becomes UMR/NOP and RegEx
WQE by interleave. The UMR and RegEx WQE can be called as WQE set.
The SQ's pi and ci will also be increased as WQE set not as WQE.

For operations don't have scattered mbuf, uses the mbuf's mkey directly,
the WQE set combination is NOP + RegEx.
For operations have scattered mbuf but share the UMR WQE with others,
the WQE set combination is NOP + RegEx.
For operations complete the UMR WQE, the WQE set combination is UMR +
RegEx.

Signed-off-by: John Hurley <jhurley@nvidia.com>
Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
2021-04-08 22:52:55 +02:00
Thomas Monjalon
b164198729 drivers: align log names
The log levels are configured by using the name of the logs.
Some drivers are aligned to follow a common log name standard:
	pmd.class.driver[.sub]
Some "common" drivers skip the "class" part:
	pmd.driver.sub

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Acked-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-08 18:32:31 +02:00
Thomas Monjalon
4d509afa7b pci: rename catch-all ID
The name of the constant PCI_ANY_ID was missing RTE_ prefix.
It is renamed, and the old name becomes a deprecated alias.

While renaming, the duplicate definitions in rte_bus_pci.h
are removed to keep only those in rte_pci.h.
Note: rte_pci.h is included in rte_bus_pci.h

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Parav Pandit <parav@nvidia.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-04-06 14:52:49 +02:00
David Marchand
aa9cb78f66 doc: fix sphinx rtd theme import in GHA
If the rtd theme is available, passing it by name is enough to select
it. Sphinx itself recognises the "sphinx_rtd_theme" name as a special
case and tries to find its path automatically.

On the other hand, passing a html_theme_path makes sphinx parse all
themes availables in this path, which in some environment (like GHA) is
/usr/share and makes sphinx error on the first zipfile it finds (in GHA,
some Azure CLI thingy) that has no sphinx theme in it.

Fixes: 46562be650 ("doc: import sphinx rtd theme when available")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Aaron Conole <aconole@redhat.com>
2021-04-02 01:39:34 +02:00
Alexander Kozyrev
5cc6764267 net/mlx5: reject tunnel ID modification
Modification of the 802.1Q Tag Identifier, VXLAN Network
Identifier or GENEVE Network Identifier is not supported.
Reject attempt to modify these fields via the MODIFY_FIELD
action and document this mlx5 driver limitation.

Fixes: 641dbe4fb0 ("net/mlx5: support modify field flow action")
Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-03-31 09:21:30 +02:00
Xueming Li
08c2772fc7 net/mlx5: support list of representor PF
To probe representors from different kernel bonding PFs, had to specify
2 separate devargs like this:
    -a 03:00.0,representor=pf0vf[0-3] -a 03:00.0,representor=pf1vf[0-3]

This patch supports range or list of PF section in devargs, so the
alternative short devargs of above is:
    -a 03:00.0,representor=pf[0-1]vf[0-3]

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-03-31 09:16:30 +02:00
Xueming Li
f926cce3fa net/mlx5: refactor bonding representor probing
To probe representor on 2nd PF of kernel bonding device, had to specify
PF1 BDF in devarg:
  <PF1_BDF>,representor=0
When closing bonding device, all representors had to be closed together
and this implies all representors have to use primary PF of bonding
device. So after probing representor port on 2nd PF, when locating new
probed device using device argument, the filter used 2nd PF as PCI
address and failed to locate new device.

Conflict happened by using current representor devargs:
 - Use PCI BDF to specify representor owner PF
 - Use PCI BDF to locate probed representor device.
 - PMD uses primary PCI BDF as PCI device.

To resolve such conflicts, new representor syntax is introduced here:
  <primary BDF>,representor=pfXvfY
All representors must use primary PF as owner PCI device, PMD internally
locate owner PCI address by checking representor "pfX" part. To EAL, all
representors are registered to primary PCI device, the 2nd PF is hidden
to EAL, thus all search should be consistent.

Same to VF representor, HPF (host PF on BlueField) uses same syntax to
probe, example: representor=pf1vf[0-3,-1]

This patch also adds pf index into kernel bonding representor port name:
	<BDF>_<ib_name>_representor_pf<X>vf<Y>

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-03-31 09:16:28 +02:00
Xueming Li
cb95feefdd net/mlx5: support sub-function representor
This patch adds support for SF representor. Similar to VF representor,
switch port name of SF representor in phys_port_name sysfs key is
"pf<x>sf<y>".

Device representor argument is "representors=sf[list]", list member
could be mix of instance and range. Example:
  representors=sf[0,2,4,8-12,-1]

To probe VF representor and SF representor, need to separate into 2
devices:
  -a <BDF>,representor=vf[list] -a <BDF>,representor=sf[list]

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-03-31 09:16:25 +02:00
Junfeng Guo
f91c7b2da1 net/iavf: support GTPU inner IPv4 for flow director
Support GTPU_(EH)_IPV4 inner L3 and L4 fields matching for AVF FDIR.

+------------------------------+---------------------------------+
|           Pattern            |            Input Set            |
+------------------------------+---------------------------------+
| eth/ipv4/gtpu/ipv4           | inner: src/dst ip               |
| eth/ipv4/gtpu/ipv4/udp       | inner: src/dst ip, src/dst port |
| eth/ipv4/gtpu/ipv4/tcp       | inner: src/dst ip, src/dst port |
| eth/ipv4/gtpu/eh/ipv4        | inner: src/dst ip               |
| eth/ipv4/gtpu/eh/ipv4/udp    | inner: src/dst ip, src/dst port |
| eth/ipv4/gtpu/eh/ipv4/tcp    | inner: src/dst ip, src/dst port |
| eth/ipv4/gtpu/eh(0)/ipv4     | inner: src/dst ip               |
| eth/ipv4/gtpu/eh(0)/ipv4/udp | inner: src/dst ip, src/dst port |
| eth/ipv4/gtpu/eh(0)/ipv4/tcp | inner: src/dst ip, src/dst port |
| eth/ipv4/gtpu/eh(1)/ipv4     | inner: src/dst ip               |
| eth/ipv4/gtpu/eh(1)/ipv4/udp | inner: src/dst ip, src/dst port |
| eth/ipv4/gtpu/eh(1)/ipv4/tcp | inner: src/dst ip, src/dst port |
+------------------------------+---------------------------------+

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-03-30 01:21:17 +02:00
Jiawen Wu
9997a0cb64 net/txgbe: add FFE parameters for user debugging
Support to set PHY link mode by user defined.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-03-29 17:49:34 +02:00
Jiawen Wu
f611dada1a net/txgbe: update link setup process of backplane NICs
Add device arguments to support runtime options.
And use these configuration to control the link setup flow, to adapt to
different NIC's construction. Use firmware version to control the impact
of firmware update. And fix some left bugs.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-03-29 17:49:34 +02:00
Thomas Monjalon
fb7ad441d4 ethdev: replace callback getting filter operations
Since rte_flow is the only API for filtering operations,
the legacy driver interface filter_ctrl was too much complicated
for the simple task of getting the struct rte_flow_ops.

The filter type RTE_ETH_FILTER_GENERIC and
the filter operarion RTE_ETH_FILTER_GET are removed.
The new driver callback flow_ops_get replaces filter_ctrl.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-03-26 18:37:13 +01:00
Dmitry Kozlyuk
8d96d605d3 net/vmxnet3: enable on Windows
Remove OS restriction and update release notes.

For the record, tested on the following setup with Windows Server 2019 in
QEMU (-device vmxnet3) :

[ping     ]           [                     ]           [     ping]
[OS       ]           [    dpdk-skeleton    ]           [       OS]
[virtio---]--sockets--[---vmxnet3 vmxnet3---]--sockets--[---virtio]
[Debian VM]           [     Windows VM      ]           [Debian VM]

Debian VMs successfully ping'd each other with Windows forwarding.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Yong Wang <yongwang@vmware.com>
2021-03-25 17:00:49 +01:00
Jiawei Wang
32a74d8127 doc: update sample actions support in mlx5 guide
Updates the documentation for supported sample actions in the NIC Rx
and E-Switch steering flow.

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-03-23 13:52:31 +01:00
Dapeng Yu
e77f5dc83d doc: update firmware/driver mapping table for i40e
Update i40e PMD firmware/driver mapping table.

Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-03-24 13:46:20 +01:00
Satheesh Paul
5cf9911717 net/octeontx2: support raw flow pattern
Add support for rte_flow_item_raw to parse custom L2 and L3 protocols.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-03-20 15:16:55 +01:00
Hongbo Zheng
63e05f19b8 net/hns3: support Rx descriptor status query
Add support for query Rx descriptor status in hns3 driver. Check the
descriptor specified and provide the status information of the
corresponding descriptor.

Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-03-23 13:04:33 +01:00
Hongbo Zheng
656a6d9cc0 net/hns3: support Tx descriptor status query
Add support for query Tx descriptor status in hns3 driver. Check the
descriptor specified and provide the status information of the
corresponding descriptor.

Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-03-23 13:04:33 +01:00
Chengchang Tang
d0ab89e633 net/hns3: support outer UDP checksum
Kunpeng930 support outer UDP cksum, this patch add support for it.

Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-03-23 13:04:32 +01:00
Chengwen Feng
a124f9e959 net/hns3: add runtime config to select IO burst function
Currently, the driver support multiple IO burst function and auto
selection of the most appropriate function based on offload
configuration.

Most applications such as l2fwd/l3fwd don't provide the means to
change offload configuration, so it will use the auto selection's io
burst function.

This patch support runtime config to select io burst function, which
add two config: rx_func_hint and tx_func_hint, both could assign
vec/sve/simple/common.

The driver will use the following rules to select io burst func:
a. if hint equal vec and meet the vec Rx/Tx usage condition then use the
   neon function.
b. if hint equal sve and meet the sve Rx/Tx usage condition then use the
   sve function.
c. if hint equal simple and meet the simple Rx/Tx usage condition then
   use the simple function.
d. if hint equal common then use the common function.
e. if hint not set then:
e.1. if meet the vec Rx/Tx usage condition then use the neon function.
e.2. if meet the simple Rx/Tx usage condition then use the simple
     function.
e.3. else use the common function.

Note: the sve Rx/Tx usage condition based on the vec Rx/Tx usage
condition and runtime environment (which must support SVE).

In the previous versions, driver will preferred use the sve function
when meet the sve Rx/Tx usage condition, but in this case driver could
get better performance if use the neon function.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-03-23 13:04:32 +01:00
Rahul Lakkireddy
23d5fee348 net/cxgbe: disable Rx during port link down
When link goes down, disable the port's Rx path to drop the incoming
traffic closer to the wire, instead of accepting them in for further
Rx processing, only to eventually drop them at the port's RxQs. This
prevents unnecessary congestion in the Rx path. The port's Rx path
will be re-enabled once the link up event is received in the firmware
event queue.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
2021-03-22 19:21:55 +01:00
Ed Czeck
6c7f491e7f net/ark: generalize meta data between FPGA and PMD
In this commit we generalize the movement of user-specified
meta data between mbufs and FPGA AXIS tuser fields using
user-defined hook functions.

- Previous use of PMD dynfields are removed
- Remove emptied rte_pmd_ark.h
- Hook function added to ark_user_ext
- Add hook function calls in Rx and Tx paths
- Update guide with example of hook function use

Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
2021-03-22 16:56:27 +01:00
Ed Czeck
f2764c3688 net/ark: cleanup dynamic extension interface
- Rename extension functions with rte_pmd_ark prefix
- Update local function documentation

Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
2021-03-22 16:56:27 +01:00
Ed Czeck
9ee9e0d3b8 net/ark: update to reflect FPGA updates
- New PCIe IDs using net/ark driver
- Update Version IDs and structures specified by hardware
- New internal descriptor status for TX
- Adjust data placement in RX operations, headroom in retained for
  segmented mbufs

Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
2021-03-22 16:56:27 +01:00
Tal Shnaiderman
1325a1ffd9 eal: rename thread TLS API
Rename the key opaque pointer from rte_tls_key to
rte_thread_key to avoid confusion with transport layer security.

Also rename and remove the "_tls" term from the following
functions to avoid redundancy:

rte_thread_tls_key_create
rte_thread_tls_key_delete
rte_thread_tls_value_set
rte_thread_tls_value_get

Suggested-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Suggested-by: Morten Brørup <mb@smartsharesystems.com>
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
2021-03-26 09:22:39 +01:00
Bruce Richardson
e34e2f55a7 telemetry: make the legacy registration function internal
The function for registration of callbacks for legacy telemetry was
documented as internal-only in the API documents, but marked as
experimental in the version.map file. Since this is an internal-only
function, for consistency we update the version mapping to have it as
internal.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
2021-03-25 17:35:10 +01:00
Xueming Li
66e0ea2c98 ethdev: support multi-host in representor
The NIC can have multiple PCIe links and can be attached to the multiple
hosts, for example the same single NIC can be shared for multiple server
units in the rack. On each PCIe link NIC can provide multiple PFs and
VFs/SFs based on these ones. To provide the unambiguous identification
of the PCIe function the controller index is added. The full representor
identifier consists of three indices - controller index, PF index, and
VF or SF index (if any).

This patch introduces controller index to ethdev representor syntax,
examples:

[[c#]pf#]vf#: VF port representor/s, example: pf0vf1
[[c#]pf#]sf#: SF port representor/s, example: c1pf1sf[0-3]

c# is controller(host) ID/range in case of multi-host, optional.

For user application (e.g. OVS), PMD is responsible to interpret and
locate representor device based on controller ID, PF ID and VF/SF ID in
representor syntax.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2021-03-16 20:15:29 +01:00
Xueming Li
da97592635 ethdev: support PF index in representor
With Kernel bonding, multiple underlying PFs are bonded, VFs come
from different PF, need to identify representor of VFs unambiguously by
adding PF index.

This patch introduces optional 'pf' section to representor devargs
syntax, examples:
 representor=pf0vf0             - single VF representor
 representor=pf[0-1]sf[0-1023]  - SF representors from 2 PFs

PF type representor is supported by using standalone 'pf' section:
 representor=pf1                - PF representor

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2021-03-16 20:15:29 +01:00
Xueming Li
fa4f3fecb9 ethdev: support sub-function representor
SubFunction is a portion of the PCI device, created on demand, a SF
netdev has its own dedicated queues(txq, rxq). A SF netdev supports
eswitch representation offload similar to existing PF and VF
representors.

To support SF representor, this patch introduces new devargs syntax,
examples:
 representor=sf0               - single SubFunction representor
 representor=sf[1,3,5]         - single list
 representor=sf[0-3],          - single range
 representor=sf[0,2-6,8,10-12] - list with singles and ranges

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2021-03-16 20:15:29 +01:00
Xueming Li
cebf7f1715 ethdev: support new VF representor syntax
Current VF representor syntax:
 representor=2          - single representor
 representor=[0-3]      - single range

To prepare for more representor types, this patch adds compatible VF
representor devargs syntax:

vf#:
 representor=vf2          - single representor
 representor=vf[1,3,5]    - single list
 representor=vf[0-3]      - single range
 representor=vf[0,1,4-7]  - list with singles and range

For backwards compatibility, representor "#" is interpreted as "vf#".

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2021-03-16 20:15:29 +01:00
Xueming Li
d654167641 ethdev: introduce representor type
To support more representor type, this patch introduces representor type
enum. The enum is subject to be extended to support new representor in
patches upcoming.

For each devarg structure, only one type supported.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
2021-03-16 20:15:29 +01:00
Vijay Kumar Srivastava
dd461e811b net/sfc: skip driver probe for incompatible device class
Driver would be probed only for the net device class.

Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2021-03-16 12:39:42 +01:00
Kalesh AP
8ea894a743 net/bnxt: update HWRM structures
Brought in the latest hsi_struct_def_dpdk.h.
HWRM API is now updated to version 1.10.2.15.

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-03-12 07:00:21 +01:00
Andrew Rybchenko
98d26ef7b8 net/sfc: update copyright year
Bump copyright year to 2021.

Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2021-03-12 15:57:16 +01:00
Ciara Loftus
055a393626 net/af_xdp: prefer busy polling
This commit introduces support for preferred busy polling
to the AF_XDP PMD. This feature aims to improve single-core
performance for AF_XDP sockets under heavy load.

A new vdev arg is introduced called 'busy_budget' whose default
value is 64. busy_budget is the value supplied to the kernel
with the SO_BUSY_POLL_BUDGET socket option and represents the
busy-polling NAPI budget. To set the budget to a different value
eg. 256:

--vdev=net_af_xdp0,iface=eth0,busy_budget=256

Preferred busy polling is enabled by default provided a kernel with
version >= v5.11 is in use. To disable it, set the budget to zero.

The following settings are also strongly recommended to be used in
conjunction with this feature:

echo 2 | sudo tee /sys/class/net/eth0/napi_defer_hard_irqs
echo 200000 | sudo tee /sys/class/net/eth0/gro_flush_timeout

.. where eth0 is the interface being used by the PMD.

Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-03-10 18:49:32 +01:00
Ajit Khaparde
b7b78a089c app/testpmd: support forced ethernet speed
Add support for forced ethernet speed setting.
Currently testpmd tries to configure the Ethernet port in autoneg mode.
It is not possible to set the Ethernet port to a specific speed while
starting testpmd. In some cases capability to configure a forced speed
for the Ethernet port during initialization may be necessary. This patch
tries to add this support.

The patch assumes full duplex setting and does not attempt to change that.
So speeds like 10M, 100M are not configurable using this method.

The command line to configure a forced speed of 10G:
dpdk-testpmd -c 0xff  -- -i  --eth-link-speed  10000

The command line to configure a forced speed of 50G:
dpdk-testpmd -c 0xff  -- -i  --eth-link-speed  50000

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-03-08 12:44:01 +01:00
Hemant Agrawal
27088cb98e doc: update release notes for dpaax
This patch updates the release notes for recently submitted changes.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2021-03-08 12:32:33 +01:00
Huisong Li
2e4859f3b3 net/hns3: support PF device with copper PHYs
The normal operation of devices with copper phys depends on the
initialization and configuration of the PHY chip. The task of
driving the PHY chip is implemented in some firmware versions.
If firmware supports the phy driver, it will report a capability
flag to driver in probing process. The driver determines whether
to support PF device with copper phys based on the capability bit.
If supported, the driver set a flag indicating that the firmware
takes over the PHY, and then the firmware initializes the PHY.

This patch supports the query of link status and link info, and
existing basic features for PF device with copper phys.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
2021-03-04 15:07:14 +01:00
Chengwen Feng
dfecc3201f net/hns3: implement Tx mbuf free on demand
This patch add support tx_done_cleanup ops, which could support for
the API rte_eth_tx_done_cleanup to free consumed mbufs on Tx ring.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
2021-03-04 15:07:13 +01:00
Chengchang Tang
c6332c3cf9 net/hns3: support module EEPROM dump
This patch add support for dumping module EEPROM.

Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
2021-03-04 15:07:13 +01:00
Lance Richardson
e8a419d6de mbuf: rename outer IP checksum macro
Rename PKT_RX_EIP_CKSUM_BAD to PKT_RX_OUTER_IP_CKSUM_BAD and
deprecate the original name. The new name is better aligned
with existing PKT_RX_OUTER_* flags, which should help reduce
confusion about its use.

Suggested-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-03-02 10:57:28 +01:00
Jiawen Wu
d5f2880c98 net/txgbe: reuse some PF Rx/Tx features for VF
Some Rx/Tx operations like queue setup and release, packet type get, and
Tx done cleanup have been supported on PF device. There are ops
functions directly added.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Jiawen Wu
66ffac9a80 net/txgbe: support VF register dump
Add support to dump registers for VF.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Jiawen Wu
a2beaa4a76 net/txgbe: support VF MTU update
Add MTU set operation for VF device.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Jiawen Wu
c8307adaaa net/txgbe: support VF multicast MAC filter
Add multicast MAC filter support for VF driver.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Jiawen Wu
29072d593f net/txgbe: support VF promiscuous and allmulticast
Support to enable and disable promiscuous and allmulticast mode on VF
device.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Jiawen Wu
64b5d946d1 net/txgbe: support VF RSS
Support RSS hash and RETA operations for VF device.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Jiawen Wu
aa1ae7941e net/txgbe: support VF VLAN
Add VLAN filter, offload and strip set support to VF driver.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Jiawen Wu
27890a34ca net/txgbe: support VF stats and xstats
Add VF device stats and extended stats get from reading hardware
registers.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Jiawen Wu
92144bb36c net/txgbe: support VF Rx/Tx
Configure VF device with RX port. Initialize receive and transmit unit,
set the receive and transmit functions. And support to check the
status of RX and TX descriptors.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Jiawen Wu
7d9c9667b7 net/txgbe: support VF get link status
Add support to get link speed, duplex mode and state of VF device.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Jiawen Wu
b7311360fb net/txgbe: support VF interrupt
Add VF device interrupt handler, support to enable and disable RX queue
interrupt, and configure MSI-X interrupt.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Jiawen Wu
5dec016955 net/txgbe: support VF get information
Add information get operation for VF device.
RX and TX offload capabilities are same as the PF device.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Jiawen Wu
039b769f7c net/txgbe: support VF MAC address
Generate a random MAC address if none was assigned by PF during
the initialization of VF device. And support to add and remove
MAC address.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Jiawen Wu
803e4bb14d net/txgbe: support VF probe and remove
Introduce virtual function driver in txgbe PMD,
add simple init and uninit function to probe and remove the device.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-02-26 14:13:03 +01:00
Nipun Gupta
4690a6114f net/dpaa2: enable error queues optionally
In case error packets are received by the Ethernet interface,
this patch enables receiving packets on the error queue,
printing the error and the error packet.

To enable, use the dev_arg as : fslmc:dpni.1,drv_error_queue=1

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2021-02-24 18:03:30 +01:00
Hemant Agrawal
8d21c56338 net/dpaa2: support optional Tx confirmation
Add support for dev arg ``fslmc:dpni.1,drv_tx_conf=1``

It is optional for dpaa2 to use TX confirmation. DPAA2
can free the transmitted packets. However some use-case
requires the TX confirmation to be explicit.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2021-02-24 18:03:30 +01:00
Gagandeep Singh
ac624068ee net/dpaa2: support traffic management
Add basic support for scheduling and shaping on dpaa2
platform.

HW supports 2 level of scheduling and shaping.
However the current patch only support single level.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2021-02-24 18:03:30 +01:00
Ferruh Yigit
ecf86ccb4b app/testpmd: remove duplicated offload display
"show port cap all|<port_id>" was to display offload configuration of
port(s).

But later two other commands added to show same information in more
accurate way:
 show port (port_id) rx_offload configuration
 show port (port_id) tx_offload configuration

These new commands can both show port and queue level configuration,
also with their capabilities counterparts easier to see offload
capability and configuration of the port in similar syntax.

So the functionality is duplicated and removing this version, to favor
the new commands.

Another problem with this command is it requires each new offload to be
added into the function to display them, and there were missing offloads
that are not displayed, this requirement for sure will create gaps by
time as new offloads added.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Lance Richardson <lance.richardson@broadcom.com>
Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
2021-02-24 13:28:30 +01:00
Lance Richardson
6f04fa4521 app/testpmd: display Rx queue used descriptor count
Add support for displaying the count of used (filled by hardware
but not yet processed by the driver) descriptors on a receive
queue in order to allow the rte_eth_dev rx_queue_count() API to
be exercised and tested.

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
2021-02-22 12:16:14 +01:00
Nithin Dabilpuram
016763c219 vfio: do not merge contiguous areas
In order to save DMA entries limited by kernel both for external
memory and hugepage memory, an attempt was made to map physically
contiguous memory in one go. This cannot be done as VFIO IOMMU type1
does not support partially unmapping a previously mapped memory
region while Heap can request for multi page mapping and
partial unmapping.
Hence for going back to old method of mapping/unmapping at
memseg granularity, this commit reverts
commit d1c7c0cdf7 ("vfio: map contiguous areas in one go")

Also add documentation on what module parameter needs to be used
to increase the per-container dma map limit for VFIO.

Fixes: d1c7c0cdf7 ("vfio: map contiguous areas in one go")
Cc: stable@dpdk.org

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: David Christensen <drc@linux.vnet.ibm.com>
2021-03-01 11:58:24 +01:00
Thomas Monjalon
442155f70c version: 21.05-rc0
Start a new release cycle with empty release notes.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: David Marchand <david.marchand@redhat.com>
2021-02-15 11:08:19 +01:00
John McNamara
2057081691 doc: update release notes for 21.02
Fix grammar, spelling and formatting of DPDK 21.02 release notes.

Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-02-12 16:18:31 +01:00
Dmitry Kozlyuk
b7ede165ae doc: add pmdinfogen rewrite to release notes
The build tool pmdinfogen was rewritten in DPDK 21.02,
adding Windows support.
There is a new build-time dependency: pyelftools.

Fixes: f0f93a7adf ("buildtools: use Python pmdinfogen")
Fixes: 6b19edcb66 ("build: enable pmdinfogen for Windows")

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-02-12 16:18:31 +01:00
Kevin Traynor
63a9293fd1 doc: update pyelftools install method
python-pyelftools is not packaged for RHEL/CentOS with
the exception of RHEL7 EPEL.

Add command to install it with pip.

Fixes: f0f93a7adf ("buildtools: use Python pmdinfogen")

Signed-off-by: Kevin Traynor <ktraynor@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-02-12 16:18:31 +01:00
Thomas Monjalon
de34aaa96b doc: replace hugepages commands with dedicated tool
The tool dpdk-hugepages.py, added in DPDK 20.11,
is referenced in the guides instead of more complicate commands.

The original Linux commands are kept in linux_gsg/sys_reqs.rst
and nics/build_and_test.rst.

Suggested-by: Stephen Hemminger <stephen@networkplumber.org>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2021-02-11 23:26:37 +01:00
Sarosh Arif
e3f15be4d4 doc: replace testpmd with dpdk-testpmd in commands
replace testpmd with dpdk-testpmd in all commands
because on compilation through meson, dpdk-testpmd is the default
application name.

Signed-off-by: Sarosh Arif <sarosh.arif@emumba.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-02-11 15:42:18 +01:00
Hemant Agrawal
d5e8a9f7eb doc: add tested platforms with NXP SoCs
Add tested platforms with NXP SoCs to the 21.02 release notes.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2021-02-11 14:47:38 +01:00
Ajit Khaparde
5a5e554835 doc: add tested platforms for Broadcom NICs
Add tested platforms for Broadcom NICs.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-02-11 12:06:20 +01:00
Raslan Darawsheh
084c01643a doc: add tested platforms with Mellanox NICs
Add tested platforms with Mellanox NICs to the 21.02 release notes.

Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>
2021-02-11 12:01:15 +01:00
Bo Chen
01ed3ccf7c doc: add tested Intel platforms with Intel NICs
Add tested Intel platforms with Intel NICs to v21.02 release note.

Signed-off-by: Bo Chen <box.c.chen@intel.com>
2021-02-11 11:06:33 +01:00
Viacheslav Ovsiienko
b8ee0a16cb doc: fix mark action zero value in mlx5 guide
The zero value in flow MARK action is reported in Rx datapath
as tagged with zero FDIR ID. Once packet is marked in flow engine
it will be always reported as tagged. For metadata only the zero
value means there is "no metadata" in the packet and the metadata
flag is not set for the case.

Fixes: 3ceeed9f78 ("doc: update flow mark action in mlx5 guide")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-02-10 22:27:03 +01:00
Haiyue Wang
9a40edb599 net/ixgbe: fix UDP zero checksum on x86
There is an 82599 errata that UDP frames with a zero checksum are
incorrectly marked as checksum invalid by the hardware.  This was
leading to misleading PKT_RX_L4_CKSUM_BAD flag.

This patch changes the bad UDP checksum to PKT_RX_L4_CKSUM_UNKNOWN,
so the software application will then have to recompute the checksum
itself if needed.

Bugzilla ID: 629
Fixes: af75078fec ("first public release")
Cc: stable@dpdk.org

Reported-by: Paolo Valerio <pvalerio@redhat.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Tested-by: Paolo Valerio <pvalerio@redhat.com>
2021-02-10 21:49:00 +01:00
Bruce Richardson
0d32fd0945 telemetry: mark init function as internal-only
The "rte_telemetry_init()" function is for use by "rte_eal_init()" and
should not be part of the public API. Mark it as internal only.

Fixes: 6dd571fd07 ("telemetry: introduce new functionality")
Cc: stable@dpdk.org

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-02-09 13:36:45 +01:00
Ciara Power
96b32dc7d2 doc: fix crypto perf script guide
The guide for using the crypto perf graphing script had some incorrect
indentation, unnecessary blank lines, and a missing argument in one of
the usage examples. These are corrected in this patch.

Fixes: f400e0b82b ("app/crypto-perf: add script to graph perf results")

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com>
2021-02-04 19:21:27 +01:00
Ciara Power
7b284a5f8d doc: add crypto perf script in release notes
Add release note for the new crypto perf graphing script.

Fixes: f400e0b82b ("app/crypto-perf: add script to graph perf results")

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com>
2021-02-04 19:21:13 +01:00
Viacheslav Ovsiienko
5f5b0ac904 doc: fix supported feature table in mlx5 guide
This sets the correct minimal requirements for these features:

- Buffer Split offload is supported/verified on ConnectX-5
- Tx scheduling requires ConnectX-6DX and depends on firmware version

Fixes: cb7b0c24c8 ("doc: update hardware offloads support in mlx5 guide")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Asaf Penso <asafp@nvidia.com>
2021-02-04 18:19:37 +01:00
Alexander Kozyrev
fdc44cdc78 net/mlx5: fix miniCQE configuration for Verbs
Verbs cannot be used to configure newly introduced miniCQE formats for
Flow Tag and L3/L4 Header compression. Support for these formats has
been added to the DevX configuration only. And the RX queue descriptor
has been updated with the CQE compression format information only as
well. But the datapath relies on this info no matter which method is
used for Rx queues configuration. Set proper CQE compression format
information in the Verbs configuration to fix the miniCQE parsing logic.

Fixes: 54c2d46b16 ("net/mlx5: support flow tag and packet header miniCQEs")
Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-02-04 18:19:36 +01:00
Xiaoyu Min
db5866c870 doc: group mlx5 shared actions
Put all supported shared actions in one new table

Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
Reviewed-by: Asaf Penso <asafp@nvidia.com>
2021-02-04 15:38:37 +01:00
Xiaoyu Min
71b09bd950 doc: add more explanation about flow shared action
Added more information of shared action on
how to update, query, and the benefits.

Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Reviewed-by: Asaf Penso <asafp@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-02-04 15:38:36 +01:00
Pallavi Kadam
1b0801390b doc: update i40e Windows support
Add documentation to support i40e PMD on Windows.
Update the release notes and features list for the same.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-02-04 15:38:32 +01:00
Lijun Ou
a951fbbe91 doc: fix product link in hns3 guide
Here fixes the Kunpeng introduction address link with hns3.rst

Fixes: 565829db8b ("net/hns3: add build and doc infrastructure")
Cc: stable@dpdk.org

Signed-off-by: Lijun Ou <oulijun@huawei.com>
2021-02-03 10:42:11 +01:00
Lijun Ou
a3e9010d97 doc: update release notes for hns3
Add TM(Traffic Management) feature with hns3 in release notes.
It includes:
1. configure port's peak rate with PF
2. configure TC's peak rate with PF

Fixes: c09c7847d8 ("net/hns3: support traffic management")
Cc: stable@dpdk.org

Signed-off-by: Lijun Ou <oulijun@huawei.com>
2021-02-03 10:42:11 +01:00
Min Hu (Connor)
fa5dbd825a doc: add FEC to NIC features
Document FEC in NIC features, add information about FEC and add
implementation related support.

Fixes: b7ccfb09da ("ethdev: introduce FEC API")
Fixes: 9bf2ea8dbc ("net/hns3: support FEC")
Fixes: 62aafe0358 ("net/cxgbe: support configuring link FEC")
Cc: stable@dpdk.org

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-02-03 10:42:11 +01:00
Lingyu Liu
ffc7bc7c36 doc: add mirror rule limitation of X722
Currently, X722 firmware doesn't support to add more than
one mirror rule in one VSI.

Signed-off-by: Lingyu Liu <lingyu.liu@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2021-02-03 00:48:11 +01:00
Andrew Boyer
5611763610 net/ionic: clean up Tx queue version support
The ionic PMD only supports Tx queue version 1 or greater.
Version 1 introduced a new SGL format with support for more
fragments per descriptor.

Add release notes and an explanation to the docs.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
2021-02-03 00:48:11 +01:00
Bernard Iremonger
836cdce488 doc: fix QinQ flow rules in testpmd guide
In the Testpmd Flow rules management section, correct
the TPID values in the Sample QinQ flow rules sub section.
Also replace the keyword qinq_strip with extend in the
vlan set command.

Fixes: bef3bfe7d5 ("doc: revise sample testpmd flow commands")
Cc: stable@dpdk.org

Signed-off-by: Bernard Iremonger <bernard.iremonger@intel.com>
Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
2021-02-03 00:48:11 +01:00
Nalla Pradeep
e73b6899e1 net/octeontx_ep: add device info get and configure
Add device information get and device configure operations.

Signed-off-by: Nalla Pradeep <pnalla@marvell.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-29 18:16:12 +01:00
Nalla Pradeep
c9b0c48736 net/octeontx_ep: add build and doc infrastructure
Adding bare minimum PMD library and doc build infrastructure
and claim the maintainership for octeontx end point PMD.

Signed-off-by: Nalla Pradeep <pnalla@marvell.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-29 18:16:12 +01:00
Igor Russkikh
6c02043e99 app/testpmd: support sending cloned packets in flowgen
When testing high performance numbers, it is often that CPU performance
limits the max values device can reach (both in pps and in gbps)

Here instead of recreating each packet separately, we use clones counter
to resend the same mbuf to the line multiple times.

PMDs handle that transparently due to reference counting inside of mbuf.

Reaching max PPS on small packet sizes helps here:
Some data from our 2 port x 50G device. Using 2*6 tx queues, 64b packets,
PowerEdge R7525, AMD EPYC 7452:

./build/app/dpdk-testpmd -l 32-63  -- --forward-mode=flowgen \
  --rxq=6 --txq=6  --disable-crc-strip --burst=512 \
  --flowgen-clones=0 --txd=4096 --stats-period=1 --txpkts=64

Gives ~46MPPS TX output:

  Tx-pps:     22926849          Tx-bps:  11738590176
  Tx-pps:     23642629          Tx-bps:  12105024112

Setting flowgen-clones to 512 pushes TX almost to our device
physical limit (68MPPS) using same 2*6 queues(cores):

  Tx-pps:     34357556          Tx-bps:  17591073696
  Tx-pps:     34353211          Tx-bps:  17588802640

Doing similar measurements per core, I see one core can do
6.9MPPS (without clones) vs 11MPPS (with clones)

Verified on Marvell qede and atlantic PMDs.

Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-29 18:16:12 +01:00
Alexander Kozyrev
641dbe4fb0 net/mlx5: support modify field flow action
Add support for new MODIFY_FIELD action to the Mellanox PMD.
This is the generic API that allows to manipulate any packet
header field by copying data from another packet field or
mark, metadata, tag, or immediate value (or pointer to it).

Since the API is generic and covers a lot of action under its
umbrella it makes sense to implement all the mechanics gradually
in order to move to this API for any packet field manipulations
in the future. This is the first step of RTE flows consolidation.

The modify field RTE flow action supports three operations: set,
add and sub. This patch brings to live only the "set" operation.
Support is provided for any packet header field as well as
meta/tag/mark and immediate value can be used as a source.

There are few limitations for this first version of API support:
- encapsulation levels are not supported, just outermost header
can be manipulated for now.
- offsets can only be 4-bytes aligned: 32, 64 and 96 for IPv6.
- the special ITEM_START ID is not supported as we do not allow
to cross packet header field boundaries yet.

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-29 18:16:11 +01:00
Dana Vardi
4b86050aab net/mvpp2: add fill buffs to configuration file
Extend config file with 'fill_bpool_buffs'
which control the amount of refill buffers

Signed-off-by: Dana Vardi <danat@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
2021-01-29 18:16:11 +01:00
Dana Vardi
ef08031fc1 net/mvpp2: support forwarding bad packets
Extend the config file with option to forward packets
that were marked as "l2 bad pkts".
By default the driver drop those packets

Signed-off-by: Dana Vardi <danat@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
2021-01-29 18:16:11 +01:00
Dana Vardi
21aa25e033 net/mvpp2: support custom header in config file
Extend 'start_hdr' options with custom header.

Signed-off-by: Dana Vardi <danat@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
2021-01-29 18:16:11 +01:00
Dana Vardi
6000b5be6a net/mvpp2: update start header name in config file
Change 'dsa_mode' to 'start_hdr' in config file

Signed-off-by: Dana Vardi <danat@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
2021-01-29 18:16:11 +01:00
Liron Himi
3e09b2a7dc net/mvpp2: support user defined configuration
Extend the config file with 'udf' (user-defined) settings

Signed-off-by: Liron Himi <lironh@marvell.com>
2021-01-29 18:16:11 +01:00
Liron Himi
e0ae4cf6a4 net/mvpp2: support generic flow pattern combinations
Currently only specific pattern combinations are supported.
This makes it hard to support additional pattern.
In addition there is no a real limitation that prevent any combination.
This patch iterate the input patterns and convert them to a mvpp2 API.

The doc doesn't describes those limitation so
just update the action list

Signed-off-by: Liron Himi <lironh@marvell.com>
2021-01-29 18:16:11 +01:00
Liron Himi
c2b5ae61c0 net/mvpp2: support DSA mode
Extend the config file with 'dsa-mode' field.
Currently 'eth' (default) and 'dsa' headers are supported.

Signed-off-by: Liron Himi <lironh@marvell.com>
2021-01-29 18:16:11 +01:00
Viacheslav Ovsiienko
1d89c40453 net/mlx5: support mbuf fast free offload
This patch adds support of the mbuf fast free offload to the
transmit datapath. This offload allows freeing the mbufs on
transmit completion in the most efficient way. It requires
the all mbufs were allocated from the same pool, have
the reference counter value as 1, and have no any externally
attached buffers.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-29 18:16:08 +01:00
Hemant Agrawal
d810252857 ethdev: add MPLS RSS offload type
This patch defines new RSS offload types for MPLS. The distribution
will on the basis of MPLS tag.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-29 18:16:08 +01:00
Viacheslav Ovsiienko
3ceeed9f78 doc: update flow mark action in mlx5 guide
There some limitations added for the MARK action value range.

Fixes: 2d241515eb ("net/mlx5: add devarg for extensive metadata support")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-29 18:16:08 +01:00
Dong Zhou
5f8ae44dd4 net/mlx5: enlarge maximal flow priority
Currently, the maximal flow priority in non-root table to user
is 4, it's not enough for user to do some flow match by priority,
such as LPM, for one IPV4 address, we need 32 priorities for each
bit of 32 mask length.

PMD will manage 3 sub-priorities per user priority according to L2,
L3 and L4. The internal priority is 16 bits, user can use priorities
from 0 - 21843.

Those enlarged flow priorities are only used for ingress or egress
flow groups greater than 0 and for any transfer flow group.

Signed-off-by: Dong Zhou <dongzhou@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-29 18:16:07 +01:00
Jiawei Wang
07627fbf15 net/mlx5: support E-Switch mirroring with modify action
While there's the modify action and sample action with ratio=1
in the E-Switch flow, and modify action is after the sample
action, means that the modify should only impact on after sample.
MLX5 PMD will monitor the above case and split the E-Switch flow
into two sub flows, similar as sample flow did before:

 - the prefix sub flow with all actions preceding the sample and the
   sample action itself, also append the new jump action after sample
   in the prefix sub flow;
 - the suffix sub flow with the modify action and other actions
   following the sample action.

The flow split as below:

Original flow: items / actions pre / sample / modify / actions sfx
    prefix sub flow -
    items / actions pre / set_tag action / sample / jump
    suffix sub flow -
    tag_item / modify / actions sfx

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-29 18:16:07 +01:00
Jiawei Wang
6a951567c1 net/mlx5: support E-Switch mirroring and jump in one flow
mlx5 E-Switch mirroring is implemented as multiple destination array in
one steering table. The array currently supports only port ID as
destination actions.

This patch adds the jump action support to the array as one of
destination.
The packets can be mirrored to the port and jump to the next table in
the same destination array allowing to continue handling in the new
table.

For example:
    set sample_actions 0 port_id id 1 / end
    flow create 0 ingress transfer pattern eth / end actions
    sample ratio 1 index 0 / jump group 1 / end
    flow create 1 ingress transfer group 1 pattern eth / end actions
    set_mac_dst mac_addr 00:aa:bb:cc:dd:ee / port_id id 2 / end

The flow results all the matched ingress packets are mirrored
to port id 1 and go to group 1. In the group 1, packets are modified
with the destination mac and sent to port id 2.

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-29 18:16:07 +01:00
Yuying Zhang
72592ea624 doc: update release notes for iavf
Add iavf PMD new feature in release notes.

Fixes: 61abc5f611 ("net/iavf: support TCP/UDP flow item without input set")

Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-29 18:16:07 +01:00
Jeff Guo
de429906dc net/ice: enable eCPRI tunnel port configure in DCF
Add eCPRI tunnel port add and rm ops to configure eCPRI UDP tunnel port
in "Device Config Function" (DCF).

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-29 18:16:07 +01:00
Bruce Richardson
b38480dc4e devtools: remove check-includes script
The check-includes script allowed checking header files in a given
directory to ensure that each header compiled alone without requiring
any other header inclusions.

With header checking now being done by the chkincs app in the build
system this script can be removed.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-01-29 20:59:37 +01:00
Bruce Richardson
05050ac4ce build: add header includes check
To verify that all DPDK headers are ok for inclusion directly in a C file,
and are not missing any other pre-requisite headers, we can auto-generate
for each header an empty C file that includes that header. Compiling these
files will throw errors if any header has unmet dependencies.

For some libraries, there may be some header files which are not for direct
inclusion, but rather are to be included via other header files. To allow
later checking of these files for missing includes, we separate out the
indirect include files from the direct ones.

To ensure ongoing compliance, we enable this build test as part of the
default x86 build in "test-meson-builds.sh".

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-01-29 20:59:37 +01:00
Bruce Richardson
2518704288 eventdev: make driver-only headers private
The rte_eventdev_pmd*.h files are for drivers only and should be private
to DPDK, and not installed for app use.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-01-29 20:59:09 +01:00
Bruce Richardson
df96fd0d73 ethdev: make driver-only headers private
The rte_ethdev_driver.h, rte_ethdev_vdev.h and rte_ethdev_pci.h files are
for drivers only and should be a private to DPDK and not installed.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Steven Webster <steven.webster@windriver.com>
2021-01-29 20:59:09 +01:00
Matan Azrad
384bac8d65 compress/mlx5: add supported capabilities
Add all the capabilities supported by the device.

Add the driver documentations.

Signed-off-by: Matan Azrad <matan@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-27 20:40:03 +01:00
Ciara Power
f400e0b82b app/crypto-perf: add script to graph perf results
The python script introduced in this patch runs the crypto performance
test application for various test cases, and graphs the results.

Test cases are defined in config JSON files, this is where parameters
are specified for each test. Currently there are various test cases for
devices crypto_qat, crypto_aesni_mb and crypto_gcm. Tests for the
ptest types Throughput and Latency are supported for each.

The results of each test case are graphed and saved in PDFs (one PDF for
each test suite graph type, with all test cases).
The graphs output include various grouped barcharts for throughput
tests, and histogram and boxplot graphs are used for latency tests.

Documentation is added to outline the configuration and usage for the
script.

Usage:
A JSON config file must be specified when running the script,
	"./dpdk-graph-crypto-perf <config_file>"

The script uses the installed app by default (from ninja install).
Alternatively we can pass path to app by
	"-f <rel_path>/<build_dir>/app/dpdk-test-crypto-perf"

All device test suites are run by default.
Alternatively we can specify by adding arguments,
	"-t latency" - to run latency test suite only
	"-t throughput latency"
		- to run both throughput and latency test suites

A directory can be specified for all output files,
or the script directory is used by default.
	"-o <output_dir>"

To see the output from the dpdk-test-crypto-perf app,
use the verbose option "-v".

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com>
2021-01-27 19:03:52 +01:00
Feifei Wang
3d15913432 examples/eventdev: check CPU core enabling
In the case that the cores are isolated, if "-l" or "-c" parameter is not
added, the cores will not be enabled and can not launch worker function
correctly. In the meanwhile, no error information is reported.

For example:
totally CPUs:16
isolated CPUs:1-8
command: sudo gdb -args ./dpdk-eventdev_pipeline --vdev event_sw0 \
        -- -r1 -t1 -e4 -w F00 -s4 -n0 -c32 -W1000 -D

cores information:
rte_config->lcore_role = {ROLE_RTE, ROLE_OFF, ROLE_OFF, ROLE_OFF,
                          ROLE_OFF, ROLE_OFF, ROLE_OFF, ROLE_OFF,
                          ROLE_OFF, ROLE_RTE, ROLE_RTE, ROLE_RTE,
                          ROLE_RTE, ROLE_RTE, ROLE_RTE, ROLE_RTE}

output information:
...
[main()] lcore 9 executing worker, using eventdev port 0
[main()] lcore 10 executing worker, using eventdev port 1
[main()] lcore 11 executing worker, using eventdev port 2

This is because "RTE_LCORE_FOREACH_WORKER" chooses the enabled core. In
the case that the cores are isolated, "the lcore_role" flag of isolated
cores are set as "ROLE_OFF" by default(not enabled). So if we choose
these isolated cores as workers, "RTE_LCORE_FOREACH_WORKER" will ignore
these cores and not launch worker functions on them.

To fix this, add "-l" parameters to doc and add lcore enabled check.

Fixes: 1094ca9668 ("doc: add SW eventdev pipeline to sample app guide")
Cc: stable@dpdk.org

Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-01-26 13:30:13 +01:00
Liang Ma
26fe454ec0 examples/l3fwd-power: add ethdev power management
Add PMD power management feature support to l3fwd-power sample app.

Signed-off-by: Liang Ma <liang.j.ma@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: David Hunt <david.hunt@intel.com>
2021-01-29 15:29:48 +01:00
Liang Ma
682a645438 power: add ethdev power management
Add a simple on/off switch that will enable saving power when no
packets are arriving. It is based on counting the number of empty
polls and, when the number reaches a certain threshold, entering an
architecture-defined optimized power state that will either wait
until a TSC timestamp expires, or when packets arrive.

This API mandates a core-to-single-queue mapping (that is, multiple
queued per device are supported, but they have to be polled on different
cores).

This design is using PMD RX callbacks.

1. UMWAIT/UMONITOR:

   When a certain threshold of empty polls is reached, the core will go
   into a power optimized sleep while waiting on an address of next RX
   descriptor to be written to.

2. TPAUSE/Pause instruction

   This method uses the pause (or TPAUSE, if available) instruction to
   avoid busy polling.

3. Frequency scaling
   Reuse existing DPDK power library to scale up/down core frequency
   depending on traffic volume.

Signed-off-by: Liang Ma <liang.j.ma@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: David Hunt <david.hunt@intel.com>
2021-01-29 15:29:48 +01:00
Dong Zhou
6a2cf58a04 app/flow-perf: support meter action
Currently, test-flow-perf app cannot generate flows with meter action.
This patch introduces new parameter "--meter" to generate flows
with meter action.

Signed-off-by: Dong Zhou <dongzhou@nvidia.com>
Reviewed-by: Wisam Jaddo <wisamm@nvidia.com>
Reviewed-by: Alexander Kozyrev <akozyrev@nvidia.com>
2021-01-26 18:39:37 +01:00
Thomas Monjalon
3be167dbf0 doc: fix build
When removing the label "arm_cross_build_getting_the_prerequisite_library"
in the rework of cross_build_dpdk_for_arm64.rst,
the reference to this section got broken.
It went unnoticed because "ninja -C doc" does not regenerate the file
which is referencing the changed file.

The fix is a reword not mentioning the "not so relevant" example
from cross_build_dpdk_for_arm64.rst.

Fixes: eb0e12c0c2 ("doc: add clang to aarch64 cross build guide")

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-01-26 16:41:51 +01:00
Juraj Linkeš
eb0e12c0c2 doc: add clang to aarch64 cross build guide
Reorganize and update the aarch64 cross guide with clang cross
compilation. Update the GNU toolchain version which clang also uses.
Reorganize into common part, GNU part and clang part.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-01-26 12:43:57 +01:00
Dmitry Kozlyuk
f0f93a7adf buildtools: use Python pmdinfogen
Use the same interpreter to run pmdinfogen as for other build scripts.
Adjust wrapper script accordingly and also don't suppress stderr from ar
and pmdinfogen. Add configure-time check for elftools Python module for
Unix hosts.

Add pyelftools to CI configuration and build requirements for Linux and
FreeBSD. Windows targets are not currently using pmdinfogen.

Suppress ABI warnings about generated PMD information strings.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
Tested-by: Jie Zhou <jizh@microsoft.com>
2021-01-25 23:23:41 +01:00
Thomas Monjalon
04ed01f1f6 doc: simplify OS support in features matrix
The networking drivers features matrix had rows to show
OS and kernel modules support:
	- BSD nic_uio
	- Linux UIO
	- Linux VFIO
	- Other kdrv
	- Windows

The kernel modules details are removed to keep only OS support:
	- FreeBSD
	- Linux
	- Windows

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-21 14:53:16 +01:00
Bruce Richardson
762bfccc8a config: remove compatibility build defines
As announced in the deprecation note, remove all compatibility build
defines from previous make/meson versions and use only the standardized
ones - RTE_LIB_<name> for libraries, and RTE_<CLASS>_<NAME> for drivers.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-01-20 01:43:25 +01:00
Beilei Xing
9baf3ecf52 doc: add known issue with RSS in ixgbe guide
Currently, IXGBE doesn't support RSS when double VLAN
is enabled due to FW limitation.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
2021-01-19 18:30:00 +01:00
Junfeng Guo
bb3386f348 net/ice: enable QinQ filter for switch
Enable the double VLAN support for switch QinQ filtering.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-19 13:49:41 +01:00
Jiawei Wang
bd49d1d343 net/mlx5: handle RSS action in sample
PMD validates the rss action in the sample sub-actions list,
then translates into rdma-core action and it will be used for sample
path destination.

If the RSS action is in both sample sub-actions list and original flow,
the rss level and rss type in the sample sub-actions list should be
consistent with the original flow list, since the expanding items
for RSS should be the same for both actions.

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-19 13:49:41 +01:00
Alexander Kozyrev
73b68f4c54 ethdev: introduce generic modify flow action
Implement the generic modify flow API to allow manipulations on
an arbitrary header field (as well as mark, metadata or tag) using
data from another field or a user-specified value.
This generic modify mechanism removes the necessity to implement
a separate RTE Flow action every time we need to modify a new packet
field in the future.

Supported operation are:
- set: copy data from source to destination.
- add: integer addition, stores the result in destination.
- sub: integer subtraction, stores the result in destination.

The field ID is used to specify the desired source/destination packet
field in order to simplify the API for various encapsulation models.
Specifying the packet field ID with the needed encapsulation level
is able to quickly get a packet field for any inner packet header.

Alternatively, the special ID (ITEM_START) can be used to point to
the very beginning of a packet. This ID in conjunction with the
offset parameter provides great flexibility to copy/modify any part of
a packet as needed.

The number of bits to use from a source as well as the offset can be
be specified to allow a partial copy or dividing a big packet field
into multiple small fields (e.g. copying 128 bits of IPv6 to 4 tags).

An immediate value (or a pointer to it) can be specified instead of the
level and the offset for the special FIELD_VALUE ID (or FIELD_POINTER).
Can be used as a source only.

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-01-19 03:30:32 +01:00
Hyong Youb Kim
8b428cb5a9 net/enic: use 64B completion queue entries if available
Latest VIC adapters support 64B CQ (completion queue) entries as well
as 16B entries available on all VIC models. 64B entries can greatly
reduce cache contention (CPU stall cycles) between DMA writes (Rx
packet descriptors) and polling CPU. The effect is very noticeable on
Intel platforms with DDIO. As most UCS servers are based on Intel
platforms, enable and use 64B CQ entries by default, if
available. Also, add devarg 'cq64' so the user can explicitly disable
64B CQ.

Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
2021-01-19 03:30:32 +01:00
Shiri Kuzin
e440d6cf58 net/mlx5: add GENEVE TLV option flow translation
The GENEVE TLV option matching flows must be created
using a translation function.

This function checks whether we already created a Devx
object for the matching and either creates the objects
or updates the reference counter.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-19 03:30:16 +01:00
Viacheslav Ovsiienko
55c074f3ba app/testpmd: support GENEVE option item
The patch adds the GENEVE option rte flow item support to
command line interpreter. The flow command with GENEVE
option items looks like:

  flow create 0 ingress pattern eth / ipv4 / udp / geneve vni is 100 /
       geneve-opt class is 99 length is 1 type is 0 data is 0x669988 /
       end actions drop / end

The option length should be specified in 32-bit words, this
value specifies the length of the data pattern/mask arrays (should be
multiplied by sizeof(uint32_t) to be expressed in bytes. If match
on the length itself is not needed the mask should be set to zero, in
this case length is used to specify the pattern/mask array lengths only.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
2021-01-19 03:30:15 +01:00
Shiri Kuzin
2b4c72b4d1 ethdev: introduce GENEVE header TLV option item
The Geneve tunneling protocol is designed to allow the
user to specify some data context on the packet.
The GENEVE TLV (Type-Length-Variable) Option
is the mean intended to present the user data.

In order to support GENEVE TLV Option the new rte_flow
item "rte_flow_item_geneve_opt" is added.
The new item contains the values and masks for the
following fields:
-option class
-option type
-length
-data

New item will be added to testpmd to support match and
raw encap/decap actions.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-19 03:30:15 +01:00
Jiawen Wu
68436328b9 doc: update for txgbe
Add txgbe PMD new features in release notes,
update user guide in txgbe.rst for flow API and traffic manager.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-19 03:30:14 +01:00
Karra Satwik
439009e4ef net/cxgbe: remove legacy 16-bit link capabilities
Remove legacy 16-bit link capabilities and always request for the
32-bit link capabilities from firmware.

Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
2021-01-19 03:30:13 +01:00
Jeff Guo
934f36b54e app/testpmd: add UDP tunnel port for eCPRI
Add new UDP tunnel port params for eCPRI configuration, the command
as below:

testpmd> port config 0 udp_tunnel_port add ecpri 6789
testpmd> port config 0 udp_tunnel_port rm ecpri 6789

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-19 03:30:13 +01:00
Shiri Kuzin
06cd4cf63f net/mlx5: add GTP PSC item translation
This patch adds the translation function which
sets the qfi, PDU type.

The next extension header which indicates the following
extension header type is set to 0x85 - a PDU session
container.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-19 03:30:13 +01:00
Leyi Rong
6ada10deac net/i40e: remove devarg use-latest-supported-vec
As eal parameter --force-max-simd-bitwidth is already introduced,
to make it more clear when setting rx/tx function, remove
devarg use-latest-supported-vec support.

Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2021-01-19 03:29:53 +01:00
Hemant Agrawal
83087a92e2 crypto/dpaa2_sec: support AES-CMAC integrity check
This patch adds support for AES_CMAC integrity in non-security mode.
This patch modifies the camm flib to handles the AES CMAC
without conflicting the proto ALG operations. i.e. by creating
another ALG operation routine.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2021-01-19 18:05:45 +01:00
Akhil Goyal
caf84d618d crypto/dpaa2_sec: support AES-XCBC-MAC
This patch add support for AES-XCBC-MAC for following cases
- AES-XCBC-MAC auth only
- AES-CBC/CTR + AES-XCBC-MAC (non-proto)
- AES-CBC/CTR + AES-XCBC-MAC (protocol offload)
- DES-CBC + AES-XCBC-MAC (non-proto)
- 3DES-CBC + AES-XCBC-MAC (non-proto)

Signed-off-by: Barry Cao <barry.cao@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2021-01-19 18:05:45 +01:00
Abhinandan Gujjar
1c3ffb9559 cryptodev: add enqueue and dequeue callbacks
This patch adds APIs to add/remove callback functions on crypto
enqueue/dequeue burst. The callback function will be called for
each burst of crypto ops received/sent on a given crypto device
queue pair.

Signed-off-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2021-01-19 18:05:44 +01:00
Ankur Dwivedi
61baeec468 crypto/octeontx2: support AES-CBC SHA256-128-HMAC
Support for aes-cbc sha256-128-hmac is added in lookaside protocol
mode. The functionality is verified using ipsec-secgw application.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
2021-01-19 18:05:17 +01:00
Ankur Dwivedi
8f685ec2d5 crypto/octeontx2: support AES-CBC SHA1-HMAC
Support for aes-cbc sha1-hmac is added in lookaside protocol
mode. The functionality is verified using ipsec-secgw application.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
2021-01-19 18:05:17 +01:00
Tejasree Kondoj
bab97a3ffb crypto/octeontx2: support CN98xx
CN98xx SoC comes up with two CPT blocks wrt
CN96xx, CN93xx, to achieve higher performance.

Adding support to allocate all LFs of VF with even BDF from CPT0
and all LFs of VF with odd BDF from CPT1.
If LFs are not available in one block then they will be allocated
from alternate block.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-01-19 18:05:17 +01:00
Tejasree Kondoj
5be562bc5b crypto/octeontx2: support IPsec ESN and anti-replay
Adding ESN and anti-replay support for lookaside IPsec.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-01-19 18:05:17 +01:00
David Marchand
ce949484d1 doc: recommend GitHub Actions for CI
Update the contributing guidelines to describe GitHub Actions first and
add a warning about Travis usage.

Fixes: 87009585e2 ("ci: hook to GitHub Actions")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Aaron Conole <aconole@redhat.com>
2021-01-19 13:12:59 +01:00