Commit Graph

1228 Commits

Author SHA1 Message Date
Mark Johnston
c3d326fd44 Define MAXCPU consistently between the kernel and KLDs.
This reverts r177661.  The change is no longer very useful since
out-of-tree KLDs will be built to target SMP kernels anyway.  Moveover
it breaks the KBI in !SMP builds since cpuset_t's layout depends on the
value of MAXCPU, and several kernel interfaces, notably
smp_rendezvous_cpus(), take a cpuset_t as a parameter.

PR:		243711
Reviewed by:	jhb, kib
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D23512
2020-02-05 19:08:21 +00:00
Ed Maste
fc7510aef7 linuxulator: implement sendfile
Submitted by:	Bora Özarslan <borako.ozarslan@gmail.com>
Submitted by:	Yang Wang <2333@outlook.jp>
Reviewed by:	markj
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D19917
2020-02-05 16:53:02 +00:00
Andrew Turner
9bf9b8b93a Print useful debug data on unhandled kernel fault on arm64
When panicing because of an unhandled data abort from the kernel it is
useful to know the register state and faulting address to aid debugging.
Print these registers before calling panic.

Sponsored by:	DARPA, AFRL
2020-02-04 12:33:00 +00:00
Mark Johnston
a83c682b36 Dynamically select LSE-based atomic(9)s on arm64.
Once all CPUs are online, determine if they all support LSE atomics and
set lse_supported to indicate this.  For now the atomic(9)
implementations are still always inlined, though it would be preferable
to create out-of-line functions to avoid text bloat.  This was not done
here since big.little systems exist in which some CPUs implement LSE
while others do not, and ifunc resolution must occur well before this
scenario can be detected.  It does seem unlikely that FreeBSD will
ever run on such platforms, however, so converting atomic(9) to use
ifuncs is probably a good next step.

Add a LSE_ATOMICS arm64 kernel configuration option to unconditionally
select LSE-based atomic(9) implementations when the target system is
known.

Reviewed by:	andrew, kib
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation, Amazon (hardware)
Differential Revision:	https://reviews.freebsd.org/D23325
2020-02-03 18:23:50 +00:00
Mark Johnston
920de6a15f Add LSE-based atomic(9) implementations.
These make use of the cas*, ld* and swp instructions added in ARMv8.1.
Testing shows them to be significantly more performant than LL/SC-based
implementations.

No functional change here since the wrappers still unconditionally
select the _llsc variants.

Reviewed by:	andrew, kib
MFC after:	1 month
Submitted by:	Ali Saidi <alisaidi@amazon.com> (original version)
Differential Revision:	https://reviews.freebsd.org/D23324
2020-02-03 18:23:35 +00:00
Mark Johnston
c1fced6800 Add wrappers for arm64 atomics.
Add a _llsc suffix for the existing LL/SC-based implementations and add
trivial wrappers.  This is in preparation for supporting LSE-based
atomic(9) implementations.

No functional change intended.

Reviewed by:	andrew, kib
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation, Amazon (hardware)
Differential Revision:	https://reviews.freebsd.org/D23323
2020-02-03 18:23:14 +00:00
Mark Johnston
3ad6c736cf Provide a single implementation for each of the arm64 atomic(9) ops.
Parameterize the macros by type width as well as acq/rel semantics.
This makes modifying the implementations much less tedious and
error-prone and makes it easier to support alternate LSE-based
implementations.  No functional change intended.

Reviewed by:	andrew, kib
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation, Amazon (hardware)
Differential Revision:	https://reviews.freebsd.org/D23322
2020-02-03 18:22:59 +00:00
Andrew Turner
59606417c4 Remove the GICv3 ITS irq and replace it with an ID
In r357324 most of the use of gi_irq was moved to gi_lpi. Complete this
with the last few places we need the IRQ value and create gi_id for the
per-device value we need.

MFC after:	2 weeks
Sponsored by:	DARPA, AFRL
2020-02-03 14:38:19 +00:00
Andrew Turner
7877018c2c Use a unique name for the GICv3 ITS vmem
When there are multiple GICv3 ITS devices we don't know which vmem is for
which device. Use device_get_nameunit to get a per-device name.

MFC after:	2 weeks
Sponsored by:	DARPA, AFRL
2020-02-03 13:50:55 +00:00
Andrew Turner
a58fc7cb88 Disable the use of the quantum cache in the GICv3 ITS
This uses UMA to allocate space. It causes issues when there are multiple
ITS devices in the system where interrupts are not allocated from a low
address on some interrupt controllers. Disabling the quantum cache fixes
this on the Neoverse N1 SDP.

MFC after:	2 weeks
Sponsored by:	DARPA, AFRL
2020-02-03 13:47:41 +00:00
Mark Johnston
1c29da0279 Reimplement stack capture of running threads on i386 and amd64.
After r355784 the td_oncpu field is no longer synchronized by the thread
lock, so the stack capture interrupt cannot be delievered precisely.
Fix this using a loop which drops the thread lock and restarts if the
wrong thread was sampled from the stack capture interrupt handler.

Change the implementation to use a regular interrupt instead of an NMI.
Now that we drop the thread lock, there is no advantage to the latter.

Simplify the KPIs.  Remove stack_save_td_running() and add a return
value to stack_save_td().  On platforms that do not support stack
capture of running threads, stack_save_td() returns EOPNOTSUPP.  If the
target thread is running in user mode, stack_save_td() returns EBUSY.

Reviewed by:	kib
Reported by:	mjg, pho
Tested by:	pho
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D23355
2020-01-31 15:43:33 +00:00
Andrew Turner
80ba579b00 Call the MAPTI command earlier in the ITS driver
The GICv3 Software Overview suggests when allocating a new MSI/MSI-X
interrupt we need to call MAPD followed by MAPTI. Unfortunately the code
would place a MOVI command between these. This is invalid as it needs
values set by the MAPTI to be present.

Re-order so we allocate a temporary CPU for the interrupt, then use the
MAPTI command to assign the MSI to it.

MFC after:	2 weeks
Sponsored by:	DARPA, AFRL
2020-01-31 11:33:11 +00:00
Andrew Turner
e93448dd69 Only create one ITS configuration table
When there are multiple ITS devices in the system we would allocate a
configuration table for each, however only one table is needed as all the
ITS devices share this.

Allocate a table only when the global table is unset.

While here fix the type of this to be a pointer to a uint8_t array as the
entries are all 8 bits wide.

MFC after:	2 weeks
Sponsored by:	DARPA, AFRL
2020-01-31 10:30:13 +00:00
Andrew Turner
45951bf0a9 Ignore the SMMUv3 and PMCG interrupt controller in the IORT tables
When mapping MSI/MSI-X interrupts throught he Arm IORT ACPI tables we may
need to ignore an interrupt controller even if it is within the bounds the
entry describes. When the SMMUv3 is not using GSIV (non-MSI/MSI-X)
interrupts we need to read the defined field. The Performance Monitoring
Counter Group always ignores the first table entry.

MFC after:	2 weeks
Sponsored by:	DARPA, AFRL
2020-01-31 09:51:38 +00:00
Andrew Turner
9c7eb5ca62 Shift the ITS processor ID after reading it.
When using the processor ID value we mask off the low and high bits that
should be zero. Unfortunatly we don't shift the ID value so it won't be
affected. Add the shift when reading the ID as this will need to align
with the address based target value.

MFC after:	2 weeks
Sponsored by:	DARPA, AFRL
2020-01-30 18:49:19 +00:00
Ganbold Tsagaankhuu
5e1e7e6192 Enable USB3 support for Rockchip RK3328 SoC.
Reviewed by:	manu
2020-01-29 09:36:59 +00:00
Ganbold Tsagaankhuu
87fcb283c5 Add USB3 related clock definitions for Rockchip RK3328 SoC.
Reviewed by:	manu
2020-01-29 08:46:35 +00:00
Mark Johnston
b6cf94ae07 Print missing ID_AA64PFR{0,1}_EL1 register fields.
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D23213
2020-01-23 16:10:38 +00:00
Mark Johnston
32a1f92f2c arm64: Don't enable interrupts in init_secondary().
Doing so can cause deadlocks or panics during boot, if an interrupt
handler accesses uninitialized per-CPU scheduler structures.  This seems
to occur frequently when running under QEMU or AWS.  The idle threads
are set up to release a spinlock section and enable interrupts in
fork_exit(), so there is no need to enable interrupts earlier.

Reviewed by:	kib
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D23328
2020-01-23 16:07:27 +00:00
Mark Johnston
9ddf3d342b Add relocation handling required for -zifunc-noplt to work on arm64.
Static relocations for the immediate operand of a branch instruction
must be applied.

In a patch which implements LSE-based atomic(9) operations using ifuncs,
-zifunc-noplt reduces system CPU usage during a buildkernel by several
percent.

Also fix elf_reloc_internal() to return an error if symbol lookup fails.

Reviewed by:	andrew
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D17392
2020-01-21 17:45:49 +00:00
Emmanuel Vadot
f70961bf86 rk805: Add a regnode_init method
This method will set the desired voltaged based on values in the DTS.
It will not enable the regulator, this is the job of either a consumer
or regnode_set_constraint SYSINIT if the regulator is boot_on or always_on.

Reviewed by:	mmel
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D23216
2020-01-19 19:56:50 +00:00
Kyle Evans
05d7dd739c sysent targets: further cleanup and deduplication
r355473 vastly improved the readability and cleanliness of these Makefiles.
Every single one of them follows the same pattern and duplicates the exact
same logic.

Now that we have GENERATED/SRCS, split SRCS up into the two parameters we'll
use for ${MAKESYSCALLS} rather than assuming a specific ordering of SRCS and
include a common sysent.mk to handle the rest. This makes it less tedious to
make sweeping changes.

Some default values are provided for GENERATED/SYSENT_*; almost all of these
just use a 'syscalls.master' and 'syscalls.conf' in cwd, and they all use
effectively the same filenames with an arbitrary prefix. Most ABIs will be
able to get away with just setting GENERATED_PREFIX and including
^/sys/conf/sysent.mk, while others only need light additions. kern/Makefile
is the notable exception, as it doesn't take a SYSENT_CONF and the generated
files are spread out between ^/sys/kern and ^/sys/sys, but it otherwise fits
the pattern enough to use the common version.

Reviewed by:	brooks, imp
Nice!:		emaste
Differential Revision:	https://reviews.freebsd.org/D23197
2020-01-18 20:37:45 +00:00
John Baldwin
ffbf0e3ce4 Save and restore floating point registers in get/set_mcontext().
arm64 and riscv were only saving and restoring floating point
registers for sendsig() and sys_sigreturn(), but not for getcontext(),
setcontext(), and swapcontext().

While here, remove an always-false check for uap being NULL from
sys_sigreturn().

Reviewed by:	br, mhorne
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D23218
2020-01-17 19:01:59 +00:00
Emmanuel Vadot
bcd380e88b arm64: rockchip: Add RK3399 PWM driver
Add a driver for the pwm controller in the RK3399 SoC

Submitted by:	bdragon (original version)
Reviewed by:	ganbold (previous version)
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D19046
2020-01-16 21:25:13 +00:00
Emmanuel Vadot
3ee778c15e arm64: rockchip: Add new interface for rk_pinctrl
The gpio controller in rockchips SoC in a child of the pinctrl driver
and cannot control pullups and pulldowns.
Use the new fdt_pinctrl interface for accessing pin capabilities and
setting them.
We can now report that every pins is capable of being IN or OUT function
and PULLUP PULLDOWN.
If the pin isn't in gpio mode no changes will be allowed.

Reviewed by:	ganbold (previous version)
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D22849
2020-01-16 21:21:20 +00:00
Kyle Evans
1171c633fb Set .ORDER for makesyscalls generated files
When either makesyscalls.lua or syscalls.master changes, all of the
${GENERATED} targets are now out-of-date. With make jobs > 1, this means we
will run the makesyscalls script in parallel for the same ABI, generating
the same set of output files.

Prior to r356603 , there is a large window for interlacing output for some
of the generated files that we were generating in-place rather than staging
in a temp dir. After that, we still should't need to run the script more
than once per-ABI as the first invocation should update all of them. Add
.ORDER to do so cleanly.

Reviewed by:	brooks
Discussed with:	sjg
Differential Revision:	https://reviews.freebsd.org/D23099
2020-01-10 18:24:17 +00:00
Andrew Turner
f2792e5e55 Add atomic_testandset/clear on arm64.
These will reportedly be used in future uma changes.

MFC after:	2 weeks
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D23019
2020-01-09 10:26:36 +00:00
Emmanuel Vadot
546652fbe3 rk805: Add regnode_status method
This allow consumers to check if the regulator is enable or not.

Reviewed by:	mmel
Differential Revision:	https://reviews.freebsd.org/D23005
2020-01-08 11:30:03 +00:00
Emmanuel Vadot
d194b63134 rk808: Add min/max for the switch regulators
The two switch regulator are always 3.0V.
Add a special case in get_voltage that if min=max we directly
return the value without calculating it.

Reviewed by:	mmel
Differential Revision:	https://reviews.freebsd.org/D23004
2020-01-08 11:29:22 +00:00
Andrew Turner
1b02a76602 Add more Arm arm64 CPU identification values
- Add all the Cortex-A CPU ID register values I can find.
 - Add the Neoverse-N1 ID regiser value [1]
 - Sort macros by register value.

PR:		243065
Submitted by:	Ali Saidi <alisaidi AT amazon.com> [1]
Sponsored by:	DARPA, AFRL (other than [1])
2020-01-06 20:57:59 +00:00
Pawel Biernacki
a1d7296784 sysctl: mark more nodes as MPSAFE
vm.kvm_size and vm.kvm_free are read only and marked as MPSAFE on i386
already. Mark them as that on amd64 and arm64 too to avoid locking Giant.

Reviewed by:	kib (mentor)
Approved by:	kib (mentor)
Differential Revision:	https://reviews.freebsd.org/D23039
2020-01-06 10:52:13 +00:00
Alan Cox
1c3a241032 When a copy-on-write fault occurs, pmap_enter() is called on to replace the
mapping to the old read-only page with a mapping to the new read-write page.
To destroy the old mapping, pmap_enter() must destroy its page table and PV
entries and invalidate its TLB entry.  This change simply invalidates that
TLB entry a little earlier, specifically, on amd64 and arm64, before the PV
list lock is held.

Reviewed by:	kib, markj
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D23027
2020-01-04 19:50:25 +00:00
Andrew Turner
6d26116baa Add the 8 and 16 bit atomic load/store functions with a barrier on arm64.
Reviewed by:	cem
MFC after:	2 weeks
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D22966
2020-01-03 10:03:36 +00:00
Ian Lepore
fce985b0bd Add the xdma framework and pl330 dma drivers to arm and arm64 lint builds. 2020-01-02 22:26:54 +00:00
Emmanuel Vadot
84e404763f arm64: rockchip: Add a module for rk_spi
The spi node doesn't lives under a simple-bus compatible node so we need
OFWBUS_PNP_INFO instead of SIMPLEBUS_PNP_INFO.
2020-01-02 17:44:41 +00:00
Edward Tomasz Napierala
cc50333011 Add basic getcpu(2) support to linuxulator. The purpose of this
syscall is to query the CPU number and the NUMA domain the calling
thread is currently running on.  The third argument is ignored.
It doesn't do anything regarding scheduling - it's literally
just a way to query the current state, without any guarantees
you won't get rescheduled an opcode later.

This unbreaks Java from CentOS 8
(java-11-openjdk-11.0.5.10-0.el8_0.x86_64).

Reviewed by:	kib
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D22972
2019-12-31 22:01:08 +00:00
Alan Cox
b0a0152ab9 Determine whether the MMU hardware is capable of updating a page table
entry's access flag and dirty state, and enable this feature when it's
available.

Ensure that we don't overlook a dirty state update that is concurrent
with a call to pmap_enter().  (Previously, all dirty state updates would
have occurred with the containing pmap's lock held, so a page table entry's
dirty state could not have changed while pmap_enter() held that same lock.)

Reviewed by:	andrew, markj
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D22907
2019-12-30 20:30:31 +00:00
Pawel Biernacki
54666dffa8 linux(4): implement copy_file_range(2)
copy_file_range(2) is implemented natively since r350315, make it available
for Linux binaries too.

Reviewed by:	kib (mentor), trasz (previous version)
Approved by:	kib (mentor)
Differential Revision:	https://reviews.freebsd.org/D22959
2019-12-30 18:11:06 +00:00
Edward Tomasz Napierala
ee0fe82ee2 Implement Linux syslog(2) syscall; just enough to make Linux dmesg(8)
utility work.

MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D22465
2019-12-29 15:53:55 +00:00
Emmanuel Vadot
6db3672c08 arm64: rockchip: Add driver for the io domain
This driver configure the registers in the GRF according to the value
of the regulators for the platform.
Some IP can run with either 3.0V or 1.8V, if we don't configure them
correctly according to the external voltage used they will not work.
It's only done at boot time for now and might be needed at runtime for
IP like sdmmc.

Reviewed by:	mmel
Tested On:	RockPro64, Firefly-RK3399 (gonzo), AIO-3288 (mmel)
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D22854
2019-12-28 15:30:50 +00:00
Emmanuel Vadot
b68dfe6949 arm64: rockchip: rk808: Add remaining regulators
The RK808 driver was missing the LDO and switch regulators.
Add support for them.

Reviewed by:	mmel
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D22852
2019-12-28 15:28:39 +00:00
Brandon Bergren
7821a820d0 [PowerPC] Implement Secure-PLT jump table processing for ppc32.
Due to clang and LLD's tendency to use a PLT for builtins, and as they
don't have full support for EABI, we sometimes have to deal with a PLT in
.ko files in a clang-built kernel.

As such, augment the in-kernel linker to support jump table processing.

As there is no particular reason to support lazy binding in kernel modules,
only implement Secure-PLT immediate binding.

As part of these changes, add elf_cpu_parse_dynamic() to the MD API of the
in-kernel linker (except on platforms that use raw object files.)

The new function will allow MD code to act on MD tags in _DYNAMIC.

Use this new function in the PowerPC MD code to ensure BSS-PLT modules using
PLT will be rejected during insertion, and to poison the runtime resolver to
ensure we get a clear panic reason if a call is made to the resolver.

Reviewed by:	jhibbits
Differential Revision:	https://reviews.freebsd.org/D22608
2019-12-24 15:56:24 +00:00
Scott Long
757d4fbaa7 Introduce the concept of busdma tag templates. A template can be allocated
off the stack, initialized to default values, and then filled in with
driver-specific values, all without having to worry about the numerous
other fields in the tag. The resulting template is then passed into
busdma and the normal opaque tag object created.  See the man page for
details on how to initialize a template.

Templates do not support tag filters.  Filters have been broken for many
years, and only existed for an ancient make/model of hardware that had a
quirky DMA engine.  Instead of breaking the ABI/API and changing the
arugment signature of bus_dma_tag_create() to remove the filter arguments,
templates allow us to ignore them, and also significantly reduce the
complexity of creating and managing tags.

Reviewed by:	imp, kib
Differential Revision:	https://reviews.freebsd.org/D22906
2019-12-24 14:48:46 +00:00
Alan Cox
7c237b7c3a Correct a mistakenly inverted condition in r355833.
Noticed by:	kib
X-MFC with:	r355833
2019-12-20 20:46:26 +00:00
Andrew Turner
494278bb26 Stop speculation past an eret instruction
On arm64 the eret instruction is used to return from an exception handler.
Some implementations may speculate past this instruction into the next
function. As the user may control many registers in these functions add
a synchronisation barrier sequence after the eret instruction to stop these
CPUs from speculating out of the exception handler.

PR:		242676
Submitted by:	Anthony Steinhauser <asteinhauser@google.com> (previous version)
MFC after:	1 week
2019-12-19 08:52:16 +00:00
Alan Cox
48ef33180a When pmap_enter_{l2,pde}() are called to create a kernel mapping, they are
incrementing (and decrementing) the ref_count on kernel page table pages.
They should not do this.  Kernel page table pages are expected to have a
fixed ref_count.  Address this problem by refactoring pmap_alloc{_l2,pde}()
and their callers.  This also eliminates some duplicated code from the
callers.

Correctly implement PMAP_ENTER_NOREPLACE in pmap_enter_{l2,pde}() on kernel
mappings.

Reduce code duplication by defining a function, pmap_abort_ptp(), for
handling a common error case.

Handle a possible page table page leak in pmap_copy().  Suppose that we are
determining whether to copy a superpage mapping.  If we abort because there
is already a mapping in the destination pmap at the current address, then
simply decrementing the page table page's ref_count is correct, because the
page table page must have a ref_count > 1.  However, if we abort because we
failed to allocate a PV entry, this might be a just allocated page table
page that has a ref_count = 1, so we should call pmap_abort_ptp().

Simplify error handling in pmap_enter_quick_locked().

Reviewed by:	kib, markj (an earlier)
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D22763
2019-12-18 18:21:39 +00:00
Ian Lepore
a856c60bdd Remove unnecessary MODULE_DEPEND() from imx_i2c.c, and also from rk_i2c
where it got copied to.
2019-12-17 17:03:03 +00:00
Emmanuel Vadot
bc188bd4f8 arm64: rockchip: rk_gpio: Fix pin number
The maxpin counter starts at 0, fix one by one error.
This is still not totally correct for some banks in some SoC that have
fewer pins but this will be dealt with in another commit.

MFC after:	3 days
2019-12-17 10:57:31 +00:00
Emmanuel Vadot
3df0c02623 arm64: rockchip: rk_pinctrl: Fix clear bits in SYSCON_MODIFY
r351187 change the SYSCON_WRITE to SYSCON_MODIFY but didn't changed the
mask variable that used to hold the bitmask in the upper 16 bits of the
register that control which bits are changed. So we ended up clearing
bit from the upper 16bits half which are always 0 after a read.
Use the correct bit mask for bits that we want to clear.

MFC after:	3 days
2019-12-17 10:55:28 +00:00
Jeff Roberson
a94ba188c3 Repeat the spinlock_enter/exit pattern from amd64 on other architectures to
fix an assert violation introduced in r355784.  Without this spinlock_exit()
may see owepreempt and switch before reducing the spinlock count.  amd64
had been optimized to do a single critical enter/exit regardless of the
number of spinlocks which avoided the problem and this optimization had
not been applied elsewhere.

Reported by:	emaste
Suggested by:	rlibby
Discussed with:	jhb, rlibby
Tested by:	manu (arm64)
2019-12-16 20:15:04 +00:00
Edward Tomasz Napierala
b5f20658ee Add compat.linux.emul_path, so it can be set to something other
than "/compat/linux".  Useful when you have several compat directories
with different Linux versions and you don't want to clash with files
installed by linux-c7 packages.

Reviewed by:	bcr (manpages)
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D22574
2019-12-16 20:07:04 +00:00
Alan Cox
68ca966558 Apply a small optimization to pmap_remove_l3_range(). Specifically, hoist a
PHYS_TO_VM_PAGE() operation that always returns the same vm_page_t out of
the loop.  (Since arm64 is configured as VM_PHYSSEG_SPARSE, the
implementation of PHYS_TO_VM_PAGE() is more costly than that of
VM_PHYSSEG_DENSE platforms, like amd64.)

MFC after:	1 week
2019-12-15 22:41:57 +00:00
Michal Meloun
dfd1d0fcab Add driver for Rockchip PCIe root complex found in RK3399 SOC.
Unfortunately, there are some limitations:
- memory aperture of his controller is only 16MiB, so it is nearly
  unusable for graphic cards
- every attempt to generate type 1 config cycle always causes trap.
  These config cycles are disabled now and we don't support cards
  with PCIe switch.
- in some cases, attempt to do config cycle to (probably) not-yet ready
  card also causes trap. This cannot be detected at runtime, but it seems
  like very rare issue.

MFC after:	3 weeks
Differential Revision:  https://reviews.freebsd.org/D22724
2019-12-14 14:56:34 +00:00
Edward Tomasz Napierala
cf69fe66d4 Add sync_file_range(2) implementation to linux(4); it's a thin wrapper
over the usual fsync(2).

This silences some warnings when running "apt-get upgrade".

Reviewed by:	brooks, emaste
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D22371
2019-12-14 13:37:17 +00:00
Edward Tomasz Napierala
0cde2b3239 Regen after r355752.
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D22371
2019-12-14 13:32:37 +00:00
Edward Tomasz Napierala
0610f417a4 Fix definitions for linuxulator's sync_file_range(2).
Reviewed by:	brooks, emaste
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D22371
2019-12-14 13:30:43 +00:00
Andrew Turner
65565c9784 Add comments and macros to the tcr_el1 setting code to help understand it.
This code is non-obvious when reading for the first time. To help with
understanding of it add comments explaining what it's doing.

While here use macros from armreg.h rather than magic numbers.

Sponsored by:	DARPA, AFRL
2019-12-12 18:27:54 +00:00
Emmanuel Vadot
e63adc105d arm64: rockchip: rk_pinctrl: Fix parse_bias for RK3399
Only bank 0 and bank 2 are different than other rockchip SoC, fix this.
While here remove some debug printfs that where added in r355648

MFC after:	3 days
X-MFC-With:	r355648
2019-12-12 13:21:43 +00:00
Emmanuel Vadot
064486c05f arm64: rockchip: rk_pinctrl: Add bias parsing based on the SoC type
Not all rockchip have the same value for pullup/pulldown so add a function
per SoC and call the right one to have the proper value.

MFC after:	3 days
2019-12-12 13:02:22 +00:00
Emmanuel Vadot
6fe4e8bdbd arm64: rk3328: Add the *clk_peri_niu clocks
Those clocks are always enable by default and are not really explained
in the TRM but the reason we had them is that they have the periph clock
as a parent and those parent should never be disable which can happen
if we disable all the childs. The current childs are the sd/emmc/sdio clocks
so the board will hang if we disable them.

MFC after:	1 month
2019-12-11 18:39:05 +00:00
Emmanuel Vadot
946c511ee5 arm64: Add explicit devices for dwmmc variant
We used to include the hisi version if soc_hisi_hi6220 was present,
include the altera version if dwmmc_altera was present and include
the rockchip version if soc_rockchip_rk3328 was present.
Now every version have it's own device directive.
The rockchip version isn't named dwmmc_rockchip because all other
rockchip driver are named rk_XXX.

MFC after:	1 month
2019-12-11 18:36:07 +00:00
Mark Johnston
5cff1f4dc3 Introduce vm_page_astate.
This is a 32-bit structure embedded in each vm_page, consisting mostly
of page queue state.  The use of a structure makes it easy to store a
snapshot of a page's queue state in a stack variable and use cmpset
loops to update that state without requiring the page lock.

This change merely adds the structure and updates references to atomic
state fields.  No functional change intended.

Reviewed by:	alc, jeff, kib
Sponsored by:	Netflix, Intel
Differential Revision:	https://reviews.freebsd.org/D22650
2019-12-10 18:14:50 +00:00
John Baldwin
d8010b1175 Copy out aux args after the argument and environment vectors.
Partially revert r354741 and r354754 and go back to allocating a
fixed-size chunk of stack space for the auxiliary vector.  Keep
sv_copyout_auxargs but change it to accept the address at the end of
the environment vector as an input stack address and no longer
allocate room on the stack.  It is now called at the end of
copyout_strings after the argv and environment vectors have been
copied out.

This should fix a regression in r354754 that broke the stack alignment
for newer Linux amd64 binaries (and probably broke Linux arm64 as
well).

Reviewed by:	kib
Tested on:	amd64 (native, linux64 (only linux-base-c7), and i386)
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D22695
2019-12-09 19:17:28 +00:00
Emmanuel Vadot
670f36540d arm64: Use the kenv provided by loader
Otherwise we have an empty kenv a likely cannot boot.

Submitted by:	kevans
MFC after:	1 month
X-MFC-With:	355487
2019-12-09 15:23:05 +00:00
Michal Meloun
5641eda2f3 Add support for booting kernel directly from U-Boot using booti command.
In some cases, like is locked bootstrap or device's inability to boot from
removable media, we cannot use standard boot sequence and is necessary to
boot kernel directly from U-Boot.

Discussed with:	jhibbits
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D13861
2019-12-07 16:14:23 +00:00
Brooks Davis
af796bfa71 sysent: Reduce duplication and improve readability.
Use the power of variable to avoid spelling out source and generated
files too many times.  The previous Makefiles were hard to read, hard to
edit, and badly formatted.

Reviewed by:	kevans, emaste
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D22714
2019-12-06 23:59:23 +00:00
Luiz Otavio O Souza
8cfe2a7ad3 Add the SPI driver for the Marvell Armada 37x0 SoC.
Interrupt based driver, implements SPI mode and clock configuration.

Tested on espressobin and SG-3200.

Sponsored by:	Rubicon Communications, LLC (Netgate)
2019-12-06 12:55:39 +00:00
Alan Cox
1bef4955bc On a context switch, handle the possibility that the old thread was
preempted after an "ic" or "tlbi" instruction but before it performed a
"dsb" instruction.  The "ic" and "tlbi" instructions have unusual
synchronization requirements.  If the old thread migrates to a new
processor, its completion of a "dsb" instruction on that new processor does
not guarantee that the "ic" or "tlbi" instructions performed on the old
processor have completed.

This issue is not restricted to the kernel.  Since locore.S sets the UCI bit
in SCTLR, user-space programs can perform "ic ivau" instructions (as well as
some forms of the "dc" instruction).

Reviewed by:	andrew, kib, markj, mmel
X-MFC with:	r355145
Differential Revision:	https://reviews.freebsd.org/D22622
2019-12-05 19:25:49 +00:00
Luiz Otavio O Souza
8a82d5675d Add the I2C driver for the Armada 37x0.
This controller is a bit tricky as the STOP condition must be indicated in
the last tranferred byte, some devices will not like the repeated start
behavior of this controller.  A proper fix to this issue is in the works.

This driver works in polling mode, can be used early in the boot (required
in some cases).

Tested on espressobin/SG-1100 and the SG-3200.

Obtained from:	pfSense
Sponsored by:	Rubicon Communications, LLC (Netgate)
2019-12-05 00:56:03 +00:00
Warner Losh
f86e60008b Regularize my copyright notice
o Remove All Rights Reserved from my notices
o imp@FreeBSD.org everywhere
o regularize punctiation, eliminate date ranges
o Make sure that it's clear that I don't claim All Rights reserved by listing
  All Rights Reserved on same line as other copyright holders (but not
  me). Other such holders are also listed last where it's clear.
2019-12-04 16:56:11 +00:00
Li-Wen Hsu
0386b6c8a0 Fix arm64 build after r355373
Sponsored by:	The FreeBSD Foundation
2019-12-04 08:21:54 +00:00
John Baldwin
31174518d2 Use uintptr_t instead of register_t * for the stack base.
- Use ustringp for the location of the argv and environment strings
  and allow destp to travel further down the stack for the stackgap
  and auxv regions.
- Update the Linux copyout_strings variants to move destp down the
  stack as was done for the native ABIs in r263349.
- Stop allocating a space for a stack gap in the Linux ABIs.  This
  used to hold translated system call arguments, but hasn't been used
  since r159992.

Reviewed by:	kib
Tested on:	md64 (amd64, i386, linux64), i386 (i386, linux)
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D22501
2019-12-03 23:17:54 +00:00
Emmanuel Vadot
e213223c9b Remove "all rights reserved" from copyright for the file I own.
Some of the files have both me and Jared McNeill and he gave me
permission to remove it from his files too.
2019-12-03 21:00:45 +00:00
Emmanuel Vadot
f141cc31dc arm64: rockchip: rl3399: Remove the ability to put the PLL in normal mode at boot
RK3399 PLLs have three modes :
 - Normal, where they behave normally and their freq is calculated based on
   the registers values.
 - Slow, where the PLL freq is 24Mhz (well, the external oscillator).
 - Deep Slow, used for suspend where the freq is 32Khz.

We used to put every CPU related PLL in normal mode but it can cause problem
if the firmware didn't setup the clocks register correctly.
And even if it did but left the pll in slow or deep slow mode that might be
because the PMIC suppling voltage for the CPU haven't been configured yet
and we cannot do that at this point.
So remove the ability to set PLLs to normal mode at boot to avoid any problems.
2019-12-03 19:18:32 +00:00
Justin Hibbits
750d951f5a revert r354714 "Boot arm64 kernel using booti command from U-boot."
After discussing with mmel@, it was clear this is insufficient to address
all the needs.  mmel@ will commit his original patch, from
https://reviews.freebsd.org/D13861, and the additions needed from r354714
will be made afterward.

Requested by:	mmel
Sponsored by:	Juniper Networks, Inc.
2019-12-02 15:07:06 +00:00
Andrew Turner
ef3e1e13b6 Use the VM_MEMATTR macros to describe the MAIR offsets.
Remove the duplicate macros that defined a subset of the VM_MEMATTR values.
While here use VM_MEMATTR macros when filling in the MAIR register.

Reviewed by:	alc, markj
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D22241
2019-11-29 16:14:32 +00:00
Emmanuel Vadot
19b38c94dc arm64: rockchip: rk3328: Add TSADC clocks
Add the clocks so we can use the rk_tsadc driver to monitor
the cpu temperature.
2019-11-28 20:46:24 +00:00
Emmanuel Vadot
a0cb4996c6 arm64: rockchip: tsadc: Do not free the sysctl context is it wasn't created
MFC after:	3 weeks
X-MFC-With:	r355173
2019-11-28 20:17:03 +00:00
Michal Meloun
6903d37518 Add driver for temperature sensors found in RK32898, RK3328 and RK3399 SoC's.
MFC after:	3 weeks
Reviewed by:	manu
Differential Revision:  https://reviews.freebsd.org/D22442
2019-11-28 17:01:31 +00:00
Alan Cox
7b3c31acbe There is no reason why we need to pin the underlying thread to its current
processor in pmap_invalidate_{all,page,range}().  These functions are using
an instruction that broadcasts the TLB invalidation to every processor, so
even if a thread migrates in the middle of one of these functions every
processor will still perform the required TLB invalidations.

Reviewed by:	andrew, markj
MFC after:	10 days
Differential Revision:	https://reviews.freebsd.org/D22502
2019-11-27 20:33:49 +00:00
Michal Meloun
fa2ec6b439 Finish implementation of RK3299 clocks.
- implement of all but mmc clocks. MMC clocks will be added later by own commit.
- use 'link' clock type for external clocks.
- use macros for initialization of structure's named members.

MFC after:	3 weeks
Reviewed by:	manu
Differential Revision:  https://reviews.freebsd.org/D22441
2019-11-26 17:56:39 +00:00
Kyle Evans
0227a14997 arm64/NOTES: add SOC_BRCM_BCM2838
This should have been done back when it was added, but it was not. It only
really adds an extra entry for memory mapping bits in bcm2835_vcbus.c, so
nothing too extensive yet.
2019-11-23 03:38:26 +00:00
Andrew Turner
68cad68149 Add kcsan_md_unsupported from NetBSD.
It's used to ignore virtual addresses that may have a different physical
address depending on the CPU.

Sponsored by:	DARPA, AFRL
2019-11-21 13:22:23 +00:00
Andrew Turner
849aef496d Port the NetBSD KCSAN runtime to FreeBSD.
Update the NetBSD Kernel Concurrency Sanitizer (KCSAN) runtime to work in
the FreeBSD kernel. It is a useful tool for finding data races between
threads executing on different CPUs.

This can be enabled by enabling KCSAN in the kernel config, or by using the
GENERIC-KCSAN amd64 kernel. It works on amd64 and arm64, however the later
needs a compiler change to allow -fsanitize=thread that KCSAN uses.

Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D22315
2019-11-21 11:22:08 +00:00
Alan Cox
48c22f0eb2 Until every possible root cause for an "invalid ASID" assertion failure is
resolved, assign every pmap a valid ASID when it is first initialized.
2019-11-20 16:32:13 +00:00
Alan Cox
6b71afbf7f Achieve two goals at once: (1) Avoid an unnecessary broadcast TLB
invalidation in reclaim_pv_chunk(). (2) Prevent an "invalid ASID" assertion
failure in reclaim_pv_chunk().  The detailed explanation for this change is
provided by r354792.

X-MFC with:	r354792
2019-11-19 19:05:05 +00:00
Andrew Turner
5008941522 Return 0 from ptrace_set_pc as it now completes successfully.
Sponsored by:	DARPA, AFRL
2019-11-19 13:28:59 +00:00
Andrew Turner
5d1349914a Allow ptrace to set the probram counter on arm64.
Sponsored by:	DARPA, AFRL
2019-11-19 13:25:46 +00:00
Andrew Turner
a2bb7f7a62 Fix the definition of bus_space_read_stream_8 on arm64.
This is currently unused, however will be when the Kernel Concurrency
Sanitizer (KCSAN) is imported from NetBSD.

Sponsored by:	DARPA, AFRL
2019-11-19 10:57:44 +00:00
Kyle Evans
f22a592111 Convert in-tree sysent targets to use new makesyscalls.lua
flua is bootstrapped as part of the build for those on older
versions/revisions that don't yet have flua installed. Once upgraded past
r354833, "make sysent" will again naturally work as expected.

Reviewed by:	brooks
Differential Revision:	https://reviews.freebsd.org/D21894
2019-11-18 23:28:23 +00:00
John Baldwin
03b0d68c72 Check for errors from copyout() and suword*() in sv_copyout_args/strings.
Reviewed by:	brooks, kib
Tested on:	amd64 (amd64, i386, linux64), i386 (i386, linux)
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D22401
2019-11-18 20:07:43 +00:00
Mark Johnston
85e06c728c Set MALLOC_DEBUG_MAXZONES=1 in GENERIC-NODEBUG configurations.
The purpose of this option is to make it easier to track down memory
corruption bugs by reducing the number of malloc(9) types that might
have recently been associated with a given chunk of memory.  However, it
increases fragmentation and is disabled in release kernels.

MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
2019-11-18 20:03:28 +00:00
Mark Johnston
c7181c5ab0 Implement vm.pmap.kernel_maps for arm64.
Reviewed by:	alc
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D22142
2019-11-18 15:37:01 +00:00
Mark Johnston
d2624609e6 Let arm64 pmap_qenter() and pmap_kenter() unconditionally set NX.
As on amd64, there is no need for mappings created by these functions to
be executable.

Reviewed by:	alc, andrew
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D22141
2019-11-18 15:36:46 +00:00
Alan Cox
8a19cf92cf Achieve two goals at once: (1) Avoid an unnecessary broadcast TLB
invalidation in pmap_remove_all(). (2) Prevent an "invalid ASID" assertion
failure in pmap_remove_all().

The architecture definition specifies that the TLB will not cache mappings
that don't have the "AF" bit set, so pmap_remove_all() needn't issue a TLB
invalidation for mappings that don't have the "AF" bit set.

We allocate ASIDs lazily.  Specifically, we don't allocate an ASID for a
pmap until we are activating it.  Now, consider what happens on a fork().
Before we activate the child's pmap, we use pmap_copy() to copy mappings
from the parent's pmap to the child's.  These new mappings have their "AF"
bits cleared.  Suppose that the page daemon decides to reclaim a page that
underlies one of these new mappings.  Previously, the pmap_invalidate_page()
performed by pmap_remove_all() on a mapping in the child's pmap would fail
an assertion because that pmap hasn't yet been assigned an ASID.  However,
we don't need to issue a TLB invalidation for such mappings because they
can't possibly be cached in the TLB.

Reported by:	bob prohaska <fbsd@www.zefox.net>
Reviewed by:	markj
MFC after:	1 week
X-MFC-before:	r354286
Differential Revision:	https://reviews.freebsd.org/D22388
2019-11-17 17:38:53 +00:00
John Baldwin
5caa67fa84 Use a sv_copyout_auxargs hook in the Linux ELF ABIs.
Reviewed by:	emaste
Tested on:	amd64 (linux64 only), i386
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D22356
2019-11-15 23:01:43 +00:00
John Baldwin
e353233118 Add a sv_copyout_auxargs() hook in sysentvec.
Change the FreeBSD ELF ABIs to use this new hook to copyout ELF auxv
instead of doing it in the sv_fixup hook.  In particular, this new
hook allows the stack space to be allocated at the same time the auxv
values are copied out to userland.  This allows us to avoid wasting
space for unused auxv entries as well as not having to recalculate
where the auxv vector is by walking back up over the argv and
environment vectors.

Reviewed by:	brooks, emaste
Tested on:	amd64 (amd64 and i386 binaries), i386, mips, mips64
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D22355
2019-11-15 18:42:13 +00:00
Justin Hibbits
4694d573b4 Boot arm64 kernel using booti command from U-boot.
Summary:
Boot arm64 kernel using booti command from U-boot. booti can relocate initrd
image into higher ram addresses, therefore align the initrd load address to 1GiB
and create VA = PA map for it. Create L2 pagetable entries to copy the initrd
image into KVA.
(parts of the code in https://reviews.freebsd.org/D13861 was referred and used
as appropriate)

Submitted by:	Siddharth Tuli <siddharthtuli_gmail.com>
Reviewed by:	manu
Sponsored by:	Juniper Networks, Inc
Differential Revision: https://reviews.freebsd.org/D22255
2019-11-14 21:58:40 +00:00
Kyle Evans
8a2b184529 arm64: busdma_bounce: fix BUS_DMA_ALLOCNOW for non-paged aligned sizes
For any size that isn't page-aligned, we end up not pre-allocating enough
for a single mapping because we truncate the size instead of rounding up to
make sure the last bit is accounted for, leaving us one page shy of what we
need to fulfill a request.

Differential Revision:	https://reviews.freebsd.org/D22288
2019-11-14 18:38:56 +00:00
Alan Cox
555577b57c Eliminate a redundant pmap_load() from pmap_remove_pages().
There is no reason why the pmap_invalidate_all() in pmap_remove_pages()
must be performed before the final PV list lock release.  Move it past
the lock release.

Eliminate a stale comment from pmap_page_test_mappings().  We implemented
a modified bit in r350004.

MFC after:	1 week
2019-11-10 05:22:01 +00:00
Kyle Evans
b17ad0c649 arm64: add SOC_BRCM_BCM2838, build it in GENERIC
BCM2838/BCM2711 is the Raspberry Pi 4, which we will soon be able to boot
on once some ports bits are worked out.
2019-11-10 01:43:51 +00:00
Michal Meloun
2bd45eb23e Remove explicit declaration of rk_clk_fract_set_freq() function
forgotten in r354556.

MFC after:	3 weeks
MFC with:	r354556
Noticed by:	manu
2019-11-08 19:29:14 +00:00
Michal Meloun
27a109932d Tidy up Rockchip composite clock.
- add support for log2 based dividers
- use proper write mask when writing to divider register

MFC after:	3 weeks
Reviewed by:	manu
Differential Revision:  https://reviews.freebsd.org/D22283
2019-11-08 19:15:50 +00:00
Michal Meloun
c32081614b Enhance Rockchip clocks implementation.
- add support for fractional dividers
- allow to declare fixed and linked clock

MFC after:	3 weeks
Reviewed by:	manu
Differential Revision:  https://reviews.freebsd.org/D22282
2019-11-08 19:13:11 +00:00
Michal Meloun
8b43f3efb3 Cleanup Rockchip clocks implementation.
- style
- unify dprinf defines
- make dprinf's 32-bit compatible
Not a functional change.

MFC after:	3 weeks
Reviewed by:	manu, imp
Differential Revision:  https://reviews.freebsd.org/D22281
2019-11-08 19:03:34 +00:00
Andrew Turner
4ffa494e4f Add more 8 and 16 bit variants of the the atomic(9) functions on arm64.
These are direct copies of the 32 bit functions, adjusted ad needed.
While here fix atomic_fcmpset_16 to use the valid load and store exclusive
instructions.

Sponsored by:	DARPA, AFRL
2019-11-07 17:34:44 +00:00
Emmanuel Vadot
9c3a56d076 regulator: Add regulator_check_voltage function
This function will call the regnode_check_voltage method for a given regulator
and check if the desired voltage in reachable by it.
Also adds a default method that check the std_param and which should be enough
for most regulators and add it as the method for axp* rk805 and fixed regulators.

Reviewed by:	mmel
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D22260
2019-11-06 14:55:24 +00:00
Ed Maste
d4f55cc861 arm64 linuxulator: default to RW stack (no X)
This matches Linux's default arm64 data / stack permissions.

MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
2019-11-04 21:23:30 +00:00
Andrew Turner
d7a3eada0a Move the struct debug_monitor_state out of _KERNEL.
Some userland libraries incude machine/pcb.h and this needs the full
definition of struct debug_monitor_state. To allow this to work move
stuct debug_monitor_state out of the _KERNEL guard.

Sponsored by:	DARPA, AFRL
2019-11-03 22:17:49 +00:00
Alan Cox
50e3ab6bcf Utilize ASIDs to reduce both the direct and indirect costs of context
switching.  The indirect costs being unnecessary TLB misses that are
incurred when ASIDs are not used.  In fact, currently, when we perform a
context switch on one processor, we issue a broadcast TLB invalidation that
flushes the TLB contents on every processor.

Mark all user-space ("ttbr0") page table entries with the non-global flag so
that they are cached in the TLB under their ASID.

Correct an error in pmap_pinit0().  The pointer to the root of the page
table was being initialized to the root of the kernel-space page table
rather than a user-space page table.  However, the root of the page table
that was being cached in process 0's md_l0addr field correctly pointed to a
user-space page table.  As long as ASIDs weren't being used, this was
harmless, except that it led to some unnecessary page table switches in
pmap_switch().  Specifically, other kernel processes besides process 0 would
have their md_l0addr field set to the root of the kernel-space page table,
and so pmap_switch() would actually change page tables when switching
between process 0 and other kernel processes.

Implement a workaround for Cavium erratum 27456 affecting ThunderX machines.
(I would like to thank andrew@ for providing the code to detect the affected
machines.)

Address integer overflow in the definition of TCR_ASID_16.

Setup TCR according to the PARange and ASIDBits fields from
ID_AA64MMFR0_EL1.  Previously, TCR_ASID_16 was unconditionally set.

Modify build_l1_block_pagetable so that lower attributes, such as ATTR_nG,
can be specified as a parameter.

Eliminate some unused code.

Earlier versions were tested to varying degrees by: andrew, emaste, markj

MFC after:	3 weeks
Differential Revision:	https://reviews.freebsd.org/D21922
2019-11-03 17:45:30 +00:00
Andrew Turner
05f39d1a2d Add support for setting hardware breakpoints from ptrace on arm64.
Implement get/fill_dbregs on arm64. This is used by ptrace with the
PT_GETDBREGS and PT_SETDBREGS requests. It allows userspace to set hardware
breakpoints.

The struct dbreg is based on Linux to ease adding hardware breakpoint
support to debuggers.

Reviewed by:	jhb
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D22195
2019-11-03 15:42:08 +00:00
Marcin Wojtas
a3da4fc60b Fix pmap_change_attr() on arm64 to allow KV addresses
Altough in the comment above the pmap_change_attr() it was mentioned
that VA could be in KV or DMAP memory space. However,
pmap_change_attr_locked() was accepting only the values inside the DMAP
memory range.

To fix that, the condition check was changed so also the va inside the
KV memory range would be accepted.

The sample use case that wasn't supported is the PCI Device that has the
BAR which should me mapped with the Write Combine attribute - for
example BAR2 of the ENA network controller on the A1 instances on AWS.

Tested on A1 AWS instance and changed ENA BAR2 mapped resource to be
write-combined memory region.

Differential Revision: https://reviews.freebsd.org/D22055
MFC after: 2 weeks
Submitted by: Michal Krawczyk <mk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Amazon, Inc.
2019-10-31 15:16:10 +00:00
Mark Johnston
abe476d083 Fix a typo in r353895.
Reported by:	andrew
MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
2019-10-31 14:22:54 +00:00
Andrew Turner
077dcd8347 Set the userspace execute never bit on kernel mappings.
Arm64 allows us to create execute only mappings. To make sure userspace is
unable to accidentally execute kernel code set the user execute never
bit in the kernel page tables.

MFC after:	1 week
Sponsored by:	DARPA, AFRL
2019-10-30 17:32:35 +00:00
Justin Hibbits
c7bb190966 ARM64: Treat alignment faults as bus errors
Summary:
ARM64 currently treats all data abort exceptions as page faults.  This
can cause infinite loops on non-page fault faults, such as alignment faults.

Since kernel-side alignment faults should be avoided, this adds support directly
to the el0 fault handler, instead of the data_abort() handler.

Test Plan: Tested on rpi3, with a misaligned ldm test.

Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D22133
2019-10-30 15:30:40 +00:00
Andrew Turner
739e4482b8 Allow exceptions to be masked when in userspace
We may want to mask exceptions when in userspace. This was previously
impossible as threads are created with all exceptions unmasked and
signals expected userspace to mask any. Fix these by copying the
mask state on thread creation and allow exceptions to be masked on
signal return, as long as they don't change.

Sponsored by:	DARPA, AFRL
2019-10-30 14:05:50 +00:00
Andrew Turner
e68508e172 Allow the userspace ID register fields to be read from the kernel
To allow consistent values to be used in both the kernel and userspace
create a function for these to be read from the kernel. They use a newly
created macro with the name of the ID register to read. For now there is
redundant information in the user_regs array as it still holds the CRm and
Op2 values, however this will be fixed in a later change.

This will be used by ptrace to allow hardware breakpoints in userspace.

Sponsored by:	DARPA, AFRL
2019-10-30 13:45:40 +00:00
Andrew Turner
fc232b89ad Use a lowercase name for arm64 special registers so they don't conflict
with macros of the same name.

Sponsored by:	DARPA, AFRL
2019-10-30 12:47:00 +00:00
Andrew Turner
cb5343c278 Move the MRS instruction decode macros to armreg.h
These instructions are used to access the registers described in armreg.h,
and will be used in a future change to create a per-register identification
macro.

Sponsored by:	DARPA, AFRL
2019-10-30 12:33:36 +00:00
Andrew Turner
a5d295e2a7 Update the debug monitor handling to work after userspace has started
The debug monitor register state is now stored in a struct and updated
when required. Currently there is only a kernel state, however a
per-process state will be added in a future change.

Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D22128
2019-10-30 10:51:24 +00:00
Andrew Turner
acd6f4bee7 Use an array of handlers in the data and instruction aborts
Previously we would call data_abort on all data and instruction aborts
however this is incorrect for most abort types. Move to use an array
of function pointers to allow for more handlers to be easily added.

Reviewed by:	jhibbits
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D22170
2019-10-30 10:42:52 +00:00
Andrew Turner
d57791bec2 Add two files missed in r354170
Sponsored by:	DARPA, AFRL
2019-10-30 10:13:14 +00:00
Andrew Turner
44e446a1b3 Rename the macros to extract a single arm64 ID field.
Because of the previous naming scheme the old ID_AA64PFR0_EL1 macro
collided with a potential macro for the register of the same name. To fix
this collision rename these macros.

Sponsored by:	DARPA, AFRL
2019-10-30 10:06:57 +00:00
Emmanuel Vadot
62de73eaf1 arm64: rockchip: typec_phy: Rename timeout to retry
Declare retry in the function scope.
Rename it to retry as there is a timeout function which was
causing to code to compile.

Reported by:	jhibbits
MFC after:	1 month
X-MFC-WITH:	r354089
2019-10-29 18:36:16 +00:00
Oleksandr Tymoshenko
aea1c841f4 arm64: rk3399: add SPI driver and include it in GENERIC config
SPI driver for Rockchip's RK3399 SoC. Implements PIO mode, CS selection,
SPI mode and frequency configuration.

Reviewed by:	manu
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D22148
2019-10-25 21:38:38 +00:00
Oleksandr Tymoshenko
145bad4026 arm64: rk3399: Add clock and gate for SPI clocks
MFC after:	1 month
2019-10-25 21:21:21 +00:00
Peter Jeremy
5dae892735 Fix use of uninitialised variable.
The RK805 regs array was being allocated before it's required size was
known, causing the driver to use memory it didn't own.  That memory
was subsequently allocated and used elsewhere causing later fatal data
aborts in rk805_map().

Whilst I'm here, add a sanity check to catch unsupported PMICs (this
shouldn't ever get hit because the probe should have failed).

Reviewed by:	manu
MFC after:	1 week
Sponsored by:	Google
2019-10-25 19:38:02 +00:00
Emmanuel Vadot
ecd9fdeb46 arm64: rockchip: Add RK3399 TypeC phy driver
This is a driver for the USB3 PHY present in the RK3399.
While the phy support DP (Display Port) the driver doesn't has we have
no driver to test this with for now.
All the lane and pll configuration is just magic values from rockchip.
While the manual have some info on those registers it's really hard to
understand how to calculate those values (if there is a way).

MFC after:	1 month
2019-10-25 18:10:02 +00:00
Emmanuel Vadot
7d888a5b2b arm64: rockchip: Add rk_dwc3 driver
This is a simplebus like driver that attaches the dwc3 child node and
enable the clocks needed for the module.

MFC after:	1 month
2019-10-25 18:08:59 +00:00
Emmanuel Vadot
f5be484b45 arm64: rk3399: Add clock and gate for usb3 clocks
MFC after:	1 month
2019-10-25 18:08:25 +00:00
Andrew Turner
6c1633e18a Remove the arm4 ID register masks, they are not needed after r353641.
Sponsored by:	DARPA, AFRL
2019-10-25 14:46:09 +00:00
Andrew Turner
a3b4443c72 Make special register names lowercase so they don't conflict with future
ID register macros.

MFC after:	2 weeks
Sponsored by:	DARPA, AFRL
2019-10-25 14:30:27 +00:00
Ed Maste
4ad0475f03 arm64: enable options NUMA in GENERIC
As with amd64 NUMA is required for reasonable operation on big-iron
arm64 systems and is expected to have no significant impact on small
systems.  Enable it now for wider testing in advance of FreeBSD 13.0.

You can use the 'vm.ndomains' sysctl to see if multiple domains are in
use - for example (from Cavium/Marvell ThunderX2):

# sysctl vm.ndomains
vm.ndomains: 2

No objection:	manu
Sponsored by:	The FreeBSD Foundation
2019-10-23 19:35:26 +00:00
Andrew Turner
9d0a6b83ca Stop enabling interrupts when reentering kdb on arm64
When we raise a data abort from the kernel we need to enable interrupts,
however we shouldn't be doing this when in the kernel debugger. In this
case interrupts can lead to a further panic as they don't expect to be
run from such a context.

MFC after:	2 weeks
Sponsored by:	DARPA, AFRL
2019-10-23 13:21:15 +00:00
Mark Johnston
86a994d653 Apply r353893 to arm64.
Reported by:	Jenkins (hardware CI lab)
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
2019-10-22 17:22:10 +00:00
Michal Meloun
4b84206b7f Update Armada 8k drivers to cover newly imported DT and latest changes
in simple multifunction driver.
- follow interrupt changes in DT. Split old ICU driver to function oriented
  parts and add drivers for newly defined parts (system error interrupts).
- Many drivers are children of simple multifunction driver. But after r349596
  simple MF driver doesn't longer exports memory resources, and all children
  must use syscon interface to access their registers. Adapt affected
  drivers to this fact.

MFC after:	3 weeks
2019-10-20 10:48:27 +00:00
Yuri Pankov
a161fba992 linux: futex_mtx should follow futex_list
Move futex_mtx to linux_common.ko for amd64 and aarch64 along
with respective list/mutex init/destroy.

PR:		240989
Reported by:	Alex S <iwtcex@gmail.com>
2019-10-18 12:25:33 +00:00
Conrad Meyer
7790c8c199 Split out a more generic debugnet(4) from netdump(4)
Debugnet is a simplistic and specialized panic- or debug-time reliable
datagram transport.  It can drive a single connection at a time and is
currently unidirectional (debug/panic machine transmit to remote server
only).

It is mostly a verbatim code lift from netdump(4).  Netdump(4) remains
the only consumer (until the rest of this patch series lands).

The INET-specific logic has been extracted somewhat more thoroughly than
previously in netdump(4), into debugnet_inet.c.  UDP-layer logic and up, as
much as possible as is protocol-independent, remains in debugnet.c.  The
separation is not perfect and future improvement is welcome.  Supporting
INET6 is a long-term goal.

Much of the diff is "gratuitous" renaming from 'netdump_' or 'nd_' to
'debugnet_' or 'dn_' -- sorry.  I thought keeping the netdump name on the
generic module would be more confusing than the refactoring.

The only functional change here is the mbuf allocation / tracking.  Instead
of initiating solely on netdump-configured interface(s) at dumpon(8)
configuration time, we watch for any debugnet-enabled NIC for link
activation and query it for mbuf parameters at that time.  If they exceed
the existing high-water mark allocation, we re-allocate and track the new
high-water mark.  Otherwise, we leave the pre-panic mbuf allocation alone.
In a future patch in this series, this will allow initiating netdump from
panic ddb(4) without pre-panic configuration.

No other functional change intended.

Reviewed by:	markj (earlier version)
Some discussion with:	emaste, jhb
Objection from:	marius
Differential Revision:	https://reviews.freebsd.org/D21421
2019-10-17 16:23:03 +00:00
Mark Johnston
01cef4caa7 Remove page locking from pmap_mincore().
After r352110 the page lock no longer protects a page's identity, so
there is no purpose in locking the page in pmap_mincore().  Instead,
if vm.mincore_mapped is set to the non-default value of 0, re-lookup
the page after acquiring its object lock, which holds the page's
identity stable.

The change removes the last callers of vm_page_pa_tryrelock(), so
remove it.

Reviewed by:	kib
Sponsored by:	Netflix
Differential Revision:	https://reviews.freebsd.org/D21823
2019-10-16 22:03:27 +00:00
Andrew Turner
e8709d7d42 Use tables to store the information to decode the arm64 ID registers.
Arm updates these with each new architecture revision. To help keep them
updated use a collection of tables to hold the needed information to
decode these registers.

Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D22020
2019-10-16 13:30:28 +00:00
Jeff Roberson
638f867814 (6/6) Convert pmap to expect busy in write related operations now that all
callers hold it.

This simplifies pmap code and removes a dependency on the object lock.

Reviewed by:    kib, markj
Tested by:      pho
Sponsored by:   Netflix, Intel
Differential Revision:	https://reviews.freebsd.org/D21596
2019-10-15 03:51:46 +00:00
Jeff Roberson
205be21d99 (3/6) Add a shared object busy synchronization mechanism that blocks new page
busy acquires while held.

This allows code that would need to acquire and release a very large number
of page busy locks to use the old mechanism where busy is only checked and
not held.  This comes at the cost of false positives but never false
negatives which the single consumer, vm_fault_soft_fast(), handles.

Reviewed by:    kib
Tested by:      pho
Sponsored by:   Netflix, Intel
Differential Revision:	https://reviews.freebsd.org/D21592
2019-10-15 03:41:36 +00:00
Emmanuel Vadot
ce607eeb9d arm64: Add Synopsys DWC3 driver
This add a driver for the Synopsys DWC3 driver found on multiple SoCs.
It only supports host mode for now.

MFC after:	1 month
2019-10-14 22:27:33 +00:00
Emmanuel Vadot
26b0cd3a95 arm64: allwinner: Add aw_dwc3 driver
This is a simplebus like driver that just deal with clocks and resets
and attach the dwc3 child node.

MFC after:	1 month
2019-10-14 22:22:19 +00:00
Emmanuel Vadot
6c4464cb74 arm64: allwinner: Add Allwinner H6 Support
This adds support for H6 SoC.
Add a CCU driver for H6 that support all PLLs and most of the clocks
that we are intersted in for now (i2c, mmc, usb, etc ...)

MFC after:	1 month
2019-10-14 21:53:53 +00:00
Andrew Turner
f4d43d7928 Sort the id_aa64*_fields arrays to be in alphanumerical order.
Sponsored by:	DARPA, AFRL
2019-10-14 09:29:56 +00:00
Justin Hibbits
26517dcf60 gcore: Add aarch64 32-bit core support
Summary: Add trivial 32-bit arm cores on aarch64 support for gcore.  This
doesn't handle fpregs.

Reviewed by:	#arm, andrew
Sponsored by:	Juniper Networks, Inc
Differential Revision:	https://reviews.freebsd.org/D21947
2019-10-11 14:15:50 +00:00
Alan Cox
bc285d6a8f Eliminate an unused declaration. The variable in question is only defined
and used on sparc64.

MFC after:	1 week
2019-10-07 04:22:03 +00:00
Alan Cox
e227f09282 Eliminate a redundant bzero(). The l0 page table page was already zeroed
by efi_1t1_page().

MFC after:	1 week
2019-10-07 03:37:28 +00:00
Emmanuel Vadot
c36e2d14ac arm64: rockchip: usb2phy: Add set/get mode
We only support host mode so those functions are just added so
we won't panic when generic-{e,o}hci will set the phy to host mode.

MFC after:	1 month
X-MFC-With:	r353062
2019-10-05 17:36:33 +00:00