Commit Graph

1316 Commits

Author SHA1 Message Date
Oleksandr Tymoshenko
3a5e117a7b - Move stack tracing function to db_trace.c
- Axe unused extern MipsXXX declarations
- Move all declarations for functions in exceptions.S/swtch.S
    from trap.c to respective headers
2009-10-14 01:43:53 +00:00
Oleksandr Tymoshenko
cb00f8cae5 - Fix CPU divisor mask
Repored by: Luiz Otavio O Souza
2009-10-11 21:28:56 +00:00
Konstantin Belousov
023063938a Define architectural load bases for PIE binaries. Addresses were selected
by looking at the bases used for non-relocatable executables by gnu ld(1),
and adjusting it slightly.

Discussed with:	bz
Reviewed by:	kan
Tested by:	bz (i386, amd64), bsam (linux)
MFC after:	some time
2009-10-10 15:31:24 +00:00
Oleksandr Tymoshenko
b3d484edee - Revert part of r197685 because this change leads to wrong data in cache. 2009-10-05 23:19:51 +00:00
Bjoern A. Zeeb
52bf2041ac Make sure that the primary native brandinfo always gets added
first and the native ia32 compat as middle (before other things).
o(ld)brandinfo as well as third party like linux, kfreebsd, etc.
stays on SI_ORDER_ANY coming last.

The reason for this is only to make sure that even in case we would
overflow the MAX_BRANDS sized array, the native FreeBSD brandinfo
would still be there and the system would be operational.

Reviewed by:	kib
MFC after:	1 month
2009-10-03 11:57:21 +00:00
Oleksandr Tymoshenko
1ee774f614 - MFC 2009-10-02 19:51:03 +00:00
Oleksandr Tymoshenko
1c4059d5ea - Sync caches properly when dealing with sf_buf 2009-10-01 20:05:36 +00:00
Alan Cox
fe105d45a2 Add a new sysctl for reporting all of the supported page sizes.
Reviewed by:	jhb
MFC after:	3 weeks
2009-09-18 17:04:57 +00:00
Warner Losh
97b83d313d Ugly hack to get this to compile. I'm sure there's a better way... 2009-09-09 03:57:10 +00:00
Warner Losh
90d1a51534 First half of making this 64-bit clean: fix prototypes. 2009-09-09 03:54:55 +00:00
Warner Losh
eeebbca3a3 Set the ldscript for malta64 correctly. 2009-09-09 00:50:17 +00:00
Poul-Henning Kamp
a254d1f16d Get rid of the _NO_NAMESPACE_POLLUTION kludge by creating an
architecture specific include file containing the _ALIGN*
stuff which <sys/socket.h> needs.
2009-09-08 20:45:40 +00:00
Oleksandr Tymoshenko
cbd59a4f65 - MFC from head@196987 2009-09-08 19:15:29 +00:00
Oleksandr Tymoshenko
01316fcb76 - Add commented hint required for RouterStation(non PRO) board 2009-09-08 05:24:09 +00:00
Oleksandr Tymoshenko
002c0b94ea - Clean out some XXXMIPS comments that's not relevant now 2009-09-04 19:02:11 +00:00
Sam Leffler
6dbde1f3f9 o enable mesh support
o add bridge support
o no need for explicit ar5212 support; ath_hal drags it in
2009-09-03 23:04:33 +00:00
Oleksandr Tymoshenko
a7420595db - Remove flags accidently brought by dumb cut'n'paste coding 2009-09-03 18:27:55 +00:00
Oleksandr Tymoshenko
d0c60705f1 - Fix phy address calculation 2009-09-03 18:23:23 +00:00
Warner Losh
2004aa74c3 Implement platform_reset. Also, make the code a tiny bit easier to
read with ninja-C magic coupled with an illuminating comment.
2009-08-17 12:23:58 +00:00
Warner Losh
a54c4d8590 suword64 and csuword64. Needed by ELF64 stuff... 2009-08-17 12:14:40 +00:00
Warner Losh
e47ea02f05 (1) Fix a few 32/64-bit bugs.
(2) Also, always allocate 2 pages for the stack to optimize TLB usage.

Submitted by:	neel@ (2)
2009-08-15 22:51:11 +00:00
Warner Losh
bcd2a38933 Various 32/64-bit confusion cleanups. 2009-08-15 22:48:09 +00:00
Warner Losh
fa1d3852f7 (1) Some CPUs have a range to map I/O cyces on the pci bus. So allow
them to work by allowding the nexus to assign ports.
(2) Remove some Octeon junk that shouldn't be necessary.

Submitted by:	neel@ (#1) for SB1 port.
2009-08-15 22:45:46 +00:00
Warner Losh
8a81b70752 First cut at a platform_start. It is likely wrong, but it is better
than nothing :)
2009-08-15 21:42:04 +00:00
Warner Losh
1cc75127dc The UART device infrasturcture wants these defined. Define them just
like we do in Malta.  We may want to look at consolidating things
because *ALL* mips will *ALWAYS* be memory mapped.  The only wrinkle
is that the tag may need to be a custom one (see endian issues with
the Atheros port for one example).
2009-08-15 19:48:14 +00:00
Warner Losh
6d53fe9b81 Use new ldscript.mips.mips64
Also, declare this to be a 64-bit target.

We get to the final link now and die in the linker script..
2009-08-15 04:29:18 +00:00
Warner Losh
232f85fdf4 Include Octeon specific registers since we mess with them here... 2009-08-15 02:03:41 +00:00
Warner Losh
19aa4fea4c Fix style error replicated multiple times. Move to
mips_bus_space_generic for octeon obio impl.
2009-08-15 01:03:13 +00:00
Warner Losh
778355f6c1 (u_int) is the wrong type here. Use unsigned long instead, even
though that's only less wrong...

# This gets the kernel building again to the point it was at before
# the last IFC for the OCTEON1 kernel config.
2009-08-14 16:15:18 +00:00
Warner Losh
323ba97c65 Use unsigned long instead of unsigned for the integer casts here. The
former works for both ILP32 and LP64 programming models, while the
latter fails LP64.

# uintpr_t is better, but iirc, we can't pollute the name space to use it
# I likely need to audit all my uintptr_t changes for that issue...
2009-08-13 19:47:13 +00:00
Attilio Rao
dc6fbf6545 * Completely Remove the option STOP_NMI from the kernel. This option
has proven to have a good effect when entering KDB by using a NMI,
but it completely violates all the good rules about interrupts
disabled while holding a spinlock in other occasions.  This can be the
cause of deadlocks on events where a normal IPI_STOP is expected.
* Adds an new IPI called IPI_STOP_HARD on all the supported architectures.
This IPI is responsible for sending a stop message among CPUs using a
privileged channel when disponible. In other cases it just does match a
normal IPI_STOP.
Right now the IPI_STOP_HARD functionality uses a NMI on ia32 and amd64
architectures, while on the other has a normal IPI_STOP effect. It is
responsibility of maintainers to eventually implement an hard stop
when necessary and possible.
* Use the new IPI facility in order to implement a new userend SMP kernel
function called stop_cpus_hard(). That is specular to stop_cpu() but
it does use the privileged channel for the stopping facility.
* Let KDB use the newly introduced function stop_cpus_hard() and leave
stop_cpus() for all the other cases
* Disable interrupts on CPU0 when starting the process of APs suspension.
* Style cleanup and comments adding

This patch should fix the reboot/shutdown deadlocks many users are
constantly reporting on mailing lists.

Please don't forget to update your config file with the STOP_NMI
option removal

Reviewed by:	jhb
Tested by:	pho, bz, rink
Approved by:	re (kib)
2009-08-13 17:09:45 +00:00
Oleksandr Tymoshenko
5bbfa759e2 - Make i/d cache size field 32-bit to prevent overflow
Submited by: Neelkanth Natu
2009-08-10 01:49:59 +00:00
Oleksandr Tymoshenko
11e9b8bad1 - MFC @196061 2009-08-04 18:22:58 +00:00
Oleksandr Tymoshenko
8f0bf9b807 - Use register_t for registers values 2009-08-04 17:32:55 +00:00
Oleksandr Tymoshenko
143acbd6fe - Make USB part of AR71XX kernel buildable again 2009-07-30 23:54:00 +00:00
Oleksandr Tymoshenko
13a77922c8 - Properly unwind stack for functions with __noreturn__ attribute
Submitted by:	Neelkanth Natu <neelnatu@yahoo.com>
2009-07-30 23:48:29 +00:00
Oleksandr Tymoshenko
1367982697 - mark map as coherent if requested by flags
- explicitly set memory allocation method in map flags instead
    of duplicating conditions for malloc/contigalloc
2009-07-30 23:29:59 +00:00
John Baldwin
013818111a Add a new type of VM object: OBJT_SG. An OBJT_SG object is very similar to
a device pager (OBJT_DEVICE) object in that it uses fictitious pages to
provide aliases to other memory addresses.  The primary difference is that
it uses an sglist(9) to determine the physical addresses for a given offset
into the object instead of invoking the d_mmap() method in a device driver.

Reviewed by:	alc
Approved by:	re (kensmith)
MFC after:	2 weeks
2009-07-24 13:50:29 +00:00
Alan Cox
3153e878dd Add support to the virtual memory system for configuring machine-
dependent memory attributes:

Rename vm_cache_mode_t to vm_memattr_t.  The new name reflects the
fact that there are machine-dependent memory attributes that have
nothing to do with controlling the cache's behavior.

Introduce vm_object_set_memattr() for setting the default memory
attributes that will be given to an object's pages.

Introduce and use pmap_page_{get,set}_memattr() for getting and
setting a page's machine-dependent memory attributes.  Add full
support for these functions on amd64 and i386 and stubs for them on
the other architectures.  The function pmap_page_set_memattr() is also
responsible for any other machine-dependent aspects of changing a
page's memory attributes, such as flushing the cache or updating the
direct map.  The uses include kmem_alloc_contig(), vm_page_alloc(),
and the device pager:

  kmem_alloc_contig() can now be used to allocate kernel memory with
  non-default memory attributes on amd64 and i386.

  vm_page_alloc() and the device pager will set the memory attributes
  for the real or fictitious page according to the object's default
  memory attributes.

Update the various pmap functions on amd64 and i386 that map pages to
incorporate each page's memory attributes in the mapping.

Notes: (1) Inherent to this design are safety features that prevent
the specification of inconsistent memory attributes by different
mappings on amd64 and i386.  In addition, the device pager provides a
warning when a device driver creates a fictitious page with memory
attributes that are inconsistent with the real page that the
fictitious page is an alias for. (2) Storing the machine-dependent
memory attributes for amd64 and i386 as a dedicated "int" in "struct
md_page" represents a compromise between space efficiency and the ease
of MFCing these changes to RELENG_7.

In collaboration with: jhb

Approved by:	re (kib)
2009-07-12 23:31:20 +00:00
Warner Losh
1e0b0febf6 Use PTR_* macros for pointers, and not potentially mips64 unsafe
operations.
2009-07-10 19:09:34 +00:00
Warner Losh
de13b5d0f9 Use PTR_* macros to deal with pointers. 2009-07-10 19:08:48 +00:00
Warner Losh
df92abe375 fix prototype for MipsEmulateBranch. 2009-07-10 19:07:07 +00:00
Warner Losh
4d8c18e0d7 Better definitions for a few types for n32/n64. 2009-07-10 19:06:43 +00:00
Warner Losh
52efe5c569 Fixed aligned macros...
# I'm not sure bde will like this, but I want to commit it for others to review
# as well. :)
2009-07-10 19:06:15 +00:00
Warner Losh
ec55ba21ce use ta0-ta3 rather than t4-t7 for n32/n64 goodness. 2009-07-10 19:04:32 +00:00
Warner Losh
f0bb71694b Flag this as a 64-bit build.
# Too many flagas needed to build 64-bit, plus different endian, etc.  The
# makefile is getting kinda gross with ifdefs.
2009-07-10 07:19:30 +00:00
Oleksandr Tymoshenko
4bdb59f342 - Add AR71XX watchdog timer driver 2009-07-09 20:16:01 +00:00
Oleksandr Tymoshenko
61bfa4ba5d - Move CPU/AHB frequency calculations to functions to
prevent code duplication
2009-07-09 20:11:26 +00:00
Oleksandr Tymoshenko
6adaa2749f - Ooops, this debug code wasn't supposed to get into
final commit. My appologises.
2009-07-09 19:02:17 +00:00
Warner Losh
e4bd1497e0 Add support for compiling MALTA as mips64.
# MALTA64 builds, but doesn't link yet.
2009-07-09 15:05:50 +00:00
Warner Losh
f332352453 Don't force ISA_MIPS32. 2009-07-09 15:04:52 +00:00
Warner Losh
aacc46585b Make the yamon function pointer stuff 64-bit safe. Make the base
unsigned long, and sign extend the address of the function we're
calling through.
2009-07-09 15:04:24 +00:00
Warner Losh
93b7e55647 Addresses should be unsigned long. Make the address constants
unsigned long.
2009-07-09 14:54:09 +00:00
Oleksandr Tymoshenko
258430ffd1 - Port busdma code from FreeBSD/arm. This is more mature version
that takes into account all limitation to DMA memory (boundaries,
    alignment) and implements bounce pages.
- Add BUS_DMASYNC_POSTREAD case to bus_dmamap_sync_buf
2009-07-08 22:28:36 +00:00
Oleksandr Tymoshenko
63080dcd94 - Fix PCI routing code 2009-07-08 17:20:53 +00:00
Warner Losh
5ac0137013 Fix atomic_store_64 prototype for 64-bit systems. 2009-07-08 06:01:37 +00:00
Warner Losh
902598a268 Turns out this code was right, revert last change. 2009-07-08 06:00:18 +00:00
Oleksandr Tymoshenko
41d99511cb - Fix off-by-one bug in arge_fixup_rx. If mbuf is located
by the end of the page and even number of bytes long,
    that may cause TLBMiss exception for unallocated address.
- Fix mess with DMA sync opeartions
2009-07-08 02:21:08 +00:00
Oleksandr Tymoshenko
b661054728 - Move dpcpu initialization to mips_proc0_init. It's
more appropriate place for it. Besides dpcpu_init
    requires pmap module to be initialized and calling it
    int pmap.c hangs the system
2009-07-07 19:55:09 +00:00
Warner Losh
4d33e6554c 64-bit fixes: fix printf formats and prefer MIPS_PHYS_TO_KSEG0. 2009-07-06 18:18:27 +00:00
Warner Losh
a371f04d66 GC some now-unused items. Fix for 64-bit build. Note: this breaks
the 32-bit build (which we're not computing correctly anyway).
2009-07-06 18:17:48 +00:00
Warner Losh
4df29a25aa 64-bit fixes:
(1) fix printf formats.
(2) Prefer FreeBSD's MIPS_PHYS_TO_KSEG0 to hand-rolled one from Cavium.
(3) Mark a few 64-bit cleanliness issues (possible).
(4) Minor formatting fixes.
2009-07-06 18:15:57 +00:00
Warner Losh
9d7dcb83db Minor fixes to printf formats. 2009-07-06 18:12:49 +00:00
Warner Losh
4b9aa0a973 Prefer uintptr_t to int cast here. 2009-07-06 07:49:24 +00:00
Warner Losh
26b14c6dde Better types for 64-bit compatibility. Use %p and cast to void * and
prefer uintptr_t to other int-type casts.
2009-07-06 07:48:31 +00:00
Warner Losh
f548109087 No need to force mips32 here. 2009-07-06 07:47:39 +00:00
Warner Losh
025e48c64c Pass in the uint64 value, rather than a pointer to it. that's what
the function expects...
2009-07-06 07:46:13 +00:00
Warner Losh
e3c2111d5c Use ta0 instead of t4 and ta1 instead of t5. These map to the same
registers on O32 builds, but t4 and t5 don't exist on N32 or N64.
2009-07-06 07:45:02 +00:00
Warner Losh
10c8cc2b9f Use better casts for passing the small integer as a pointer here.
Basically, replace int with uintptr_t.
2009-07-06 07:43:50 +00:00
Warner Losh
243ab23fcf (1) Improvements for SB1. only allow real memory to be accessed.
(2) make compile n64 by using more-proper casts.

Submitted by:	Neelkanth Natu (1)
2009-07-06 07:42:54 +00:00
Warner Losh
b04ad5dd49 The MCOUNT macro isn't going to work in 64-bit mode. Add a note to
this effect.
2009-07-06 02:27:03 +00:00
Warner Losh
2967976763 Provide a macro for PTR_ADDU as well. We may need to implement this
differently for N32...  Use PTR_ADDU in DO_AST macro.
2009-07-06 02:22:51 +00:00
Warner Losh
54d05c03e5 Change the addu here to daddu.
addu paranoina prodded by: jmallet@
2009-07-06 02:22:06 +00:00
Warner Losh
3eecc82e89 addu and subu are special. We need to use daddu and dsubu here to get
proper behavior.

Submitted by:	jmallet@
2009-07-05 21:16:26 +00:00
Sam Leffler
8c393fd1f0 Cleanup ALIGNED_POINTER:
o add to platforms where it was missing (arm, i386, powerpc, sparc64, sun4v)
o define as "1" on amd64 and i386 where there is no restriction
o make the type returned consistent with ALIGN
o remove _ALIGNED_POINTER
o make associated comments consistent

Reviewed by:	bde, imp, marcel
Approved by:	re (kensmith)
2009-07-05 17:45:48 +00:00
Warner Losh
ece5503dbe (1) Use PTR_LA rather than bare la for N64 goodness (it is dla there)
(2) SB1 needs COHERENT policy, not cached for the config register

Submitted by:	(2) Neelkanth Natu
2009-07-05 15:23:54 +00:00
Warner Losh
4f4793e605 use "PTR_LA" in preference to a bare la so it translates to dla on
64-bit ABIs.
2009-07-05 15:22:22 +00:00
Warner Losh
add6da074c Now that we define atomic_{load,store}_64 inline in atomic.h, we don't
need to define them here for the !N64 case.

We now define atomic_readandclear_64 in atomic.h, so no need to repeat
it here.
2009-07-05 15:21:35 +00:00
Warner Losh
bd34d48210 The SB1 has cohernet memory, so add it.
Also, Maxmem is better as a long.

Submitted by:	Neelkanth Natu
2009-07-05 15:20:16 +00:00
Warner Losh
46d854bbdb The SB1 needs a special value for the cache field of the pte.
Submitted by:	Neelkanth Natu
2009-07-05 15:19:28 +00:00
Warner Losh
72322b2318 compute the areas to save registers in for 64-bit access correctly. 2009-07-05 15:18:06 +00:00
Warner Losh
f8b89abb9d First cut at 64-bit types. not 100% sure these are all correct for
N32 ABI.
2009-07-05 15:17:11 +00:00
Warner Losh
8de20ddba8 Trim unreferenced goo. SDRAM likely should be next, but it is still
referenced.
2009-07-05 15:16:27 +00:00
Warner Losh
61a1eed0b4 First cut at atomics for 64-bit machines and SMP machines.
# Note: Cavium provided a port that has atomics similar to these, but
# that does a syncw; sync; atomic; sync; syncw where we just do the classic
# mips 'atomic' operation (eg ll; frob; sc).  It is unclear to me why
# the extra is needed.  Since my initial target is one core, I'll defer
# investigation until I bring up multiple cores.  syncw is an octeon specific
# instruction.
2009-07-05 15:13:24 +00:00
Warner Losh
753b803f71 use %p in preference to 0x%08x for printing register_t values. Cast
them to void * first.  This neatly solves the "how do I print a
register_t" problem because sizeof(void *) is always the same as
sizeof(register_t), afaik.
2009-07-05 15:10:07 +00:00
Warner Losh
2d3c40cf49 Add config file for SWARM board, a sybyte SB-1-based board by
Broadcom.  BCM-91250.

Submitted by:	Neelkanth Natu
2009-07-05 08:40:26 +00:00
Warner Losh
24646e120c Bring in cdefs.h from NetBSD to define ABI goo.
Obtained from:	NetBSD
2009-07-05 08:14:00 +00:00
Warner Losh
0d978536b2 Pull in machine/cdefs.h for the ABI definitions. Provide a PTR_LA,
ala sgi, and use it in preference to a bare 'la' so that it gets
translated to a 'dla' for the 64-bit pointer ABIs.
2009-07-05 08:13:19 +00:00
Warner Losh
f547073088 Use uintptr_t rather than unsigned here for 64-bit correctness. 2009-07-05 07:01:34 +00:00
Warner Losh
da96ff5dae Define __ELF_WORD_SIZE appropriately for n64. Note for N32 I believe
this is correct.  While registers are 64-bit, n32 is a 32-bit ABI and
lives in a 32-bit world (with explicit 64-bit registers, however).
Change an 8, which was 4 + 4 or sizeof(int) + SZREG to be a simple '4
+ SZREG' to reflect the actual offset of the structure in question.
2009-07-05 07:00:51 +00:00
Warner Losh
64003afe2e (1) Use uintptr_t in preference to unsigned. The latter isn't right for
64-bit case, while the former is.

(2) include a SB1 specific coherency mapping

Submitted by:	Neelkanth Nath (2)
2009-07-05 06:56:51 +00:00
Warner Losh
220d1e7fb0 Go for broke: configure this to build mips64 N64 binary. 2009-07-05 06:49:56 +00:00
Warner Losh
bca296cba8 Publish PAGE_SHIFT to assembler
# we should likely phase out PGSHIFT

Submitted by:	Neelkanth Natu
2009-07-05 06:46:54 +00:00
Warner Losh
4ecfc54d9d db_expr_t should be a intptr_t, not an int. These expressions can be
addresses or numbers, and that's a intptr_t if I ever saw one.
2009-07-05 06:44:37 +00:00
Warner Losh
6855d90580 Define COP0_SYNC for SB1 CPU.
Submitted by:	Neelkanth Natu
2009-07-05 06:43:01 +00:00
Warner Losh
2c1c8bb345 Switch to ABI agnostic ta0-ta3. Provide defs for this in the right
places.  Provide n32/n64 register name defintions.  This should have
no effect for the O32 builds that everybody else uses, but should help
make N64 builds possible (lots of other changes are needed for that).

Obtained from:	NetBSD (for the regdef.h changes)
2009-07-05 06:39:37 +00:00
Warner Losh
561a3cc1a1 Move from using the lame invalid address I chose when trying to get
Octeon going...  Turns out that you get tlb shutdowns with this...
Use PGSHIFT instead of PAGE_SHIFT.

Submitted by:	Neelkanth Natu
2009-07-04 03:22:34 +00:00
Warner Losh
f94784e818 Add sibyte device support.
Submitted by:	Neelkanth Natu
2009-07-04 03:05:48 +00:00
Oleksandr Tymoshenko
09c817ba36 - MFC 2009-07-03 04:39:18 +00:00
Warner Losh
ca72c49f42 Fix copyrights to reflect the origin of these files.
Approved by:	re@ (rwatson)
2009-06-29 16:45:50 +00:00
Oleksandr Tymoshenko
fa596cbd83 - Replace casuword and casuword32 stubs with proper implementation 2009-06-28 21:01:00 +00:00
Oleksandr Tymoshenko
00741bfc80 - Add support for handling TLS area address in kernel space.
From the userland point of view get/set operations are
    performed using sysarch(2) call.
2009-06-27 23:27:41 +00:00
Oleksandr Tymoshenko
a79d8960b1 - Make cpu_set_upcall_kse conform MIPS ABI. T9 should be
the same as PC in subroutine entry point
- Preserve interrupt mask
2009-06-27 23:01:35 +00:00
Oleksandr Tymoshenko
5576af82b5 - Add guards to ensure that these files are included only once 2009-06-26 19:54:06 +00:00
Alan Cox
5797795f5a Correct the #endif comment.
Noticed by:	jmallett
Approved by:	re (kib)
2009-06-26 16:22:24 +00:00
Robert Watson
eb956cd041 Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/
IF_ADDR_UNLOCK() across network device drivers when accessing the
per-interface multicast address list, if_multiaddrs.  This will
allow us to change the locking strategy without affecting our driver
programming interface or binary interface.

For two wireless drivers, remove unnecessary locking, since they
don't actually access the multicast address list.

Approved by:	re (kib)
MFC after:	6 weeks
2009-06-26 11:45:06 +00:00
Alan Cox
e999111ae7 This change is the next step in implementing the cache control functionality
required by video card drivers.  Specifically, this change introduces
vm_cache_mode_t with an appropriate VM_CACHE_DEFAULT definition on all
architectures.  In addition, this changes adds a vm_cache_mode_t parameter
to kmem_alloc_contig() and vm_phys_alloc_contig().  These will be the
interfaces for allocating mapped kernel memory and physical memory,
respectively, with non-default cache modes.

In collaboration with:	jhb
2009-06-26 04:47:43 +00:00
Oleksandr Tymoshenko
77edcd641c - Invalidate cache in pmap_qenter. Fixes corruption of data
that comes through pipe (may be other bugs)
2009-06-25 02:15:04 +00:00
Oleksandr Tymoshenko
790b067725 - Do not use hardcoded uart speed
- Call mips_timer_early_init before initializing uart in order
    to make DELAY usable for ns8250 driver

Submitted by:	Neelkanth Natu
2009-06-24 22:42:52 +00:00
Jeff Roberson
50c202c592 Implement a facility for dynamic per-cpu variables.
- Modules and kernel code alike may use DPCPU_DEFINE(),
   DPCPU_GET(), DPCPU_SET(), etc. akin to the statically defined
   PCPU_*.  Requires only one extra instruction more than PCPU_* and is
   virtually the same as __thread for builtin and much faster for shared
   objects.  DPCPU variables can be initialized when defined.
 - Modules are supported by relocating the module's per-cpu linker set
   over space reserved in the kernel.  Modules may fail to load if there
   is insufficient space available.
 - Track space available for modules with a one-off extent allocator.
   Free may block for memory to allocate space for an extent.

Reviewed by:    jhb, rwatson, kan, sam, grehan, marius, marcel, stas
2009-06-23 22:42:39 +00:00
Oleksandr Tymoshenko
e3ebc7a32e - Keep interrupts mask intact by RESTORE_CPU in MipsKernGenException
trap() function re-enables interrupts if exception happened with
    interrupts enabled and therefor status register might be modified
    by interrupt filters
2009-06-19 19:02:40 +00:00
Oleksandr Tymoshenko
d7766b4586 - Flush PCI register write before delay
Spotted by: Pyun YongHyeon
2009-06-19 05:00:17 +00:00
Oleksandr Tymoshenko
6846a68073 - Mark temp variable as "earlyclobber" in assembler inline in
atomic_fetchadd_32.  Without it gcc would use it as input
    register for v and sometimes generate following code for
    function call like atomic_fetchadd_32(&(fp)->f_count, -1):

801238b4:       2402ffff        li      v0,-1
801238b8:       c2230018        ll      v1,24(s1)
801238bc:       00431021        addu    v0,v0,v1
801238c0:       e2220018        sc      v0,24(s1)
801238c4:       1040fffc        beqz    v0,801238b8 <dupfdopen+0x2e8>
801238c8:       00000000        nop

   Which is definitly wrong because if sc fails v0 is set to 0
   and previous value of -1 is overriden hence whole operation
   turns to bogus
2009-06-19 04:43:49 +00:00
Bjoern A. Zeeb
2aabdeb1f6 Add a .cvsignore file and along with that put an svn:ignore proprty
on the directory like we have for all other target architectures.

Discussed with:	imp (kind of)
2009-06-17 10:48:32 +00:00
Bjoern A. Zeeb
ed34ec5ed8 Make compile again using proper protoypes for
pcib_read/write_config DEVMETHOD.
2009-06-17 10:26:37 +00:00
Bjoern A. Zeeb
23678e67c0 Make compile again using the correct prototype for the
device shutdown method.
2009-06-17 10:23:25 +00:00
Oleksandr Tymoshenko
1a28ce2dcb - Remove debug printfs 2009-06-16 02:36:21 +00:00
Oleksandr Tymoshenko
04af8c86f5 - Handle KSEG0/KSEG1 addresses for /dev/mem as well. netstat requires it 2009-06-16 01:43:33 +00:00
Oleksandr Tymoshenko
8766ab738d - Take into account only unmasked bits in interrupt status register 2009-06-16 00:02:02 +00:00
Oleksandr Tymoshenko
ee58bf3153 - Fix prototypes to make compiler happy 2009-06-14 21:16:23 +00:00
Oleksandr Tymoshenko
d7913bf5ab - Get rid of mask_fn and fix pre_filter/post_filter functions' prototypes 2009-06-14 21:16:04 +00:00
Oleksandr Tymoshenko
1ee48ffda9 - Fix prototype and implementation of admsw_shutdown 2009-06-14 21:04:54 +00:00
Oleksandr Tymoshenko
e3652db0ce - Fix prototypes to make compiler happy 2009-06-14 20:54:46 +00:00
Warner Losh
72bd8c62f6 Minor formatting changes. Also, elimiante a couple of unused variables. 2009-06-14 07:01:22 +00:00
Warner Losh
c839424d34 Various nits to make this compile. 2009-06-14 06:53:55 +00:00
Warner Losh
24277e95bb Make compile. 2009-06-14 06:49:13 +00:00
Warner Losh
67b401589c Hack for the 'battleship' boards that have 8 ports rather than 4. 2009-06-14 06:36:50 +00:00
Warner Losh
bafe55344b Compile out unreferenced code. 2009-06-14 06:35:21 +00:00
Warner Losh
db9c08f280 Stylish nits 2009-06-14 06:35:02 +00:00
Warner Losh
00e1958bd4 Add bogus OCTEON_CORE_ID here. Really should integrate the pcpu.h stuff
that is in Cavium's base port.
2009-06-14 06:27:11 +00:00
Warner Losh
2e24c40fec bye bye. This is no longer referenced, but much code from it will
resurface for a bus-space implementation.
2009-06-14 06:14:25 +00:00
Warner Losh
78e0ef6f04 Kludge: pretend to be ISA_MIPS32 for the moment. 2009-06-14 06:12:21 +00:00
Warner Losh
2acee4de5c First pass to make compile. It doesn't completely yet, but it's a
start.
2009-06-14 06:11:51 +00:00
Warner Losh
8c29759b4a Bring back the TARGET_OCTEON kludge for a bit. We need to kill it,
but it is useful for the moment.
2009-06-14 06:11:13 +00:00
Warner Losh
55f888f68d Cavium-specific goo is no longer necessary here. Of course, I now
have to write a bus space for cavium, but that shouldn't be too hard.
2009-06-14 06:10:36 +00:00
Warner Losh
29854186d2 Move octeon specific uart goo here, per SOP for other MIPS ports. 2009-06-14 06:09:33 +00:00
Warner Losh
558955d6a8 Move this to a more approrpiate plae. 2009-06-14 06:01:46 +00:00
Warner Losh
f7edf22465 Bring this in from the cavium port. 2009-06-14 05:29:13 +00:00
Warner Losh
0d633f654d o Move the driveid.h file
o lots of tweaks to header paths.
o comment out SMP for the moment

# we now make it through the .c make depend, the .s needs more work.
2009-06-14 04:26:56 +00:00
Warner Losh
654d4c2496 Move octeon rgmii driver to is more correct new home. 2009-06-14 04:10:27 +00:00
Warner Losh
b02713c7a4 Move dev/flash/ cf driver into octeon dir where it belongs. 2009-06-14 03:55:27 +00:00
Warner Losh
b9bf0e01e9 Actually rename the files this time. Also, start to fix OCTEON1 so it
can configure.
2009-06-14 03:44:43 +00:00
Warner Losh
6aca1d2ff0 Now that the import is over, we can (re) delete this. 2009-06-14 03:44:01 +00:00
Warner Losh
bf4969e4ac Fix typo... bad imp. 2009-06-14 03:32:52 +00:00
Warner Losh
b502e57d9e Move the octeon port to its more correct location. Any port for the
OCTEON2 family of processors should live in mips/octeon2.  Not enough
is know abotu the former to know if the same port can be used for both
yet.
2009-06-14 03:01:39 +00:00
Warner Losh
b0734f67fa After Marcel's change to DEFAULTS, we were bringing in a bogus copy of
uart_8250.  Remove it here since the UART on the ADM5120 isn't the
typical 16550: its completely different.
2009-06-14 02:58:56 +00:00
Warner Losh
dcd550fe2a Formatting nit. 2009-06-14 02:55:07 +00:00
Warner Losh
75c1942047 Import Cavium's FreeBSD port, or the Octeon specific pieces, verbatim.
Yes, this puts things in the wrong place, doesn't compile and is
woefully incomplete.  However, it will allow us to more easily track
against the upstream sources without needing to import the entire
Cavium tree under vendor.

This port is based on FreeBSD 7.0 as of April 2007 and the pre-import
MIPS tree (aka mips2), so much work is necessary here.
2009-06-14 02:46:07 +00:00
Juli Mallett
e11e04c939 Fix MALTA build; some prototypes were wrong and blew up when kobj method
signature checking was turned on.
2009-06-12 22:49:35 +00:00
Oleksandr Tymoshenko
fdf7155886 - Fix functions prototypes to make compiler happy 2009-06-12 12:17:32 +00:00
Oleksandr Tymoshenko
b64bb4d93e - Switch no normal RPC oimplementation. Unaligned access bug has
been fixed
2009-06-12 12:10:10 +00:00
Oleksandr Tymoshenko
02f00631b6 - Status register should be set last in RESTORE_CPU in order
to prevent race over k0, k1 registers.
- Update interrupts mask in saved status register for
    MipsUserIntr and MipsUserGenException. It might be
    modified by intr filter or ithread.
2009-06-05 09:21:03 +00:00
Oleksandr Tymoshenko
5948288d97 - Use restoreintr instead of enableint while accessing pcpu in DO_AST 2009-06-05 08:37:11 +00:00
Oleksandr Tymoshenko
40570d7175 - Revert fix by dwhite that has been accidentally lost in r192783
commit.
2009-05-28 00:47:50 +00:00
Oleksandr Tymoshenko
16a7c7be6d - Replace CPU_NOFPU and SOFTFLOAT options with CPU_FPU. By default
we assume that there is no FPU, because majority of SoC does
   not have it.
2009-05-26 22:40:12 +00:00
Oleksandr Tymoshenko
66ecdee881 - style(9) fixes
- Get rid of obsolete mask_fn
2009-05-26 17:50:50 +00:00
Oleksandr Tymoshenko
571ef3dd82 - arge_poll should be decalred only if DEVICE_POLLING is enabled
- Revert Rx buffer nsegments from BUS_SPACE_UNRESTRICTED to
	ARGE_MAXFRAGS
2009-05-26 17:43:32 +00:00
Oleksandr Tymoshenko
2e370a5c7a Merge from HEAD 2009-05-26 17:01:12 +00:00
Oleksandr Tymoshenko
7dafc31d3e - Add type cast for atomic_cmpset_acq_ptr arguments 2009-05-26 16:35:05 +00:00
Oleksandr Tymoshenko
5d54a91aa4 - Add UFS support
- Enable PCI
- Add bpf and random devices for wpa_supplicant
- Disable USB
- Add SPI bus and MX25L support
2009-05-26 16:29:35 +00:00
Oleksandr Tymoshenko
0e59084d68 - Preserve INT_MASK fields in Status register across
context switches. They should be modified only by
    interrupt setup/teardown and pre_ithread/post_ithread
    functions
2009-05-26 06:20:50 +00:00
Oleksandr Tymoshenko
aac33d7033 - Remove erroneus "break" instruction, it was meant for debug 2009-05-26 06:02:38 +00:00
Oleksandr Tymoshenko
be6bd37bab - Remove now unused NetBSDism intr.h 2009-05-26 06:01:17 +00:00
Oleksandr Tymoshenko
c7657b54ac - Provide proper pre_ithread/post_ithread functions for both
hard and soft interrupts
- Do not handle masked interrupts
- Do not write Cause register because most bytes are read-only and
    writing the same byte to RW fields are pointless. And in case of
    software interrupt utterly wrong
2009-05-26 05:59:05 +00:00
Oleksandr Tymoshenko
c3ab9e8c95 - Provide proper pre_ithread/post_ithread functions 2009-05-26 05:52:24 +00:00
Oleksandr Tymoshenko
b6713e96f9 - Provide proper pre_thread/post_ithread functions for GT PCI
controller.
2009-05-26 04:51:56 +00:00
Oleksandr Tymoshenko
ccbbcd481f - Add polling support
- Get rid of arge_fix_chain, use m_defrag like if_vr
- Rework interrupt handling routine to avoid race that lead
    to disabling RX interrupts
- Enable full duplex if requested
- Properly set station MAC address
- Slightly optimize RX loop
- Initialize FILTERMATCH and FILTERMASK registers as linux driver does
2009-05-26 03:45:58 +00:00
Alan Cox
5760d14d58 pmap_enter() *must* set PG_WRITEABLE on the given page if it creates a
mapping that permits write access.  Otherwise, pmap_remove_write() will not
remove write access from any of the page's mappings.
2009-05-23 22:05:14 +00:00
Oleksandr Tymoshenko
687fba47a7 - cpu_establish_hardintr modifies INT_MASK of Status
register, so we should use disableintr/restoreintr that
    modifies only IE bit.
2009-05-23 19:42:23 +00:00
Alan Cox
56c4a67ba7 Give pmap_enter()'s third parameter the same name that it has on amd64 and
i386.  Otherwise, my next to last commit (r192628) to this file doesn't
actually compile.
2009-05-23 18:44:26 +00:00
Alan Cox
b4b264f3e9 When a page is mapped for write access on a read fault, the PTE should be
configured to trap on a write access unless *all* of the page's dirty bits
are set.
2009-05-23 18:33:22 +00:00
Oleksandr Tymoshenko
5dc8f9e2ee - Calculate clock frequency using PLL registers 2009-05-23 18:18:06 +00:00
Oleksandr Tymoshenko
070f07e3de - Remove stale comments
- Replace a1 with k1 to while restoring context. a1 was there by mistake,
    interrupts are disabled at this point and it's safe to use k0, k1.
    This code never was reached beacasue current Status register handling
    prevented interrupta from user mode.
2009-05-23 18:00:20 +00:00
Alan Cox
e420c0cab7 Preset the modified bit in the PTE when pmap_enter() is called during a
write fault or while wiring a mapping that must support write access.

In general, this change should reduce the number of traps that occur for
the purpose of setting the modified bit.  More specifically, this change
should prevent traps while holding locks in a sysctl handler.  See
kern/kern_sysctl.c revisions 1.168 and 1.195 (svn r192160) for further
details.

Tested by: gonzo
2009-05-23 07:58:56 +00:00
Oleksandr Tymoshenko
41917f9933 - Wrong logical operator was used for flag check 2009-05-23 06:30:03 +00:00
Doug White
58f0ea3143 Remove unused variable. 2009-05-22 20:08:13 +00:00
Doug White
58a5af46ef Add some missing bits to arge:
* In arge_attach(), hard reset the MAC blocks before configuring the MAC.
 * In arge_reset_dma(), clear pending packet interrupts based off
   the hardware counter instead of acking every packet in the ring,
   as the hardware counter can exceed the ring size. If the reset
   was successful the counters will be zero anyway.
 * In arge_encap(), remove an unused variable.
 * In arge_tx_locked(), remove redundant setting of the EMPTY flag as
   the TX DMA engine sets it for us.
 * In arge_intr(), remember to clear the interrupt status bits
   relayed from arge_intr_filter().
 * Handle RX overflow and TX underflow.
 * In arge_tx_intr(), remember to unmask the TX interrupt bits
   after processing them.
2009-05-21 22:12:42 +00:00
Oleksandr Tymoshenko
52e6bd2801 - Invalidate caches for respective areain KSEG0 in order
to prevent further overwriting of KSEG1 data with
    writeback.
2009-05-20 23:07:10 +00:00
Oleksandr Tymoshenko
f92ba06830 - ar71xx increases Count value every two cycles 2009-05-19 02:51:30 +00:00
Oleksandr Tymoshenko
dea8410235 - Cleanup ticker initialization code. For some MIPS cpu Counter
register increments only every second cycle. The only timing
    references for us is Count value. Therefore it's better to convert
    frequencies related to it and use them. Besides cleanup this commit
    fixes twice more then requested sleep interval problem.
2009-05-19 02:43:21 +00:00
Oleksandr Tymoshenko
e0e8ed6ab1 - Add spibus and mx25l device 2009-05-18 23:36:11 +00:00
Oleksandr Tymoshenko
495d422f49 - Add SPI bus driver for ar71xx SoC 2009-05-18 23:32:04 +00:00
Marcel Moolenaar
dbb95048da Add cpu_flush_dcache() for use after non-DMA based I/O so that a
possible future I-cache coherency operation can succeed. On ARM
for example the L1 cache can be (is) virtually mapped, which
means that any I/O that uses temporary mappings will not see the
I-cache made coherent. On ia64 a similar behaviour has been
observed. By flushing the D-cache, execution of binaries backed
by md(4) and/or NFS work reliably.
For Book-E (powerpc), execution over NFS exhibits SIGILL once in
a while as well, though cpu_flush_dcache() hasn't been implemented
yet.

Doing an explicit D-cache flush as part of the non-DMA based I/O
read operation eliminates the need to do it as part of the
I-cache coherency operation itself and as such avoids pessimizing
the DMA-based I/O read operations for which D-cache are already
flushed/invalidated. It also allows future optimizations whereby
the bcopy() followed by the D-cache flush can be integrated in a
single operation, which could be implemented using on-chips DMA
engines, by-passing the D-cache altogether.
2009-05-18 18:37:18 +00:00
Ulf Lilleengen
ae28ded2c8 - Fix spelling. 2009-05-16 15:21:08 +00:00
Oleksandr Tymoshenko
b665f0d4b7 - Set MAC Address obtained from RedBoot or generate random one 2009-05-16 02:45:38 +00:00
Oleksandr Tymoshenko
89616da3f5 - Get memory size and base MAC address from RedBoot (if available) 2009-05-16 02:43:24 +00:00
Oleksandr Tymoshenko
9270c7be8b - Add MIPS_IS_KSEG0_ADDR, MIPS_IS_KSEG1_ADDR and MIPS_IS_VALID_PTR
macroses thet check if address belongs to KSEG0, KSEG1 or both
    of them respectively.
2009-05-16 02:39:13 +00:00
Oleksandr Tymoshenko
a2f4a6ee3c - Add informational title for cache info lines to separate
them from environment variables dump
2009-05-16 02:34:03 +00:00
Oleksandr Tymoshenko
bcc90b6ff5 - Add pci bus space that translates byte order to little endian,
may be it will be merged with bus_space_reversed later
- Handle memory resources close to bus in order to control
    bus_space_tag
2009-05-15 21:36:50 +00:00
Oleksandr Tymoshenko
b75cca0708 - Calculate clock frequency using PLL registers
- Remove stale comments
2009-05-15 01:54:32 +00:00
Oleksandr Tymoshenko
b31707c849 - Calculate CPU frequency using dividers from PLL registers 2009-05-15 01:53:09 +00:00
Oleksandr Tymoshenko
9b54fef7f5 - Add definitions for PLL CPU Config register fields 2009-05-15 01:51:47 +00:00
Oleksandr Tymoshenko
ce205fb47f - Add SPI-related registers 2009-05-14 21:27:03 +00:00
Oleksandr Tymoshenko
c5d30a2254 - Off by one check fix. Check for last address in region
to fit in KSEG1
2009-05-14 21:26:07 +00:00
Oleksandr Tymoshenko
a88b9b52e3 - Remove garbage debug output 2009-05-14 21:15:27 +00:00
Jun Kuriyama
b3b17597ea - Use "device\t" and "options \t" for consistency. 2009-05-10 00:00:25 +00:00
Oleksandr Tymoshenko
5db10e923d - Add interrupt handling for AR71XX PCI bridge 2009-05-07 03:39:23 +00:00
Oleksandr Tymoshenko
e7153b2583 Merge from HEAD 2009-05-06 22:40:01 +00:00
Oleksandr Tymoshenko
aa5b813413 - Use index ops in order to avoid TLBMiss exceptions when flushing caches
on mapping removal
- Writeback all VA for page that is being copied in pmap_copy_page to
    guaranty up-to-date data in SDRAM
2009-05-06 02:55:43 +00:00
Oleksandr Tymoshenko
ccf532a44b - Rollback to the hack with 3-bytes offset in base address.
uart_bus_XXXXX resources are handled in uart(4) code
    and we need more sophysticated way to define which space
    should be used for device based on hints
2009-05-06 02:46:04 +00:00
Oleksandr Tymoshenko
1540246aab - Rollback to legacy NFS RPC implementation. New one has unaligned
memory access after nfsm_dissect
2009-05-06 02:34:35 +00:00
Oleksandr Tymoshenko
07e615d625 - Add APB base and size for memory rman in apb 2009-05-06 02:31:46 +00:00
Oleksandr Tymoshenko
ccf8f87398 - Handle memory requests on apb level, do not pass them up to
nexus
- Unmask IRQ in bus_intr_setup
- Do not count timer IRQ (IRQ0) as stray
2009-05-06 02:31:07 +00:00
Alan Cox
7b89d46e0f A variety of changes:
Reimplement "kernel_pmap" in the standard way.

Eliminate unused variables.  (These are mostly variables that were
discarded by the machine-independent layer after FreeBSD 4.x.)

Properly handle a vm_page_alloc() failure in pmap_init().

Eliminate dead or legacy (FreeBSD 4.x) code.

Eliminate unnecessary page queues locking.

Eliminate some excess white space.

Correct the synchronization of pmap_page_exists_quick().

Tested by: gonzo
2009-05-02 06:12:38 +00:00
Oleksandr Tymoshenko
26a323c653 - accummulate interrupt causes in filter instead of rewriting old. The only
place where status should be overrided - interrupt handler
2009-04-29 03:21:53 +00:00
Oleksandr Tymoshenko
4f3aceef88 - When destroying va -> pa mapping writeback all caches or we may endup
with partial page content in SDRAM
- style(9) fix
2009-04-28 02:59:18 +00:00
Oleksandr Tymoshenko
c231293745 - Cast argument to proper type in order to avoid warnings like
"shift value is too large for given type"
2009-04-27 19:18:55 +00:00
Oleksandr Tymoshenko
3a8b0ab3f3 - Use new spacebus
- Be a bit more verbose on failures
- style(9) fixes
- Use default rid value of 0 instead of MIPS_MEM_RID (0x20)
2009-04-27 18:46:57 +00:00
Oleksandr Tymoshenko
00c35cc20b - Use naming convention the same as MIPS spec does: eliminate _sel1 sufix
and just use selector number. e.g. mips_rd_config_sel1 -> mips_rd_config1
- Add WatchHi/WatchLo accessors for selctors 1..3 (for debug purposes)
2009-04-27 18:29:59 +00:00
Oleksandr Tymoshenko
ffb90c259e Fix cut'n'paste code. cfg3 should get the value of selector 3
Spotted by: thompa@
2009-04-24 05:28:44 +00:00
Oleksandr Tymoshenko
709410480c - Print supported CPU capabilities during stratup 2009-04-24 04:18:16 +00:00
Oleksandr Tymoshenko
7323fa4005 - Define accessor functions for CP0 Config(16) register selects 1, 2, 3.
Content of these registers is defined in MIPS spec and can be used
    for obtaining info about CPU capabilities.
2009-04-24 04:17:21 +00:00
Oleksandr Tymoshenko
e19cc06695 - Fix whitespace to conform style(9) 2009-04-24 03:38:51 +00:00
Robert Watson
9725389e1e Don't conditionally define CACHE_LINE_SHIFT, as we anticipate sizing
a fair number of static data structures, making this an unlikely
option to try to change without also changing source code. [1]

Change default cache line size on ia64, sparc64, and sun4v to 128
bytes, as this was what rtld-elf was already using on those
platforms. [2]

Suggested by:	bde [1], jhb [2]
MFC after:	2 weeks
2009-04-20 12:59:23 +00:00
Alan Cox
1c951556bc MFamd64/i386
Introduce pmap_try_insert_pv_entry(), a function that conditionally
  creates a pv entry if the number of entries is below the high water mark
  for pv entries.

  Introduce pmap_enter_quick_locked() and use it to reimplement
  pmap_enter_object().  The old implementation was broken.  For example,
  it could block while holding a mutex lock.

  Change pmap_enter_quick_locked() to fail rather than wait if it is
  unable to allocate a page table page.  This prevents a race between
  pmap_enter_object() and the page daemon.  Specifically, an inactive
  page that is a successor to the page that was given to
  pmap_enter_quick_locked() might become a cache page while
  pmap_enter_quick_locked() waits and later pmap_enter_object() maps
  the cache page violating the invariant that cache pages are never
  mapped.  Similarly, change
  pmap_enter_quick_locked() to call pmap_try_insert_pv_entry() rather
  than pmap_insert_entry().  Generally speaking,
  pmap_enter_quick_locked() is used to create speculative mappings.  So,
  it should not try hard to allocate memory if free memory is scarce.

Tested by:	gonzo
2009-04-20 03:44:54 +00:00
Oleksandr Tymoshenko
c124ae524d - Enable USB and EHCI
- Include if_arge to build
- Add NFS root options
- Disable pci ATM and add stubs for wifi adapter config
2009-04-19 23:15:04 +00:00
Oleksandr Tymoshenko
0b67040463 - Expand memory window for apb to include OHCI memory region
- Add hints for EHCI and OHCI controllers
2009-04-19 23:08:23 +00:00
Oleksandr Tymoshenko
c058a01081 - Remove garbage debug output
- ar71xx_bus_space_reversed is bus_space_tag_t, use it this way
2009-04-19 23:06:15 +00:00
Oleksandr Tymoshenko
e6a88aa8ad - Add EHCI controller driver for AR71XX-based boards. 2009-04-19 22:58:36 +00:00
Oleksandr Tymoshenko
06dfe15065 - Handle byte-order issue for non-word accesses to memory mapped
registers with ar71xx_bus_space_reversed. Note, that byte order
    of values is handled by drivers. bus_spaces fixes only position
    of register in word.
- Replace .hints hack for AR71XX UART with ar71xx_bus_space_reversed.
2009-04-19 22:56:35 +00:00
Oleksandr Tymoshenko
50b3024887 - Make mips_bus_space_generic be of type bus_space_tag_t instead of
struct bus_space and update all relevant places.
2009-04-19 22:02:14 +00:00
Robert Watson
22037b2d2c Add description and cautionary note regarding CACHE_LINE_SIZE.
MFC after:	2 weeks
Suggested by:	alc
2009-04-19 21:26:36 +00:00
Robert Watson
a93fa8f2bb For each architecture, define CACHE_LINE_SHIFT and a derived
CACHE_LINE_SIZE constant.  These constants are intended to
over-estimate the cache line size, and be used at compile-time
when a run-time tuning alternative isn't appropriate or
available.

Defaults for all architectures are 64 bytes, except powerpc
where it is 128 bytes (used on G5 systems).

MFC after:	2 weeks
Discussed on:   arch@
2009-04-19 20:19:13 +00:00
Oleksandr Tymoshenko
cf6e3ada35 Fix USB2 quick'n'dirty porting, now system successfully detects OHCI 2009-04-15 05:37:17 +00:00
Oleksandr Tymoshenko
cbc6cfe0ed - Port AR71XX OHCI controller to new USB stack 2009-04-15 03:04:33 +00:00
Oleksandr Tymoshenko
0c6b091e31 Use FreeBSD/arm approach for handling bus space access: space tag is a pointer
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
2009-04-15 02:28:26 +00:00
Oleksandr Tymoshenko
20eb34e255 - Cleanout stale #ifdef'ed chunk of code
- Fix whitespaces
- Explicitly undefine  NEXUS_DEBUG flag
2009-04-15 01:47:52 +00:00
Oleksandr Tymoshenko
fd7391fc0c - Revert changes accidentally killed by merge operation 2009-04-14 22:53:22 +00:00
Dmitry Chagin
cd899aad76 Fix KBI breakage by r190520 which affects older linux.ko binaries:
1) Move the new field (brand_note) to the end of the Brandinfo structure.
2) Add a new flag BI_BRAND_NOTE that indicates that the brand_note pointer
   is valid.
3) Use the brand_note field if the flag BI_BRAND_NOTE is set and as old
   modules won't have the flag set, so the new field brand_note would be
   ignored.

Suggested by:	jhb
Reviewed by:	jhb
Approved by:	kib (mentor)
MFC after:	6 days
2009-04-05 09:27:19 +00:00
Bjoern A. Zeeb
f19dafc798 Mark the declaration of bus_space_map 'static' as the implementation is.
Follow one of the two most common indent schemes in this file.
This unbreaks a few mips kernel builds.
2009-03-28 23:24:34 +00:00
Konstantin Belousov
a4f2b2b0c6 Add AT_EXECPATH ELF auxinfo entry type. The value's a_ptr is a pointer
to the full path of the image that is being executed.
Increase AT_COUNT.

Remove no longer true comment about types used in Linux ELF binaries,
listed types contain FreeBSD-specific entries.

Reviewed by:	kan
2009-03-17 12:50:16 +00:00
Dmitry Chagin
32c01de21c Implement new way of branding ELF binaries by looking to a
".note.ABI-tag" section.

The search order of a brand is changed, now first of all the
".note.ABI-tag" is looked through.

Move code which fetch osreldate for ELF binary to check_note() handler.

PR:		118473
Approved by:	kib (mentor)
2009-03-13 16:40:51 +00:00
Warner Losh
5c0691d91a make loop clearer that it isn't a mistake... 2009-03-03 19:22:24 +00:00
Warner Losh
7008762a18 It appears that none of the contents of this file are necessary, so
replace the amd64-ish version with a blank version.
2009-02-15 20:05:13 +00:00
Warner Losh
77bab78951 Remove stray __P() 2009-02-15 01:12:16 +00:00
Warner Losh
f3e39d2a7b Rewrite get_pv_entry() to match expectations of the rest of the
kernel.  Rather than just kick off the page daemon, we actively retire
more mappings.  The inner loop now looks a lot like the inner loop of
pmap_remove_all.

Also, get_pv_entry can't return NULL now, so remove panic if it did.

Reviewed by:	alc@
2009-02-12 01:14:49 +00:00
Warner Losh
6bf6f10d24 pmap_kenrel() was recently deleted from pmap.h. It was still used
here, but inconsistently.  Change all instances of it to kernel_pmap
to match rest of code.
2009-02-12 01:10:53 +00:00
Alan Cox
11bd9105b6 Eliminate an unused definition. 2009-02-10 06:08:28 +00:00
Oleksandr Tymoshenko
5defb9db6b - Fix in_cksum for big-endian MIPS: use correct compile-time check. 2009-02-08 23:43:36 +00:00
Warner Losh
3beb4f7ed3 Retire NO_DMA completely. 2009-02-08 08:13:36 +00:00
Warner Losh
40a70e188b Eliminate the PMAP_INLINE macro. It isn't really used here. If we
need to bring it back, we can.
2009-01-16 08:38:03 +00:00
Warner Losh
bf969a35eb Remove unused variable.
Minor style nits.
2009-01-16 08:30:22 +00:00
Oleksandr Tymoshenko
f624d2026a - pmap_track_modified was retired in r178606. Reintroducing it was a mistake.
Spotted by: alc@
2009-01-15 23:03:27 +00:00
Warner Losh
1435181496 Reduce diffs to p4 that were the result of a mismerge on my part. 2009-01-15 19:57:45 +00:00
Oleksandr Tymoshenko
16a296f7c9 MFp4:
- Add debug output
- Fix pmap_zero_page and related places: use uncached segments and invalidate
    cache after zeroing memory.
- Do not test for modified bit if it's not neccessary
    (merged from mips-juniper p4 branch)
- Some #includes reorganization
2009-01-15 18:31:36 +00:00
Warner Losh
9703f72989 MFp4:
Remove Maxmem.  It isn't used elsewhere in the system at this point...
realmem is used instead.
2009-01-15 08:01:50 +00:00
Warner Losh
85c209c24d Call platform_reset() instead of looping forever on reboot.
# We likely need to have a default one of these that jumps to the rom boot
# address that's defined in the MIPS ISA.
2009-01-15 07:51:17 +00:00
Warner Losh
b1b26fc820 Reverse order of dumpsys and cpu_idle_wakeup to reduce diffs to p4. 2009-01-15 07:48:37 +00:00
Warner Losh
f180851318 MFp4:
Remove #if'd 0 code.  It is interfering with other diffs.
2009-01-15 07:45:40 +00:00
Oleksandr Tymoshenko
36dc08476d o Code cleanup, remove unused fields of idtpci_softc 2009-01-14 22:46:13 +00:00
Oleksandr Tymoshenko
00582be0e9 o Simplify code: trade 15 lines of case for one multiplication 2009-01-14 22:32:43 +00:00
Oleksandr Tymoshenko
8c7494de12 o Make debug output conditional 2009-01-14 20:36:58 +00:00
Oleksandr Tymoshenko
9f0e1e852e o NO_DMA is no longer required as bug with PIIX4 emulation has been fixed in GXEmul 2009-01-14 20:27:49 +00:00
Oleksandr Tymoshenko
7baa3c0132 o Move $FreeBSD$ from comment to __FBSDID macro
o Be a bit more verbose about CPU type during boot process (print
    manufacturer, chip info, MMU and cache parameters)
2009-01-14 20:16:44 +00:00
Warner Losh
703b345233 First pass at 64-bit elf support 2008-12-31 07:38:04 +00:00
Marcel Moolenaar
05002c354b Make gpart the default partitioning class on all platforms.
Both ia64 and powerpc were using gpart exclusively already
so there's no change for those two.

Discussed on: arch@
2008-12-17 17:43:22 +00:00
Warner Losh
db3cd725a5 AT_DEBUG and AT_BRK were OBE like 10 years ago, so retire them.
Reviewed by:	peter
2008-12-17 06:56:58 +00:00
Warner Losh
3bd6a14307 Start to clean up the MIPS elf machine dependent file.
o Add support for compiling elf64 for this file (the rest of the changes are
  coming later)
o Fill in some misssing relocation types.  We need to support these in
  elf_machdep.c's relocation routines eventually, but that's future work
  too.
2008-12-16 20:07:47 +00:00
Warner Losh
f6bac15e68 Mips never had /usr/libexec/ld-elf.so.1, so remove it. We don't have
any binaries that need it.  This was moved before FreeBSD 5.x.
2008-12-16 20:04:02 +00:00
Warner Losh
a87b76397e Remove redundant assignment. 2008-12-11 07:00:23 +00:00
Sam Leffler
3364462355 Switch to ath hal source code. Note this removes the ath_hal
module; the ath module now brings in the hal support.  Kernel
config files are almost backwards compatible; supplying

device ath_hal

gives you the same chip support that the binary hal did but you
must also include

options AH_SUPPORT_AR5416

to enable the extended format descriptors used by 11n parts.
It is now possible to control the chip support included in a
build by specifying exactly which chips are to be supported
in the config file; consult ath_hal(4) for information.
2008-12-01 16:53:01 +00:00
Warner Losh
55a98c0d2e On FreeBSD, printing the version is centralized, so no need to repeat
it here.  I think that gonzo@ has also made this change to p4.
2008-11-30 08:40:04 +00:00
Warner Losh
1f2c9f3b84 Unbreak mips build by taking first WAG at mb(), wmb() and rmb(). The
latter two are likely pessimal...
2008-11-29 05:16:14 +00:00
Konstantin Belousov
b4cf0e62f4 Add sv_flags field to struct sysentvec with intention to provide description
of the ABI of the currently executing image. Change some places to test
the flags instead of explicit comparing with address of known sysentvec
structures to determine ABI features.

Discussed with:	dchagin, imp, jhb, peter
2008-11-22 12:36:15 +00:00
Warner Losh
795239ebe6 Remove cardbus attachment. It likely was a cut-n-paste left over from
whatever template was used to create this driver.  It is not
necessary, and wouldn't work anyway since (a) this device will never
be in a cardbus tin-can and (b) the driver isn't even PCI, but instead
a built-in NIC on the IDT RC32434 on its internal bus.
2008-11-02 02:58:24 +00:00
Marcel Moolenaar
fd872be586 Add mips/conf/DEFAULTS and populate it with:
machine arm
        device  mem
	device  uart_ns8250
        options GEOM_BSD
        options GEOM_MBR

Remove the first three from all kernel configuration files
(sometimes commented-out) and change geom_bsd and geom_mbr
from standard to optional.
2008-10-23 02:16:38 +00:00
Bruce M Simpson
feb957b8dc Point this config at the required linker script. 2008-10-13 06:25:28 +00:00
Warner Losh
3279d247b2 opt_msgbuf.h is needed for MSGBUF_SIZE overrides, if any.
Submitted by:	alc@
2008-10-12 02:31:09 +00:00
Warner Losh
9e035bb343 Remove critical_enter() and critical_exit(): pmap_growkernel is called
with kernel_map->system_mtx held so these aren't needed.  Add an
assertion to make sure this is the case.

Also, fix a minor style(9) nit.

Reviewed by:	alc@
2008-10-01 05:47:17 +00:00
Warner Losh
e805961dde Catch up with svn r96606 (cvs rev 1.127 2002/05/14 20:35:29) of
sys/param.h and move the MI numbers out of here.  Also move the MI
defines.  Also remove a couple defines not in use (not sure if it is
age, or OpenBSD origins for thse).  Note the current values that are
overrides that appear to be odd in some way.

More cleanup could be done here: NBPG appears to be spelled PAGE_SIZE
these days.  There's new ways to spell PGOFSET and PGSHIFT too, I
think.  These constants duplicate the MI constants and are sprinkled
into the mips code only.  Further investigation is needed.
2008-09-28 19:44:38 +00:00
Marius Strobl
6f04e7b9aa Remove ipi_all() and ipi_self() as the former hasn't been used at
all to date and the latter also is only used in ia64 and powerpc
code which no longer serves a real purpose after bring-up and just
can be removed as well. Note that architectures like sun4u also
provide no means of implementing IPI'ing a CPU itself natively
in the first place.

Suggested by:	jhb
Reviewed by:	arch, grehan, jhb
2008-09-28 18:34:14 +00:00
Warner Losh
ef7d53c441 Fix comments to relate to FreeBSD's current interrupt blocking
functionality, as opposed to the legacy spl means.
2008-09-28 03:50:34 +00:00
Warner Losh
bd253e7716 Fix comment about needing to call something from splnet, which doesn't
exist in freebsd.
2008-09-28 03:48:15 +00:00
Warner Losh
5bfe05811f Remove stale comment. splhigh -> critical_enter transition happend
some time ago, and no longer needs special attention.
2008-09-28 03:47:24 +00:00
Ed Schouten
6bfa9a2d66 Replace all calls to minor() with dev2unit().
After I removed all the unit2minor()/minor2unit() calls from the kernel
yesterday, I realised calling minor() everywhere is quite confusing.
Character devices now only have the ability to store a unit number, not
a minor number. Remove the confusion by using dev2unit() everywhere.

This commit could also be considered as a bug fix. A lot of drivers call
minor(), while they should actually be calling dev2unit(). In -CURRENT
this isn't a problem, but it turns out we never had any problem reports
related to that issue in the past. I suspect not many people connect
more than 256 pieces of the same hardware.

Reviewed by:	kib
2008-09-27 08:51:18 +00:00
Warner Losh
ae7a480f1c Remove reference to machine/tlb.h. It no longer exists, and isn't
needed as this compiles fine w/o it.
2008-09-26 04:45:56 +00:00
Konstantin Belousov
a8d403e102 Change the static struct sysentvec and struct Elf_Brandinfo initializers
to the C99 style. At least, it is easier to read sysent definitions
that way, and search for the actual instances of sigcode etc.

Explicitely initialize sysentvec.sv_maxssiz that was missed in most
sysvecs.

No objection from:	jhb
MFC after:	1 month
2008-09-24 10:14:37 +00:00
David E. O'Brien
ae72afe0f2 The kernel implemented 'memcmp' is an alias for 'bcmp'. However, memcmp
and bcmp are not the same thing.  'man bcmp' states that the return is
"non-zero" if the two byte strings are not identical.  Where as,
'man memcmp' states that the return is the "difference between the
first two differing bytes (treated as unsigned char values" if the
two byte strings are not identical.

So provide a proper memcmp(9), but it is a C implementation not a tuned
assembly implementation.  Therefore bcmp(9) should be preferred over memcmp(9).
2008-09-23 14:45:10 +00:00
Warner Losh
5d99d99ff4 MFp4: Merge interrupt code from p4
Submitted by:	gonzo@
2008-09-19 04:16:13 +00:00
Warner Losh
3fbac48f38 MFp4: Update the interrupt code from perforce.
Submitted by:	gonzo@
2008-09-19 04:10:09 +00:00
Warner Losh
7c626c0c38 Merge from p4: add bpf 2008-09-19 03:47:29 +00:00
David E. O'Brien
b17e4de65f Catch up with intr_event_create() API changes. 2008-09-18 15:24:49 +00:00
David E. O'Brien
c542342568 Catch up with intr_event_create() API changes. 2008-09-18 15:15:42 +00:00
Oleksandr Tymoshenko
c30b5c7330 Fix path in all includes: remove /mips32 subdirectory 2008-09-10 03:49:08 +00:00
David E. O'Brien
7aadc92e95 style(9) 2008-09-04 17:10:52 +00:00
David E. O'Brien
9014c90537 Catch up with the move from mips32/. 2008-09-03 18:49:54 +00:00
David E. O'Brien
86102aae67 Catch up with the move from mips32/. 2008-09-03 18:40:29 +00:00
David E. O'Brien
69dda689d1 Style(9). 2008-09-03 18:40:02 +00:00
Warner Losh
c3a27a2cf5 White space nit. 2008-08-23 23:44:45 +00:00
John Baldwin
70d12a18f2 Export 'struct pcpu' to userland w/o requiring _KERNEL. A few ports
already define _KERNEL to get to this and I'm about to add hooks to
libkvm to access per-CPU data.

MFC after:	1 week
2008-08-19 19:53:52 +00:00
Tom Rhodes
942df7e765 Document a few sysctls.
Approved by:	imp
2008-08-03 14:11:06 +00:00
Alan Cox
43dcfbc191 In FreeBSD 7.0 and beyond, pmap_growkernel() should pass VM_ALLOC_INTERRUPT
to vm_page_alloc() instead of VM_ALLOC_SYSTEM.
2008-07-07 17:31:02 +00:00
Warner Losh
4d9ac6c76f As discussed on IRC and at BSDcan, move the mips32/* directories up a
level.  The distinction was artificial.  Some more movement around the
deck charis is likely depending on the fallout from this one.

Paths were corrected after the svn mv.  Hope that's OK.
2008-07-06 21:09:29 +00:00
Ed Schouten
721351876c Remove the unused major/minor numbers from iodev and memdev.
Now that st_rdev is being automatically generated by the kernel, there
is no need to define static major/minor numbers for the iodev and
memdev. We still need the minor numbers for the memdev, however, to
distinguish between /dev/mem and /dev/kmem.

Approved by:	philip (mentor)
2008-06-25 07:45:31 +00:00
Wojciech A. Koszek
70e83c4514 Fix spelling of "virtual".
There should be no visible change.

Reviewed by:	rink
2008-06-08 08:56:46 +00:00
Alan Cox
1ec1304bdb Retire pmap_addr_hint(). It is no longer used. 2008-05-18 04:16:57 +00:00
Alan Cox
2d17f90775 Add a stub for pmap_align_superpage() on machines that don't (yet)
implement pmap-level support for superpages.
2008-05-09 23:31:42 +00:00
Oleksandr Tymoshenko
956bb0e01e Add FLT_EVAL_METHOD and DECIMAL_DIG, required by C99 standard.
Approved by:	cognet (mentor)
2008-05-03 21:04:21 +00:00
Warner Losh
71a36ddcef These files are unused, so remove them for now. If they turn out to
be needed later, they can be restored.
2008-05-03 19:57:45 +00:00
Warner Losh
8710c0c16e This file is unused, so remove it for now. 2008-05-02 18:03:00 +00:00
Alan Cox
5c1eb1ac80 Eliminate an unused field from the pmap. 2008-04-30 06:05:36 +00:00
Alan Cox
d72d204094 Remove two unused declarations. These variables are now fields within
vm.h's struct kva_md_info.
2008-04-27 00:10:45 +00:00
Alan Cox
d239bfe45a Remove an XXX comment. sys/amd64/amd64/pmap.c revision 1.516 explains why
"pmap_initialized" no longer exists.
2008-04-27 00:06:01 +00:00
Alan Cox
3086a7a9b4 MFamd64 revision 1.544/i386 revision 1.549
Retire pmap_track_modified().  We no longer need it because we do not
  create managed mappings within the clean submap.  To prevent regressions,
  add assertions blocking the creation of managed mappings within the clean
  submap.

Approved by: imp
2008-04-26 22:39:58 +00:00
Jeff Roberson
6c47aaae12 - Add an integer argument to idle to indicate how likely we are to wake
from idle over the next tick.
 - Add a new MD routine, cpu_wake_idle() to wakeup idle threads who are
   suspended in cpu specific states.  This function can fail and cause the
   scheduler to fall back to another mechanism (ipi).
 - Implement support for mwait in cpu_idle() on i386/amd64 machines that
   support it.  mwait is a higher performance way to synchronize cpus
   as compared to hlt & ipis.
 - Allow selecting the idle routine by name via sysctl machdep.idle.  This
   replaces machdep.cpu_idle_hlt.  Only idle routines supported by the
   current machine are permitted.

Sponsored by:	Nokia
2008-04-25 05:18:50 +00:00
Poul-Henning Kamp
0051271e12 Make genclock standard on all platforms.
Thanks to: grehan & marcel for platform support on ia64 and ppc.
2008-04-21 10:09:55 +00:00
Sam Leffler
b032f27c36 Multi-bss (aka vap) support for 802.11 devices.
Note this includes changes to all drivers and moves some device firmware
loading to use firmware(9) and a separate module (e.g. ral).  Also there
no longer are separate wlan_scan* modules; this functionality is now
bundled into the wlan module.

Supported by:	Hobnob and Marvell
Reviewed by:	many
Obtained from:	Atheros (some bits)
2008-04-20 20:35:46 +00:00
Warner Losh
2f68261c81 This file shows signs of heavy borrowing from NetBSD's cache.c file,
so credit its authors with contributions to this file.  Remove
prototype copyright notice, although one might be warranted if someone
wanted to claim it badly enough.

Noticed by: Simon Burge.
2008-04-15 05:35:00 +00:00
Warner Losh
1e231a9a5a Add copyright notice and license to reflect origin of most of the
routines in this file.  Remove 'place holder' copyright since the
amount that's actually original is small relative to the length of the
file.  The contents of this file appear to have originated at DECWRL
by way of NetBSD.

Noticed by: Simon Burge
2008-04-15 05:31:19 +00:00
Warner Losh
c4738b2d88 This isn't used, so remove it. It isn't relevant to most mips platforms. 2008-04-15 02:50:07 +00:00
Warner Losh
b86c3f2930 Copied from amd64, where it wasn't used, into mips, where it wasn't used.
Remove it.
2008-04-15 02:11:57 +00:00
Warner Losh
ee37bddfd4 Remove $P4$ tag. Rumor has it that p4 importer hates it. 2008-04-15 02:09:28 +00:00
Warner Losh
d40afdf065 fix comments for these files.
Noticed by: stass
2008-04-13 22:04:56 +00:00
Warner Losh
93394f15ba FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors.  There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs.  Other hardware support will be
forthcomcing.

This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...

Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches.  Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch.  Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.

In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
Warner Losh
45d426a34e FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors.  There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs.  Other hardware support will be
forthcomcing.

This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...

Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches.  Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch.  Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.

In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:27:37 +00:00
Warner Losh
2db4962425 FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors.  There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs.  Other hardware support will be
forthcomcing.

This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...

Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches.  Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch.  Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.

In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:07:57 +00:00