scatter-gather XHCI TRB entries for its payload data. The XHCI
controller can handle at least 65536 bytes per scatter-gather list
entry.
MFC after: 1 week
Suggested by: Kohji Okuno <okuno.kohji@jp.panasonic.com>
is called from "xhci_configure_reset_endpoint()". Ensure the 3-strikes
error feature is always enabled except for ISOCHRONOUS transfers.
MFC after: 1 week
Suggested by: marius@
- Simplify MSI allocation to what is actually needed for a single one.
- Release the MSI and the corresponding bus resource as appropriate when
either the interrupt resource cannot be allocated or setting up the
interrupt fails.
- Error out when interrupt allocation or setup fails and polling is
disabled.
- Release the MSI after the corresponding bus resource so the former is
not leaked on detach.
- Remove a redundant softc member.
MFC after: 3 days
re-using a hardware propritary transfer descriptor, PTD, in USB host
mode. If the PTD's are recycled too quickly, it has been observed that
the hardware simply fails to schedule the requested job or resets
completely disconnecting all devices.
SAF1761 OTG driver. Currently the driver logic is very simple and
double buffering the USB transactions is not done. Also you need to
use an external USB high speed USB HUB for reliable FULL speed
outgoing ISOCHRONOUS traffic, because the internal one chokes on
so-called split transfers above 188 bytes.
ports. The current bitmap array was too small to hold more than 16
bits and would at some point toggle the context size, which then would
trigger an enumeration fault and cause a fallback to the EHCI
companion controller, if any.
MFC after: 3 days
- Cleanup some register reads and writes to use existing register
access macros.
- Ensure code which only applies to the control endpoint is not run
for other endpoints in the data transfer path.
MFC after: 3 days
USB 2.0 port mask in addition to the USB 3.0 port mask. The hardware
does not always accept when writing -1U to the port switching
registers.
MFC after: 3 days
Tested by: Huang Wen Hui <huanghwh@gmail.com>
These changes prevent sysctl(8) from returning proper output,
such as:
1) no output from sysctl(8)
2) erroneously returning ENOMEM with tools like truss(1)
or uname(1)
truss: can not get etype: Cannot allocate memory
there is an environment variable which shall initialize the SYSCTL
during early boot. This works for all SYSCTL types both statically and
dynamically created ones, except for the SYSCTL NODE type and SYSCTLs
which belong to VNETs. A new flag, CTLFLAG_NOFETCH, has been added to
be used in the case a tunable sysctl has a custom initialisation
function allowing the sysctl to still be marked as a tunable. The
kernel SYSCTL API is mostly the same, with a few exceptions for some
special operations like iterating childrens of a static/extern SYSCTL
node. This operation should probably be made into a factored out
common macro, hence some device drivers use this. The reason for
changing the SYSCTL API was the need for a SYSCTL parent OID pointer
and not only the SYSCTL parent OID list pointer in order to quickly
generate the sysctl path. The motivation behind this patch is to avoid
parameter loading cludges inside the OFED driver subsystem. Instead of
adding special code to the OFED driver subsystem to post-load tunables
into dynamically created sysctls, we generalize this in the kernel.
Other changes:
- Corrected a possibly incorrect sysctl name from "hw.cbb.intr_mask"
to "hw.pcic.intr_mask".
- Removed redundant TUNABLE statements throughout the kernel.
- Some minor code rewrites in connection to removing not needed
TUNABLE statements.
- Added a missing SYSCTL_DECL().
- Wrapped two very long lines.
- Avoid malloc()/free() inside sysctl string handling, in case it is
called to initialize a sysctl from a tunable, hence malloc()/free() is
not ready when sysctls from the sysctl dataset are registered.
- Bumped FreeBSD version to indicate SYSCTL API change.
MFC after: 2 weeks
Sponsored by: Mellanox Technologies
shutdown by putting the former under !rebooting and turning the latter into
debug messages.
Reviewed by: hps
MFC after: 1 week
Sponsored by: Bally Wulff Games & Entertainment GmbH
on USB HUBs by moving the code into the USB explore threads. The
deadlock happens because child devices of the USB HUB don't have the
expected reference count when called from outside the explore
thread. Only the HUB device itself, which the IOCTL interface locks,
gets the correct reference count.
MFC after: 3 days
- Revert r265427. It appears we are halting the DWC OTG host
controller schedule if we process events only at every SOF. When doing
split transactions we rely on that events are processed quickly and
waiting too long might cause data loss.
- We are not always able to meet the timing requirements of interrupt
endpoint split transactions. Switch from INTERRUPT to CONTROL endpoint
type for interrupt endpoint events until further, hence CONTROL
endpoint events are more relaxed, reducing the chance of data
loss. See comment in code for more in-depth explanation.
- Simplify TT scheduling.
MFC after: 3 days
- Remove double buffering interrupt and isochronous traffic via the
transaction translator. It can be avoided because the DWC OTG will
always delay the start split transactions for interrupt and
isochronous traffic, but will not delay the complete split
transactions, if we set the odd frame bit correctly.
- Need to check the transfer cache field in the device done function
to be sure all allocated channels are freed and not the transfer first
one. This seems to resolve the control endpoint transfer type quirk
which is now removed.
- Make sure any received data upon TX is dumped else RX path will
stop.
- Transmit isochronous data before receiving isochronous data as a
means to optimise the TT schedule.
- Implement a simple TT bandwidth scheduler.
- Cleanup use of old "td->error" variable.
- On interrupt IN traffic via the transaction translator we simply
ignore missed transfer opportunities and silently retry the
transaction upon next available time slot.
MFC after: 3 days
- Update FDT file for BERI DE4 boards.
- Add needed kernel configuration keywords.
- Rename module to saf1761otg so that the device unit number does not
interfere with the hardware ID in dmesg.
Sponsored by: DARPA, AFRL
- Use an interrupt filter for handling the data path interrupts. This
increases the throughput significantly.
- Implement support for USB suspend and resume in USB host mode.
Sponsored by: DARPA, AFRL
- Make the USB hardware skip PTDs which are not allocated.
- Peek host memory twice. Sometimes the PTD status is incorrectly
returned as zero.
- Ensure the host channel is always freed when software TD
is completing.
- Add correct configuration of interrupt polarity and type.
- Set CERR to 2 for asynchronous traffic to avoid having to
reactivate the PTD when a NAK token is received.
- Fix detection of STALL PID.
Sponsored by: DARPA, AFRL
- Put "_LE_" into the register access macros to indicate little endian
byte order is expected by the hardware.
- Avoid using the bounce buffer when not strictly needed. Try to move
data directly using bus-space functions first.
- Ensure we preserve the reserved bits in the power down mode
register. Else the hardware goes into a non-recoverable state.
- Always use 32-bit access when writing or reading registers or FIFOs,
because the hardware is 32-bit oriented and don't really understand 8-
and 16-bit access.
- Correct writes to the memory address register. There is no need to
shift the register offset.
- Correct interval for interrupt endpoints.
- Optimise 90ns internal memory buffer read delay.
- Rename PDT into PTD, which is how the datasheet writes it.
- Add missing programming for activating host controller PTDs.
Sponsored by: DARPA, AFRL
direction isochronous transfers.
- Remove setting of fields which does not belong to the respective
TRBs. These fields are currently set as zero and this is more a
cosmetic change.
MFC after: 3 days
Submitted by: Horse Ma <HMa@wyse.com>
- Need to set the pre-fetch memory address when reading the host memory.
- We currently assume that no endianness conversion is needed.
Sponsored by: DARPA, AFRL
- Implement support for interrupt filters in the DWC OTG driver, to
reduce the amount of CPU task switching when only feeding the FIFOs.
- Add common spinlock to the USB bus structure.
MFC after: 2 weeks
the main processing queue, clear the NAK counter for any associated
BULK or CONTROL transfers and poll the endpoint(s) for 1 millisecond
at 125us rate interval, before going into slow, 10ms, NAK polling mode
again. This has the effect that typical ping-ping protocols respond
quicker when initiated from the USB host.
MFC after: 2 weeks
- For non-periodic traffic we only need to wait two SOFs before
disabling the channel.
- Make sure we release the TX FIFO tracking level after the host
channel is disabled.
- Make sure the host channel state gets reset/disabled initially.
- Two minor code style changes.
MFC after: 2 weeks
- Rework how we allocate and free USB host channels, so that we only
allocate a channel if there is a real packet going out on the USB
cable.
- Use BULK type for control data and status, due to instabilities in
the HW it appears.
- Split FIFO TX levels into one for the periodic FIFO and one for the
non-periodic FIFO.
- Use correct HFNUM mask when scheduling host transactions. The HFNUM
register does not count the full 16-bit range.
- Correct START/COMPLETION slot for TT transactions. For INTERRUPT and
ISOCHRONOUS type transactions the hardware always respects the ODDFRM
bit, which means we need to allocate multiple host channels when
processing such endpoints, to not miss any so-called complete split
opportunities.
- When doing ISOCHRONOUS OUT transfers through a TT send all data
payload in a single ALL-burst. This deacreases the likelyhood for
isochronous data underruns.
- Fixed unbalanced unlock in case of "dwc_otg_init_fifo()" failure.
- Increase interrupt priority.
MFC after: 2 weeks
controller driver by piggybacking the SOF interrupt when issuing new
and checking old transfers. Number of interrupts was reduced by 30%
when doing Isochronous transfers.
Use correct GINTMSK_XXX macros when accessing the DWC OTG interrupt
mask register.
Add code to adjust the frame interval register which influences the
SOF rate.
MFC after: 2 weeks
speed data traffic going directly to a USB device or through a
so-called USB transaction translator.
Add checks that we are not overusing the TX FIFO.
MFC after: 2 weeks
define a few imx_ccm_foo() functions that are implemented by the imx51 or
imx6 ccm code. Of course, the imx6 ccm code is still more a wish than
reality, so for now its implementations just return hard-coded numbers.
about uss820dci_odevd being unused, by adding it to the part that
handles getting descriptors.
Reported by: loos
Reviewed by: hselasky
MFC after: 3 days
should fix DMA descriptor caching issues seen with the EHCI controller
found in Google Chromebook C720 during removal and insertion of USB
devices.
MFC after: 1 week
Reported by: Matthew Dillon at DragonFlyBSD
to check the status property in their probe routines.
Simplebus used to only instantiate its children whose status="okay"
but that was improper behavior, fixed in r261352. Now that it doesn't
check anymore and probes all its children; the children all have to
do the check because really only the children know how to properly
interpret their status property strings.
Right now all existing drivers only understand "okay" versus something-
that's-not-okay, so they all use the new ofw_bus_status_okay() helper.
controller found in the MBP2013 has been observed to not work properly
unless this operation is performed.
MFC after: 1 week
Tested by: Huang Wen Hui <huanghwh@gmail.com>
value. The "Intel Lynx Point" XHCI controller found in the MBP2013 has
been observed to not always set the event interrupt bit while there
are events to consume in the event ring.
MFC after: 1 week
Tested by: Huang Wen Hui <huanghwh@gmail.com>
Some Intel XHCI controlles timeout processing so-called "TRBs" when
the final LINK TRB of a so-called "TD" has the CHAIN-BIT set.
MFC after: 1 week
Tested by: glebius @
receiving Zero Length Packets, ZLPs. See comment in code for more
information.
MFC after: 1 week
Reported by: Kohji Okuno <okuno.kohji@jp.panasonic.com>
shifts into the sign bit. Instead use (1U << 31) which gets the
expected result.
This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.
A similar change was made in OpenBSD.
Discussed with: -arch, rdivacky
Reviewed by: cperciva
than one unit with four busses attached to it. This allows us to use
existing fdt data which describes separate devices with separate resources.
It also allows any combination of the units to be en/disabled in the
board dts files.
Adjust our dts code to match what's used by linux and u-boot now that
we're structured to do so.
Document lots of interesting stuff learned whiling doing this with a big
comment block in the driver, so I don't have to re-learn it for the next
round of changes.
and not 8-bit. Fix support for isochronous transfers in USB host mode.
Fix a whitespace while at it.
MFC after: 1 week
Reported by: SAITOU Toshihide <toshi@ruby.ocn.ne.jp>
PR: usb/181987
routing if we get certain errors. Poll for command completion upon
command timeouts. The XHCI error events might not generate interrupts.
MFC after: 1 week
Reported by: Daniel Gerzo <danger@rulez.sk>, Antonis Anastasiadis <anastasiadis@datalive.gr>
PR: usb/181159
Approved by: re (gjb)
IMAN register to clear the pending interrupt status bits. This patch
tries to solve problems seen on the MacBook Air, as reported by
Johannes Lundberg <johannes@brilliantservice.co.jp>
MFC after: 1 week
The Block Event Interrupts, BEI, feature does not
work like expected with the Renesas XHCI chipsets.
Revert feature.
While at it correct the TD SIZE computation in
case of Zero Length Packet, ZLP, in the end of a
multi frame USB transfer.
MFC after: 1 week
PR: usb/180726
1) Only multi-TD isochronous transfers should use NORMAL
type after specific type as per XHCI specification.
2) BEI bit is only available in NORMAL and ISOCHRONOUS
TRB types. Don't use this bit for other types to avoid
hardware asserts. Reserved bits should be don't care
though ...
MFC after: 1 week
PR: usb/179342
the regular interrupt handler is not working properly or
in case of MSI interrupts which are not yet supported.
Remove interrupt setup code for FreeBSD versions older
than 700031.
MFC after: 1 week
PR: usb/179342
controller hardware most likely present on UHCI chipsets aswell. The
bug manifests itself when issuing isochronous transfers and bulk
transfers towards the same device simultaneously. From time to time it
happens that either the completion IRQ was missing or that the
completion IRQ was happening before the ITD/SITD was completely
written back to memory. The workaround assumes that double buffered
isochronous transfers are used, and that a second interrupt is
generated at the beginning of the next isochronous transfer to
complete the previous one. Possibly skipping the interrupt at the last
isochronous frame is possible, but will then break single buffered
isochronous transfers. For now we can live with some extra interrupts.
MFC after: 1 week
enumeration lock. Make sure all callers of usbd_enum_lock() check the return
value. Remove the control transfer specific lock. Bump the FreeBSD version
number, hence external USB modules may need to be recompiled due to a USB
device structure change.
MFC after: 1 week
into the FreeBSD boot loader, typically for non-USB aware BIOSes, EFI systems
or embedded platforms. This is also useful for out of the system compilation
of the FreeBSD USB stack for various purposes. The USB kernel files can
now optionally include a global header file which should include all needed
definitions required to compile the FreeBSD USB stack. When the global USB
header file is included, no other USB header files will be included by
default.
Add new file containing the USB stack configuration for the
FreeBSD loader build.
Replace some __FBSDID()'s by /* $FreeBSD$ */ comments. Now all
USB files follow the same style.
Use cases:
- console in loader via USB
- loading kernel via USB
Discussed with: Hiroki Sato, hrs @ EuroBSDCon
This patch will save CPU time when the XHCI interrupt is
shared with other devices.
Only check event rings when interrupt bits are set.
Otherwise would indicate hiding possible hardware fault(s).
Tested by: sos @
Submitted by: sos @
MFC after: 1 week
This brand of controllers expects that the number of
contexts specified in the input slot context points
to an active endpoint context, else it refuses to
operate.
- Ring the correct doorbell when streams mode is used.
- Wrap one or two long lines.
Tested by: Markus Pfeiffer (DragonFlyBSD)
MFC after: 1 week
