This patch adds SDP packet parsing support with custom L2 header,
adds support to include a field from custom header for flow tag
generation.
Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
When an application invokes rte_eth_dev_configure consecutively without
setting up Rx/Tx queues, it will incorrectly return error while trying
to restore Rx/Tx queue configuration.
Fix configuration sequence by checking if any Rx/Tx queues are
previously configured before trying to restore them.
Fixes: 548b5839a3 ("net/octeontx2: add device configure operation")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add Traffic Management capability callbacks to provide
global, level and node capabilities. This patch also
adds documentation on Traffic Management Support.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add Tx queue ratelimiting support. This support is mutually
exclusive with TM support i.e when TM is configured, tx queue
ratelimiting config is no more valid.
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add debug support to TM to dump configured topology
and registers. Also enable debug dump when sq flush fails.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Add dynamic parent and shaper update callbacks that
can be used to change RR Quantum or PIR/CIR rate dynamically
post hierarchy commit. Dynamic parent update callback only
supports updating RR quantum of a given child with respect to
its parent. There is no support yet to change priority or parent
itself.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Add TM support for stats read and private shaper
profile addition or deletion.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Add TM hierarchy commit callback to support enabling
newly created topology.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Add TM support to suspend and resume nodes post hierarchy
commit.
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Adds support to Traffic Management callbacks "node_add"
and "node_delete". These callbacks doesn't support
dynamic node addition or deletion post hierarchy commit.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Modify resource allocation and freeing logic to support
dynamic topology commit while to traffic is flowing.
This patch also modifies SQ flush to timeout based on minimum shaper
rate configured. SQ flush is further split to pre/post
functions to adhere to HW spec of 96XX C0.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Restructure traffic manager helper function by splitting to
multiple sets of register configurations like shaping, scheduling
and topology config.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Configure NIX_AF_TL3_TL2X_LINKX_CFG using schq at
level based on NIX_AF_PSE_CHANNEL_LEVEL[BP_LEVEL].
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Adding support to configure link attributes like speed,
duplex, negotiation.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Patch adds routines to set/clear nix lf error & ras interrupt enable
registers. These nix lf error interrupts get triggered if there are
any failures during nix lf configuration. This interrupts are enabled
before any hardware configurations initiated on the allocated nix lf.
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Andrzej Ostruszka <aostruszka@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
This patch implements rx/tx checksum offload. In case of
wrong checksum received (inner/outer l3/l4) it reports the
corresponding layer which has bad checksum and also corrects
it if hw checksum is enabled on tx side.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Adding support for setting link up/down eth operation.
It is used to enable disable lmac. Also implemented a
poll function for getting the link status at regular
intervals.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Patch adds support for vlan filter offload support.
MBOX messages for vlan filter on/off and vlan filter
entry add/rm are added to configure PCAM entries to
filter out the vlan traffic on a given port.
Patch also defines rx_offload_flag for vlan filtering.
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Harman Kalra <hkalra@marvell.com>
Adding macro based framework to hook rx/tx burst function
pointers to the appropriate function based on rx/tx offloads.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Adding multi segment support to the octeontx PMD. Also
adding the logic to share rx/tx ofloads with the eventdev
code.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Octeontx2 HW has support for detecting the bad L2/L3/L4 UDP lengths.
Since DPDK does not have specific error flag for this, exposing it
as bad checksum failure in mbuff:ol_flags to leverage this feature.
These errors will be propagated to the ol_flags as follows.
L2 length error ==> (PKT_RX_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD).
Both Outer and Inner L3 length error ==> PKT_RX_IP_CKSUM_BAD.
Outer L4 UDP length/port error ==> PKT_RX_OUTER_L4_CKSUM_BAD.
Inner L4 UDP length/port error ==> PKT_RX_L4_CKSUM_BAD.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add a condition to check if octeontx drivers are disabled.
octeontx drivers are built only if dependent drivers i.e.
ethdev, mempool and common/octeontx are enabled.
Bugzilla ID: 387
Fixes: 7f615033d6 ("drivers/net: build Cavium NIC PMDs with meson")
Cc: stable@dpdk.org
Signed-off-by: Amit Gupta <agupta3@marvell.com>
Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Harman Kalra <hkalra@marvell.com>
Sync mail box data structures to version 0x0005 to
that of kernel AF driver.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
The assert checks is not necessary, the gso_ctx is always non-NULL.
Fixes: 050316a883 ("net/tap: support TSO (TCP Segment Offload)")
Cc: stable@dpdk.org
Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Check that unknown unicast and unknown multicast filters are
applied and return an error if they are not applied. The error
is used in promiscuous and all multicast mode enable and disable
callbacks.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Unknown unicast filter creation may fail because of insufficient
permissions on VF. This failure is handled internally in libefx MAC
reconfiguration without any way for a user to know if it happened.
Making the MAC reconfiguration forward error code of filter
reconfiguration would be too destructive to the existing code
that may rely on the function never returning that error.
Add an API for getting the status of current unknown unicast and
all multicast filters since user must know that requested
filters are actually applied.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Refactor the multicast filter reconfiguration stage of the reconfigure
function to make it clearer and allow for more convenient further
changes.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Refactor the unicast filter reconfiguration stage of the reconfigure
function to make it clearer and allow for more convenient further
changes.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Refactor the filters mark stage of the reconfigure function
to make it clearer and allow for more convenient further changes.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Refactor the filters cleanup stage of the reconfigure function
to make it clearer and allow for more convenient further changes.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
The driver wrongly assumed the presence of at least one rxmac in every
firmware and accessed to non-existing unit
Signed-off-by: Martin Spinler <spinler@cesnet.cz>
Acked-by: Jakub Neruda <neruda@netcope.com>
(Picked up from @Charles Myers patch
https://patchwork.dpdk.org/patch/57771/)
When the mtu_set() function is not implemented, rte_eth_dev_set_mtu()
fails with -ENOTSUP and mtu is not stored in the mtu field in the
rte_eth_dev_data. This causes the mtu in Vmxnet3_MiscConf which is
shared with hypervisor to always be set to 1500.
This may cause issues receiving jumbo frames on Enhanced Data Path
N-VDS.
Signed-off-by: Eduard Serra <eserra@vmware.com>
Acked-by: Yong Wang <yongwang@vmware.com>
Due to the restriction of the flag I40E_FLAG_VF_MAC_BY_PF,
VF cannot program the MAC address.
In order to solve this inflexibility, the use of I40E_FLAG_VF_MAC_BY_PF
has been deleted in the code implementation to ensure that
VF can flexibly program the MAC address.
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
The ice_memdup doesn't check the new allocated memory pointer, it calls
the rte_memcpy directly. It should check it.
Fixes: 5f0978e962 ("net/ice/base: add OS specific implementation")
Cc: stable@dpdk.org
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Remove vector path feature list, if a feature only be supported
in non-vector path, use "P" to represent.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
Remove vector path feature list, if a feature only be supported
in non-vector path, use "P" to represent.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
Remove vector path feature list, if a feature only be supported
in non-vector path, use "P" to represent.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
Remove vector path feature list, if a feature only be supported
in non-vector path, use "P" to represent.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
Add support for PFCP, L2TP, ESP and AH RSS enabling.
Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Take network order for gtpu fdir filter.
Fixes: b5c274f4e2 ("net/ice/base: support FDIR for GTPU QFI field")
Cc: stable@dpdk.org
Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Change ice_set_fd_desc_val to static, since it only be used
internally.
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
This patch add support switch rule for PFCP and NAT-T
packet base on profile rule, PFCP and NAT-T packet will not
be matched on any packet fields, but instead matches
the profile that the packet hits in the switch block.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Move some macro from ice_switch.c to ice_switch.h. Currently this
is only required by kernel driver, DPDK just to sync the code.
Signed-off-by: Xiao Zhang <xiao.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
ICE_BLK_FD and ICE_BLK_RSS are executing the same code so group the case
statements together instead of duplicating code for each block.
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
A race condition between FW and SW can occur between admin queue setup
and the first command sent. A link event may occur and FW attempts to
notify a non-existent queue. FW will set the critical error bit and
disable the queue. When this happens retry queue setup.
Signed-off-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
A GTPU header can stack with a extend header or not, while
current implementation does not allow HDR bit sets like below:
ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_EH
ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_UP
ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_DWN
Which is not convenient for upper layer flow parser to
generate correct HDR bit.
but it could be if we have below assumptions:
ICE_FLOW_SEG_HDR_GTPU_DWN -- for GTPU with extend header down link
ICE_FLOW_SEG_HDR_GTPU_UP -- for GTPU with extend header up link
ICE_FLOW_SEG_HDR_GTPU_EH -- for GTPU with any extend header
ICE_FLOW_SEG_HDR_GTPU_IP -- for any GTPU header, but when it combined
with any above it downgrade to a dummy one.
And handle from specific case to generic case will hit all the cases
as expected.
if else (hdr & ICE_FLOW_SEG_HDR_GTPU_DWN) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_UP) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_EH) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_IP {
...
}
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
