phy-mode can be one of: rgmii, rgmii-id, rgmii-txid, rgmii-rxid; as this was
written, any of these alternate -id configurations would break as we fail to
configure syscon for rgmii. Instead, simply check that phy-mode is
configured for rgmii and we'll let the PHY driver handle any internal delay
configuration.
The pine64 should eventually specify phy-mode = "rgmii-txid" to address
gigabit issues when rx delay is configured, motivating this change.
This reduces noise when kernel is compiled by newer GCC versions,
such as one used by external toolchain ports.
Reviewed by: kib, andrew(sys/arm and sys/arm64), emaste(partial), erj(partial)
Reviewed by: jhb (sys/dev/pci/* sys/kern/vfs_aio.c and sys/kern/kern_synch.c)
Differential Revision: https://reviews.freebsd.org/D10385
Rather than relying on 'cluster' existing in the context they're used in,
use the argument name.
Differential Revision: https://reviews.freebsd.org/D12931
This fixes some regulator issues with a83t/BananaPi-M3; the pin value was
getting clobbered as we reconfigured the pin when initializing the
regulator.
Discussed with: ian
Recent DTS (from Linux 4.14) specify a compatible "allwinner,sun50i-h5-ccu"
for H5 SoC. Since we get the DTB from u-boot this wasn't noticed.
Add the compatible so later version of u-boot will not fail for us.
a10_gpio previously accepted only {allwinner,}drive and {allwinner,}pull for
drive/bias setting, while newer DTS is using drive-strength and
bias-{disable,pull-up,pull-down} properties. Accept these properties as
well.
Additionally make bias and drive strength optional rather than required; not
setting them should just indicate that we do not need to configure these
properties.
Tested on: BananaPi-M3 (a83t)
Reviewed by: manu
Approved by: emaste (implicit)
Obtained from: NetBSD (partially)
Differential Revision: https://reviews.freebsd.org/D13284
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.
The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
Originally a patch by Mark Millard, augmented with information from work
done on NetBSD by jmcneill@.
Submitted by: Mark Millard (markmi@dsl-only.net)
Reviewed by: emaste, manu
Approved by: emaste (mentor)
Differential Revision: https://reviews.freebsd.org/D13240
The r-ccu on the a83t differs from the others only by what it names the
ar100 parents. Export the _CCU macros (now converted to an enu) so that
ccu_sun8i_r can differentiate between a83t r-ccu and the others, then add
the compat string for the a83t r-ccu.
Reviewed by: manu
Approved by: emaste (mentor, implicit)
Differential Revision: https://reviews.freebsd.org/D13206
A ccu driver was added for the a83t in r326114. Add compat string to
aw_ccung and register the clocks for the a83t upon attach.
Reviewed by: manu
Approved by: emaste (mentor, implicit)
Differential Revision: https://reviews.freebsd.org/D13205
Upstream DTS has switched to using CCU rather than /clocks nodes. Add a CCU
driver for the a83t to bring us closer to upstream, but don't yet attach it
to ccu node.
Reviewed by: manu
Approved by: emaste (mentor)
Differential Revision: https://reviews.freebsd.org/D12843
Add a means to specify mask/value for the prediv condition instead of
shift/width/value for clocks that have a more complex mux scenario.
Specifically, ahb1 on the a83t has the prediv applied if mux is either b10
or b11.
Reviewed by: manu
Approved by: emaste (mentor)
Differential Revision: https://reviews.freebsd.org/D12851
We currently support the a83t's r_intc in a somewhat hack-ish way; our .dts
describes it as nmi_intc, and uses a subset of the actual register space to
make it line up with a20/a31 nmi offsets.
This breaks with the recent 4.14 update describing r_intc using the full
register space, so update aw_nmi to use the correct register offsets with
the right compat data in a way that doesn't break our current dts with
nmi_intc or upstream with r_intc described.
Reviewed by: manu
Approved by: emaste (mentor)
Differential Revision: https://reviews.freebsd.org/D13122
Stale packets should not be transmitted when the interface comes up after being down.
Count the successfully transmitted ones for statistics and drop the rest.
Submitted by: Guy Yur <guyyur@gmail.com>
Differential Revision: https://reviews.freebsd.org/D12539
Use a spare dma map when attempting to map a new mbuf on the rx path.
If the mbuf allocation fails or the dma map loading for the new mbuf fails just reuse the old mbuf
and increase the drop counter.
Submitted by: Guy Yur <guyyur@gmail.com>
Differential Revision: https://reviews.freebsd.org/D12538
- use awg_encap and awg_txeof names to match iflib and other network drivers.
- handle m_collapse failure similarly by freeing the mbuf rather than reenqueuing it where it will continue to fail.
Submitted by: Guy Yur <guyyur@gmail.com>
Differential Revision: https://reviews.freebsd.org/D13035
TX_BUF_UA_INT is set when there are no buffers to transmit and can
happen before hw.awg.tx_interval segments have been transmitted.
To reduce load, tx cleanup should be done in hw.awg.tx_interval intervals.
Submitted by: Guy Yur <guyyur@gmail.com>
Differential Revision: https://reviews.freebsd.org/D13034
A packet may be built from multiple segments, don't increase the count for each segment
Submitted by: Guy Yur <guyyur@gmail.com>
Differential Revision: https://reviews.freebsd.org/D13032
According to the datasheet, TX_DESC_CTL is cleared when whole frame is transmitted or all
data in the current descriptor's buffer are transmitted.
When the mbuf and mapping are stored in the first segment and in a scenario where a tx
completion interrupt arrives for a frame and only the start of the next frame was transmitted,
at the time of interrupt processing the mbuf and mapping will be freed when processing the
first segment of the next frame but the other untrasmitted segments still need to use them.
Submitted by: Guy Yur <guyyur@gmail.com>
Differential Revision: https://reviews.freebsd.org/D13031
In a multi segment frame, if the first tx descriptor is marked with TX_DESC_CTL
but not all tx descriptors for the other segments in the frame are set up,
the TX DMA may transmit an incomplete frame.
To prevent this, set TX_DESC_CTL for the first tx descriptor only when done
with all the other segments.
Also, don't bother cleaning transmitted tx descriptors since TX_DESC_CTL
is cleared for them by the hardware and they will be reprogrammed before
TX_DESC_CTL is reenabled for them.
Submitted by: Guy Yur <guyyur@gmail.com>
Differential Revision: https://reviews.freebsd.org/D13030
The hardware will not issue a completion interrupt for a descriptor
with TX_INT_CTL set if it doesn't also have TX_LAST_DESC set.
Submitted by: Guy Yur <guyyur_gmail.com>
Differential Revision: https://reviews.freebsd.org/D13029
DTS files switch from clocks under /clocks to a ccu (Clock Controller Unit)
a while ago.
Restore A13 functionality by adding a clock driver for it.
Almost every clocks are handled, the missing ones are mostly video related
clocks.
Tested On: A13 Olinuxino
Under certain traffic pattern awg driver does not recover from TX queue
full condition. The actual source of the problem is not identified yet
but jmcneill@ agreed that bumping TX_MAX_SEGS to 20 is OK as a workaround
for the problem (NetBSD has it set to 128).
Also add some diagnostic printfs to prevent silent failure of bus_dma
functions in the future
PR will be kept open until root cause of the issue is identified and fixed
PR: 219927
Submitted by: Tom Vijlbrief <tvijlbrief@gmail.com>
Approved by: jmcneill
MFC after: 2 weeks
It doesn't seems to be needed anymore and this make ehci working again
on the Pine64.
Thanks to jmcneill@ for the help.
Tested on: Pine64 (A64), OrangePi One (H3), BananapiM2 (A31s)
SUN8I and SUN50I (H3, H5, A83T and A64) have a second clock controller
unit. It controls the clocks for the second gpio controller, the IR
controller etc ...
Support for A83T is not supported.
Tested On: OrangePi One, Pine64
Transition all boards that support arm cortex CPUs to armv7. This
leaves two armv6 kernels in the tree. RPI-B, which uses the BCM2835
which has a ARM1176 core, and VERSATILEPB, which is a qemu board setup
around the time RPI-B went in. Copy std.armv6 to std.armv7, even
though that duplicates a lot of stuff. More work needs to be done to
sort out the duplication.
Differential Revision: https://reviews.freebsd.org/D12027
ccu_h3.c is also used on ARM64 as it provides clocks for the H5 SoC.
Since ARM64 doesn't have sys/gun/dts/include in it's include path, use
the full name for the sun8i-h3-ccu.h include.
Reported by: andreast
Do not redefines resets and clocks ID which are already in the
dt-bindings include directory. Those files are under dual licenced
under GPL2/MIT so use them directly.
Do not redefines resets and clocks ID which are already in the
dt-bindings include directory. Those files are under dual licenced
under GPL2/MIT so use them directly.
Do not redefines resets and clocks ID which are already in the
dt-bindings include directory. Those files are under dual licence
GPL2/MIT so use them directly.
attachment code for various SOCs and busses. Remove all the static and
should-have-been-static and named-differently instances of it.
This should eliminate the recently-grown build warnings about multiple
definitions when building arm kernels.
Some SoC require a write to a unknown register to work corectly.
This write should be in the pmu region not in the phy ctrl one.
Reported by: Mark Millard (markmi@dsl-only.net)
The usbphy node for allwinner have two kind of resources, one for the
phy_ctrl and one per phy. Instead of blindy allocating resources, alloc
the phy_ctrl and pmu ones separately.
Also add a configuration struct for all different phy that hold the difference
between them (number of phys, unknow needed register write etc ...).
While here remove A83T code as upstream and FreeBSD dts don't have
nodes for USB.
This (plus 323640) re-enable OHCI on Pine64 on the bottom USB port.
The top USB port is routed to the OHCI0/EHCI0 which is by default in OTG mode.
While the phy code can handle the re-route to standard OHCI/EHCI we still need
a driver for musb to probe and configure it in host mode.
EHCI is still buggy on Pine64 (hang the board) so do not enable it for now.
Tested On: Bananapi (A20), BananapiM2 (A31S), OrangePi One (H3) Pine64 (A64)
r323392 introduce gpio_pin_get/gpio_pin_set for a10_gpio driver.
When called via gpio method they must aquire the device lock while
when they are called via gpio_pin_configure the lock is already aquire.
Introduce a10_gpio_pin_{s,g}et_locked and call them in pin_gpio_configure
instead.
Tested On: BananaPi (A20)
Reported by: Richard Puga richard@puga.net
Sometimes it is necessary to combine several gpio pins into an ad-hoc bus
and manipulate the pins as a group. In such cases manipulating the pins
individualy is not an option, because the value on the "bus" assumes
potentially-invalid intermediate values as each pin is changed in turn. Note
that the "bus" may be something as simple as a bi-color LED where changing
colors requires changing both gpio pins at once, or something as complex as
a bitbanged multiplexed address/data bus connected to a microcontroller.
In addition to the absolute requirement of simultaneously changing the
output values of driven pins, a desirable feature of these new methods is to
provide a higher-performance mechanism for reading and writing multiple
pins, especially from userland where pin-at-a-time access incurs a noticible
syscall time penalty.
These new interfaces are NOT intended to abstract away all the ugly details
of how gpio is implemented on any given platform. In fact, to use these
properly you absolutely must know something about how the gpio hardware is
organized. Typically there are "banks" of gpio pins controlled by registers
which group several pins together. A bank may be as small as 2 pins or as
big as "all the pins on the device, hundreds of them." In the latter case, a
driver might support this interface by allowing access to any 32 adjacent
pins within the overall collection. Or, more likely, any 32 adjacent pins
starting at any multiple of 32. Whatever the hardware restrictions may be,
you would need to understand them to use this interface.
In additional to defining the interfaces, two example implementations are
included here, for imx5/6, and allwinner. These represent the two primary
types of gpio hardware drivers. imx6 has multiple gpio devices, each
implementing a single bank of 32 pins. Allwinner implements a single large
gpio number space from 1-n pins, and the driver internally translates that
linear number space to a bank+pin scheme based on how the pins are grouped
into control registers. The allwinner implementation imposes the restriction
that the first_pin argument to the new functions must always be pin 0 of a
bank.
Differential Revision: https://reviews.freebsd.org/D11810
If we cannot get a phy, do not detach the driver, some boards have phy
always enabled and not exposed.
While here do not release the clocks if we fails as we release them
in a10_ehci_detach.
Tested-on: OrangePi-One
Upstream DTS for A64 SoC doesn't provide a /clocks node as Linux switched
to ccu-ng
This commit adds the necessary bits to boot on pine64 with latest DTS from
upstream.
USB is not working for now and some node aren't present in the DTS (like the
PMU, Power Management Unit).
Tested on: Pine64
H2+ SoC is a stripped down version of H3 without gigabit ethernet and 4K HDMI.
Also add sun8i-h2-plus-orangepi-zero.dts to the build as we run on this board.
Starting with DTS from Linux 4.11, the pins list, function, drive and pull
are no longer prefixed with "allwinner,".
Allow the pinctrl driver to handle both case.
as kernel drivers and their dependency onto mmc(4); this allows for
incrementing the mmc(4) module version but also for entire omission
of these bridge declarations for mmccam(4) in a single place, i. e.
in dev/mmc/bridge.h.
comments, marking unused parameters as such, style(9), whitespace,
etc.
o In the mmc(4) bridges and sdhci(4) (bus) front-ends:
- Remove redundant assignments of the default bus_generic_print_child
device method (I've whipped these out of the tree as part of r227843
once, but they keep coming back ...),
- use DEVMETHOD_END,
- use NULL instead of 0 for pointers.
o Trim/adjust includes.
This adds clocks support for the aw_ccung on the A31 SoC.
Newer DTS files require this.
All the clocks except two CSI are defined and exported on the clock domain.
The PLL_DDR clock have an update bit which need to be set after changing
the value, add the possibility to define one for NKMP clocks.
This allow us to add the missing clocks.
We now have the full list of clocks created under the clock domain.
Since Linux 4.9-4.10 DTS doesn't have clocks under /clocks but only a ccu node.
Currently only H3 is supported with almost the same state as HEAD.
(video pll aren't supported for now but we don't support video).
This driver and clocks will also be used for other SoC (A64, A31, H5, H2 etc ...)
Reviewed by: jmcneill
Differential Revision: https://reviews.freebsd.org/D9517
- Use new option SMP_ON_UP instead of (mis)using specific CPU type.
By this, any SMP kernel can be compiled with SMP_ON_UP support.
- Enable runtime detection of CPU multiprocessor extensions only
if SMP_ON_UP option is used. In other cases (pure SMP or UP),
statically compile only required variant.
- Don't leak multiprocessor instructions to UP kernel.
- Correctly handle data cache write back to point of unification.
DCCMVAU is supported on all armv7 cpus.
- For SMP_ON_UP kernels, detect proper TTB flags on runtime.
Differential Revision: https://reviews.freebsd.org/D9133
Add basic support for A33/R16 that is enough to boot a kernel.
This adds the platform code, padconf data and the new clocks strings.
MFC after: 2 weeks
file and add a generic DT binding that takes advantage of the extres
framework for setting up clocks.
Reviewed by: gonzo
Differential Revision: https://reviews.freebsd.org/D8826
Replace them with a default handler that returns devmap_lastaddr.
Reviewed by: mmel
Sponsored by: ABT Systems Ltd
Differential Revision: https://reviews.freebsd.org/D8806
can be selected for it. If the desired frequency is one of those two, use
this mode instead of the integer one.
When calculating the PLL3 freq for the dotclock, check if it is a multiple
of the fracional frequencies.
MFC after: 2 weeks
The audio controller in the H3 is more or less the same as A10/A20 except
some registers are shuffled around. The mixer interface, however, is
completely different between SoCs. Separate a10_mixer_class and
h3_mixer_class implementations are now made available. This will also make
adding support for other SoCs easier in the future.
Reviewed by: andrew, ganbold
Relnotes: yes
Differential Revision: https://reviews.freebsd.org/D8425
PLL1 is used by the cpu core, allowing changing freq is needed for cpufreq.
The factors table contains all the frequencies in the operating point table
present in the DTS.
MFC after: 1 week
Push-Pull Two Wire interface is a almost compatible iic like bus used
in sun6i SoC. It's only use is to communicate with the power management IC.
Reviewed by: jmcneill
MFC after: 1 week
Relnotes: yes
prevent overheating.
When sensor 0's alarm interrupt is fired, set a throttle flag. Further
requests to set CPU frequency will be rejected until sensor 0's temperature
returns to a level below the hot temperature threshold.
Relnotes: yes
When detaching device trees parent devices must be detached prior to
detaching its children. This is because parent devices can have
pointers to the child devices in their softcs which are not
invalidated by device_delete_child(). This can cause use after free
issues and panic().
Device drivers implementing trees, must ensure its detach function
detaches or deletes all its children before returning.
While at it remove now redundant device_detach() calls before
device_delete_child() and device_delete_children(), mostly in
the USB controller drivers.
Tested by: Jan Henrik Sylvester <me@janh.de>
Reviewed by: jhb
Differential Revision: https://reviews.freebsd.org/D8070
MFC after: 2 weeks
for later Cortex-A CPUs that support the Multiprocessor Extensions. This
will be needed to support both in a single GENERIC kernel while still
being able to only build for a single SoC.
Reviewed by: mmel
Relnotes: yes
Sponsored by: ABT Systems Ltd
Differential Revision: https://reviews.freebsd.org/D8138
Rename registers as in the manual.
Do a hard reset of the controller before a soft one.
Since DMA is always used remove dependancy on allwinner_soc_family, it was used
to differentiate SoC as the fdt compatible string were the same.
Tested on A10, A20, H3 and A64.
Reviewed by: jmcneill
Differential Revision: https://reviews.freebsd.org/D6868
