Commit Graph

16339 Commits

Author SHA1 Message Date
Robin Zhang
a97974f986 net/iavf: remove i40evf devargs option
Due to i40evf will be removed, so there's no need to keep the devargs
option "driver=i40evf" in iavf.

Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-10-05 12:31:37 +02:00
Alvin Zhang
02f688532e net/iavf: support IPv4/L4 checksum RSS offload
Add supports for RSS_IPV4_CHKSUM & RSS_L4_CHKSUM RSS offload types
in RSS flow.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-24 13:05:45 +02:00
Alvin Zhang
58aaf49d35 common/iavf: enable hash calculation based on IPv4 checksum
Add IPv4 header checksum field selector, it can be used in creating
FDIR or RSS rules related to IPv4 header checksum.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-24 13:05:19 +02:00
Alvin Zhang
e495e930a9 net/ice: support IPv4/L4 checksum RSS offload
Add supports for RSS_IPV4_CHKSUM & RSS_L4_CHKSUM RSS offload types
in RSS flow.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-24 12:57:42 +02:00
Alvin Zhang
78ac66e57d net/ice: support low Rx latency
This patch adds a devarg parameter to enable/disable low Rx latency.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-24 12:54:24 +02:00
Dapeng Yu
e360df5647 net/ice: fix double free ACL flow entry
If call ice_flow_rem_entry() directly without checking entry_id, may
cause an ACL flow entry to be freed more than once.

This patch tries to find entry_id first, then call ice_flow_rem_entry()
to avoid the defect.

Fixes: 40d466fa9f ("net/ice: support ACL filter in DCF")
Cc: stable@dpdk.org

Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Reviewed-by: Simei Su <simei.su@intel.com>
2021-09-24 07:46:57 +02:00
Qiming Chen
de5bef335e net/iavf: fix high CPU usage on frequent command
There is currently a scenario test, which will continuously obtain port
statistics, causing the CPU usage to soar, which does not meet the
demand. After positioning analysis, it is found that the VF and PF
command interaction is completed through the iavf_execute_vf_cmd
function.
After the message is sent, it needs to wait for the interrupt thread to
obtain the response from the PF. For the data, the rte_delay_ms
interface is used here to wait, but the CPU will not be released during
the waiting period of this interface, which will cause the statistics to
keep occupying the CPU. This is also the root cause of the soaring CPU.

The command interaction should belong to the control plane, and there
will not be too high requirements for performance. It is recommended to
wait for the interface iavf_msec_delay to complete without taking up the
CPU time.

Fixes: 22b123a36d ("net/avf: initialize PMD")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-24 07:44:37 +02:00
David Marchand
db48aaa234 net/virtio: do not use PMD log type
Fixes: 1982462ead ("net/virtio: add Rx free threshold setting")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-28 21:23:00 +02:00
Thomas Monjalon
f3854eba81 net/virtio: remove blank lines in log
The macros PMD_*_LOG already include the line feed character.
Redundant \n are removed.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2021-09-28 21:23:00 +02:00
Ivan Ilchenko
492a239cbf net/virtio: report Tx descriptor limits in dev info
Report max/min/align Tx descriptors limits in device info get callback.
Before calling the callback, rte_eth_dev_info_get() provides
default values of nb_min as zero and nb_max as UINT16_MAX that are
not correct for the driver, so one can't rely on them.

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-28 21:23:00 +02:00
Xueming Li
f5d4c81937 net/virtio: wait device ready during reset
According to virtio spec, the device MUST reset when 0 is written to
device_status, and present 0 in device_status once reset is done.

This patch waits status value to be 0 during reset operation, if
timeout in 3 seconds, log and continue.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2021-09-28 17:26:50 +02:00
Ivan Ilchenko
9de76dfb92 net/virtio: fix Tx completed mbuf leak on device stop
Free Tx completed mbufs on device stop. Not completed Tx mbufs cannot be
freed since they are still in use.

Fixes: c1f86306a0 ("virtio: add new driver")
Cc: stable@dpdk.org

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-28 17:26:50 +02:00
Ivan Ilchenko
e2ca43a35e net/virtio: fix Tx cleanup functions to have same signature
There is a family of cleanup from completed transmits functions.
Fix packed virtqueues cleanup functions to have the same signature
as split virtqueues have. This lets all functions of the family to
match the same callback prototype.

Fixes: 892dc798fa ("net/virtio: implement Tx path for packed queues")
Cc: stable@dpdk.org

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-28 17:26:50 +02:00
Satheesh Paul
0cc909cc07 common/cnxk: support merging base steering rule
This patch adds an ROC API to merge base steering rule with rules
added by VF.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2021-09-28 15:41:30 +02:00
Tomasz Duszynski
f1704016db raw/cnxk_bphy: support reading NPA/SSO PF function
Add support for reading NPA/SSO pf_func which will be used
by a PSM to access NPA/SSO. PSM is a hardware block capable
of dispatching jobs to different blocks within a baseband
module.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-09-28 15:16:28 +02:00
Tomasz Duszynski
84a972a54b common/cnxk: support reading NPA/SSO PF function
Add support for reading NPA/SSO pf_func which will be used
by a PSM to access NPA/SSO. PSM is a hardware block capable
of dispatching jobs to different blocks within a baseband
module.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-09-28 15:16:13 +02:00
Tomasz Duszynski
f282af588a raw/cnxk_bphy: fix device lookup
Name needs to be prepared before the lookup otherwise
PMD will not be released.

Fixes: 24d9c5d59d ("raw/cnxk_bphy: add baseband PHY skeleton driver")
Cc: stable@dpdk.org

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-09-28 15:15:55 +02:00
Harman Kalra
11bb961c01 common/octeontx2: fix link event message size
Due to wrong size of mbox message allocated for sending link status
to the VF, incorrect link status is observed.

Fixes: cb8d769fb6 ("common/octeontx2: send link event to VF")
Cc: stable@dpdk.org

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-28 14:21:13 +02:00
Harman Kalra
8b9f07b8a4 common/cnxk: update NPC MACM range for cn98xx
NPC MCAM entry distribution is based on maximum number of PFs and LFs
available. Fixing the max no of PFs and LFs available on cn98xx to
fix the MCAM alloc entry range.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-28 12:09:14 +02:00
Harman Kalra
70cf1c6342 common/cnxk: support loop mode for cn98xx
In case of cn98xx, 2 NIX blocks and 4 LBK blocks are present. Moreover
AF VFs are alternatively attached to NIX0 and NIX1 to ensure load
balancing. To support loopback functionality between pairs NIX0/NIX1
are attached to LBK1/LBK2 for transmission/reception respectively.
But in this default configuration NIX blocks cannot receive the
packets they sent from the same LBK, which is an important requirement
as some ODP applications only uses one AF VF for loopback functionality.
To support this scenario, NIX0 can use LBK0 (NIX1 - LBK3) by setting a
loop flag while making LF alloc mailbox request.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-28 12:09:14 +02:00
Jakub Palider
f27c7d7c05 raw/cnxk_bphy: use named value for queue count
Queue counter is used in a few places so it was given some
reasonable name.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-28 12:09:14 +02:00
Jakub Palider
9cb3fb7724 common/cnxk: align function naming
There is an inconsistency in naming interrupt control
functions. This patch aligns names accordingly.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-28 12:09:14 +02:00
Jakub Palider
e2ab1c1752 common/cnxk: reduce function visibility
Some functions are not used outside of local ROC scope. These need
updating classifiers and removal from header.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-28 12:09:14 +02:00
Tomasz Duszynski
43c7a9bb1d raw/cnxk_bphy: do not include IRQ header directly
One should only use roc_api.h which exports all internal headers.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-28 12:09:14 +02:00
Tomasz Duszynski
3c50ca8ddb common/cnxk: remove duplicated constant
Drop duplicated constant.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-28 12:09:14 +02:00
Tomasz Duszynski
b816b6f448 common/cnxk: return saner error codes
If particular LMAC does not exist then it's saner to return ENODEV
instead of EINVAL.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-28 12:09:14 +02:00
Satha Rao
4435371b8f net/cnxk: add TM shaper and node operations
Implemented TM node, shaper profile, hierarchy_commit and
statistic operations.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-09-28 12:09:14 +02:00
Satha Rao
bd7b62d7e0 net/cnxk: add TM capabilities and queue rate limit handlers
Initial version of TM implementation added basic infrastructure,
TM node_get, capabilities operations and rate limit queue operation.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-09-28 12:06:39 +02:00
Satha Rao
f9dbd4a5b2 common/cnxk: add handlers to get TM hierarchy internals
Platform specific TM tree hierarchy details are part of common cnxk
driver. This patch introduces missing HAL APIs to return state of
TM hierarchy required to support ethdev TM operations inside cnxk PMD.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-09-28 12:06:39 +02:00
Satha Rao
1a362d745d common/cnxk: support TM error type get
Different TM handlers returns various platform specific errors,
this patch introduces new API to convert these internal error
types to RTE_TM* error types.
Also updated error message API with missed TM error types.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-09-28 12:06:39 +02:00
Satha Rao
680078faf3 common/cnxk: handle packet mode shaper limits
Add new macros to reflect HW shaper PPS limits. New API to validate
input rates for packet mode. Increase adjust value to support lesser
PPS (<61).

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-09-28 12:06:39 +02:00
Nithin Dabilpuram
6fe49f1097 common/cnxk: increase sched weight and shaper burst limit
Increase sched weight and shaper burst limit for cn10k.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-09-28 12:06:39 +02:00
Satha Rao
8cfde95de7 common/cnxk: support SMQ flush
Each NIX interface had one or more SMQs connected to SQs to send
packets. When flush enabled on SMQ, hardware will push all packets
from SMQ to physical link. This API will enable flush on all SMQs
of an interface.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-09-28 12:06:39 +02:00
Satha Rao
457d077495 common/cnxk: set appropriate max frame size for SDP and LBK
For SDP interface all platforms supports up to 65535 frame size.
Updated API with new check for SDP interface.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-09-28 12:06:39 +02:00
Jie Zhou
09e4eceacb mempool/stack: build on Windows
Enable build of mempool/stack on Windows.

Signed-off-by: Jie Zhou <jizh@linux.microsoft.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
2021-10-01 16:46:05 +02:00
William Tu
f1f6ebc0ea eal: remove sys/queue.h from public headers
Currently there are some public headers that include 'sys/queue.h', which
is not POSIX, but usually provided by the Linux/BSD system library.
(Not in POSIX.1, POSIX.1-2001, or POSIX.1-2008. Present on the BSDs.)
The file is missing on Windows. During the Windows build, DPDK uses a
bundled copy, so building a DPDK library works fine.  But when OVS or other
applications use DPDK as a library, because some DPDK public headers
include 'sys/queue.h', on Windows, it triggers an error due to no such
file.

One solution is to install the 'lib/eal/windows/include/sys/queue.h' into
Windows environment, such as [1]. However, this means DPDK exports the
functionalities of 'sys/queue.h' into the environment, which might cause
symbols, macros, headers clashing with other applications.

The patch fixes it by removing the "#include <sys/queue.h>" from
DPDK public headers, so programs including DPDK headers don't depend
on the system to provide 'sys/queue.h'. When these public headers use
macros such as TAILQ_xxx, we replace it by the ones with RTE_ prefix.
For Windows, we copy the definitions from <sys/queue.h> to rte_os.h
in Windows EAL. Note that these RTE_ macros are compatible with
<sys/queue.h>, both at the level of API (to use with <sys/queue.h>
macros in C files) and ABI (to avoid breaking it).

Additionally, the TAILQ_FOREACH_SAFE is not part of <sys/queue.h>,
the patch replaces it with RTE_TAILQ_FOREACH_SAFE.

[1] http://mails.dpdk.org/archives/dev/2021-August/216304.html

Suggested-by: Nick Connolly <nick.connolly@mayadata.io>
Suggested-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Signed-off-by: William Tu <u9012063@gmail.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Narcisa Vasile <navasile@linux.microsoft.com>
2021-10-01 13:09:43 +02:00
Pallavi Kadam
4feddcfc6c net/iavf: build on Windows
- Enable IAVF PMD build on Windows
- Replace x86intrin.h with rte_vect.h to avoid __m_prefetchw conflicting
  types
- Fix for pointer and integer sign warnings using Clang compiler on
  Windows
- Add extra cflags '-fno-asynchronous-unwind-tables'
  to avoid MinGW build error:
  Error: invalid register for .seh_savexmm

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Shivanshu Shukla <shivanshu.shukla@intel.com>
2021-09-30 22:09:49 +02:00
Pallavi Kadam
3c6e581025 bus/pci: fix unknown NUMA node value on Windows
Based on the rte_eth_dev_socket_id() documentation,
set the default numa_node to -1. When the API is unsuccessful,
set numa_node to 0.
This change more correctly resembles the Linux code.

Fixes: bf7cf1f947 ("bus/pci: fix unknown NUMA node value on Windows")
Cc: stable@dpdk.org

Reported-by: Vipin Varghese <vipin.varghese@intel.com>
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Acked-by: Ranjit Menon <ranjit.menon@intel.com>
2021-09-30 18:30:27 +02:00
Olivier Matz
6aebb94290 kvargs: add function to get from key and value
A quite common scenario with kvargs is to lookup for a <key>=<value> in
a kvlist. For instance, check if name=foo is present in
name=toto,name=foo,name=bar. This is currently done in drivers/bus with
rte_kvargs_process() + the rte_kvargs_strcmp() handler.

This approach is not straightforward, and can be replaced by this new
function.

rte_kvargs_strcmp() is then removed.

Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2021-09-30 17:38:02 +02:00
Tudor Cornea
84b3e4555a net/af_packet: remove timestamp from packet status
We should eliminate the timestamp status from the packet
status. This should only matter if timestamping is enabled
on the socket, but we might hit a kernel bug, which is fixed
in newer releases.

For interfaces of type 'veth', the sent skb is forwarded
to the peer and back into the network stack which timestamps
it on the RX path if timestamping is enabled globally
(which happens if any socket enables timestamping).

When the skb is destructed, tpacket_destruct_skb() is called
and it calls __packet_set_timestamp() which doesn't check
the flags on the socket and returns the timestamp if it is
set in the skb (and for veth it is, as mentioned above).

See the following kernel commit for reference [1]:

net: packetmmap: fix only tx timestamp on request

The packetmmap tx ring should only return timestamps if requested
via setsockopt PACKET_TIMESTAMP, as documented. This allows
compatibility with non-timestamp aware user-space code which checks
tp_status == TP_STATUS_AVAILABLE; not expecting additional timestamp
flags to be set in tp_status.

[1] https://www.spinics.net/lists/kernel/msg3959391.html

Signed-off-by: Mihai Pogonaru <pogonarumihai@gmail.com>
Signed-off-by: Tudor Cornea <tudor.cornea@gmail.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-09-28 14:59:28 +02:00
Raslan Darawsheh
16b8e92d49 ethdev: use extension header for GTP PSC item
This updates the gtp_psc flow item to use the net header
definition of the gtp_psc to be based on RFC 38415-g30

Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-09-28 12:34:58 +02:00
Junxiao Shi
3e3f736e50 net/memif: fix chained mbuf determination
Previously, TX functions call rte_pktmbuf_is_contiguous to determine
whether an mbuf is chained. However, rte_pktmbuf_is_contiguous is
designed to work on the first mbuf of a packet only. In case a packet
contains three or more segment mbufs in a chain, it may cause truncated
packets or rte_mbuf_sanity_check panics.

This patch updates TX functions to determine chained mbufs using
mbuf_head->nb_segs field, which works in all cases. Moreover, it
maintains that the second cacheline is only accessed when chained mbuf
is actually present.

Fixes: 09c7e63a71 ("net/memif: introduce memory interface PMD")
Fixes: 43b815d881 ("net/memif: support zero-copy slave")
Cc: stable@dpdk.org

Signed-off-by: Junxiao Shi <git@mail1.yoursunny.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
2021-09-27 17:25:21 +02:00
Dmitry Kozlyuk
f2f5879efb net/mlx5: fix shared RSS destruction
Shared RSS resources were released before checking that the shared RSS
has no more references. If it had, the destruction was aborted, leaving
the shared RSS in an invalid state where it could no longer be used.
Move reference counter check before resource release.

Fixes: d2046c09aa ("net/mlx5: support shared action for RSS")
Cc: stable@dpdk.org

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-09-21 10:06:11 +02:00
Dmitry Kozlyuk
b09c65fa4f net/mlx5: fix flow indirect action reference counting
When an indirect action is used in a flow rule with a pattern that
causes RSS expansion, each device flow generated by the expansion
incremented the reference counter of the action. When such a flow was
destroyed, its action reference counter had been decremented only once.
The action remained marked as being used and could not be destroyed.
COUNT, AGE, and CONNTRACK indirect actions have been affected
(for AGE the error was not immediately observable).
Increment action counter only once for the original flow rule.

Fixes: 81073e1f8c ("net/mlx5: support shared age action")
Fixes: 2d084f69aa ("net/mlx5: add translation of connection tracking action")
Fixes: f3191849f2 ("net/mlx5: support flow count action handle")
Cc: stable@dpdk.org

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-09-21 09:57:02 +02:00
Dmitry Kozlyuk
4ec1f971cd net/mlx5: report error on indirect CT action destroy
When an indirect CT action of mlx5 PMD could not be destroyed,
rte_action_handle_destroy() was returning (-1), but the error
structure was not filled. This lead to a segfault in testpmd
on an attempt to print it. Fill the details for each possible
cause of this error.

Fixes: c5a49265fc ("net/mlx5: add ASO connection tracking destroy")
Cc: stable@dpdk.org

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-09-21 09:56:12 +02:00
Michael Baum
dffae63d3c common/mlx5: fix resource cleaning in device removal
The common remove function call in a loop to remove function for each
driver which have been registered.

If all removes are succeeded, it return 0 without to free the device
which allocated in probe function. Otherwise, it free the device.
In fact we expect exactly the opposite behavior. If all removes are
failed, it returns error without freeing the device which allocated in
probe function. Otherwise, it free the device and return 0.

Replace it with the correct behavior.

Fixes: 8a41f4decc ("common/mlx5: introduce layer for multiple class drivers")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-20 23:22:10 +02:00
Michael Baum
dc26c9c21b common/mlx5: fix device list operations concurrency
The mlx5 common driver has a global list of mlx5 devices which are
probed.

In probe function it creates one and insert it to the list. Similarly it
removes the device in remove function.
These operations are not safe as there can be such operations in
parallel, by different threads.

Add global lock for the list and use it to insert or remove.

Fixes: 8a41f4decc ("common/mlx5: introduce layer for multiple class drivers")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-20 23:16:29 +02:00
Michael Baum
288d7c3fa6 common/mlx5: fix class combination validation
The common probe function gets as a user argument the classes it should
create, and checks whether the combination is valid.

In case the device already exists, it checks the integration of the
above with the classes that the device has.
However, the function does not check the combination when the device
does not exist and it has to create it.

Check if the combination is valid for all cases.

Fixes: ad435d3204 ("common/mlx5: add bus-agnostic layer")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-20 23:15:08 +02:00
Michael Baum
97c9b0aa25 net/mlx5: fix duplicate pattern option default
In order to allow/disallow configuring rules with identical patterns,
the new device argument 'allow_duplicate_pattern' was introduced.

The default is to allow, and it is initialized to 1 in PCI probe
function.
However, on auxiliary bus probing (for Sub-Function) it is not
initialized at all, so it's actually initialized to 0.

Move the initialization to default config function which is called from
both.

Fixes: 919488fbfa ("net/mlx5: support Sub-Function")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-20 23:13:40 +02:00
Michael Baum
6856efa54e net/mlx5: fix PF leak on PCI probing failure
During PCI probe, the internal probe function is called per PF.

If one of them fails, it was missing a proper destroy for the previously
probed PFs.

This fixes the behavior by destroying all previously probed PFs.

Fixes: 08c2772fc7 ("net/mlx5: support list of representor PF")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-20 23:12:10 +02:00
Michael Baum
c76db6a496 net/mlx5: fix memory leak on context allocation failure
In shared device context creation, there is a missing validation when
one of the btree memory allocation fails that will cause a memory leak.

This adds a proper check to clean resources in case of failure.

Fixes: 632f0f1905 ("net/mlx5: manage shared counters in three-level table")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-20 16:33:40 +02:00
Kishore Padmanabha
dbd29c42ba net/bnxt: add enhancements to TruFlow ULP
1. Added support to specify l4 port masks in the template. Also enabled
   source mac in the wild card key for ingress flows.

2. Added support to enable offload for ipv6 traffic within the vxlan
   tunnel connection.

3. The flow counters is reduced from 7168 to 6912 for Whitney.
   The stats operation is updated to reflect counts for packets
   at egress from CFA instead of ingress to CFA

4. The miss path for the l2 context table is updated with correct
   parif and default action handler to handle the miss path for
   egress flows.

5. This support enables allocation of encapsulation, modification and
   action records dynamically based on a given flow actions.

6. Reduce the l2context resource requests during open_session. Move the
   SMAC from the L2Context to the EM/WM

7. Remap the parif in the bd action in order to eliminate incorrect
   replication of broadcast packets. The layer 4 source port mask
   was incorrectly updated in the outer layer 4 source port mask
   instead of inner layer 4. Add the l3 proto to egress rules, switch
   to using computed fields for l4 ports, add internal smac to f1/f2
   flows, add l3 proto to ingress ipv6 flows

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:42:17 +02:00
Farah Smith
fb97e50973 net/bnxt: add SRAM manager shared session
Fix shared session support issues due to SRAM manager
additions. Shared session does not support slices within
RM blocks. Calculate resources required without slices
and determine base addresses using old methods for the
shared session.

Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:42:08 +02:00
Randy Schacher
adf0802e0c net/bnxt: allocate space dynamically for EM defrag
The dynamic pool allocation defrag function currently uses stack
allocation. To improve use of stack space, dynamically allocate
and deallocate memory for use to defragment the dynamic pool of
EM resources.

Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:41:58 +02:00
Farah Smith
0e3c0b53df net/bnxt: decrease log level of a debug message
Adjust info message to debug level to prevent excessive
logging.

Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:41:35 +02:00
Kishore Padmanabha
2730e7f9e8 net/bnxt: add flow templates for Thor
1. Add support for egress flows with port and count action for
   Thor platform.
2. Added templates to support VXLAN encapsulation feature for Thor.
3. Added support for VXLAN decap and VLAN pop actions along with
   the ingress flow.
4. Added templates to enable VXLAN decap support for f1 and f2 flows.
5. Added templates Thor VF Rep support
6. Added Thor ingress mod table actions for NAT, NAPT, and TTL.
7. Added mirror/sample table support
8. Added supported for IPv6 flows for Thor.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:40:18 +02:00
Kishore Padmanabha
1f7f7c3c73 net/bnxt: add wildcard TCAM byte order for Thor
The wild card TCAM for Thor platform is different from the profile TCAM
byte order.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Shuanglin Wang <shuanglin.wang@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:40:00 +02:00
Kishore Padmanabha
f63aa27db6 net/bnxt: support dynamic encap action
The encapsulation record processing is enhanced to handle data
dynamically. Different combinations of VXLAN encapsulation using
no VLAN or single or double VLAN can be supported and also supports
both IPv4 and IPv6 versions.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:33:09 +02:00
Kishore Padmanabha
bdf4a3c631 net/bnxt: support tunnel offload
Add support for tunnel offload APIs. Specifically the following
are supported.
tunnel_decap_set, tunnel_match, tunnel_action_decap_release,
tunnel_item_release.

This provides support for VXLAN decap action where two flows
can indicate tunnel offload rule. The first flow indicates the
tunnel properties and second flow indicates the inner packet
structure. The templates are updated to support this
feature.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:26:00 +02:00
Kishore Padmanabha
ad9eed0248 net/bnxt: support flow template for Thor
Template adds non-VFR based support for testpmd with:
matches to include
- DMAC, SIP, DIP, Proto, Sport, Dport
- SIP, DIP, Proto, Sport, Dport
actions:
- count, drop

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:13:10 +02:00
Farah Smith
37ff91c158 net/bnxt: add SRAM manager model
The SRAM manager supports allocation and free of variable sized
records within SRAM memory.  These record sizes are 8, 16, 32, or
64B. The SRAM manager algorithm will not fragment memory during
run time. Previous implementation only included fixed size 64B
records regardless of the size required.

Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:11:42 +02:00
Jay Ding
998b9639df net/bnxt: support flow meter drop counter
This patch adds flow meter drop counter support for Thor.

Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 05:16:29 +02:00
Peter Spreadborough
dfc65c77c0 net/bnxt: enable dynamic pool allocator
Enable dynamic entry allocator for Exact Match SRAM entries.
Deprecate static entry allocator code.

Signed-off-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 04:58:30 +02:00
Farah Smith
c6d273e9ab net/bnxt: update TruFlow core index table
Update the TruFlow core index table and
remove unused shadow table functionality.

Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 04:40:22 +02:00
Ashwin Sekhar T K
14a4e2844b common/cnxk: align NPA stack to ROC cache line size
Network Pool accelerator (NPA) is part of ROC (Rest Of Chip). So
NPA structures should be aligned to ROC Cache line size and not
CPU cache line size.

Non alignment of NPA stack to ROC cache line will result in
undefined runtime NPA behaviour.

Fixes: f765f56112 ("common/cnxk: add NPA pool HW operations")
Cc: stable@dpdk.org

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-21 11:08:55 +02:00
Harman Kalra
9eb5cb3b11 net/octeontx: fix access to indirect buffers
Issue has been observed where fields of indirect buffers are
accessed after being set free by the diver. Also fixing freeing
of direct buffers to correct aura.

Fixes: 5cbe184802 ("net/octeontx: support fast mbuf free")
Cc: stable@dpdk.org

Signed-off-by: David George <david.george@sophos.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-21 10:42:31 +02:00
Ashwin Sekhar T K
dd9525a715 common/cnxk: avoid using stashing option of stype
Avoid using stashing option of stype in NPA in cn10k-a0 stepping.

This is a workaround for a HW Errata due to which NPA stashing operations
will never result in writing the data into L2 cache. But instead, it will
be written into LLC.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-20 10:47:01 +02:00
Ashwin Sekhar T K
fa4ac9512e common/cnxk: update ROC models
Made following updates to ROC (Rest of Chip) models.
- Use consistent upper/lower case in macros defining different
  ROC models.
- Add API to detect cn96 Cx stepping.
- Make all current cn10k models as A0 stepping.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-20 10:46:57 +02:00
Yuying Zhang
e4a0a7599d net/ice: fix flow priority support in non-pipeline mode
Lower values denote higher priority with 0 as the maximum.
The usage of priority in non-pipeline mode is wrong.

This patch fixed this issue in switch filter and added input
validation of priority in FDIR, RSS and ACL filter which
only support one priority level.

Fixes: 2321e34c23 ("net/ice: support flow priority for DCF switch filter")
Cc: stable@dpdk.org

Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 09:31:07 +02:00
Robin Zhang
cd3b124955 net/iavf: enable interrupt polling
For VF hosted by Intel 700 series NICs, internal Rx interrupt and adminq
interrupt share the same source, that cause a lot CPU cycles be wasted on
interrupt handler on Rx path.

The patch disable PCI interrupt and remove the interrupt handler, replace
it with a low frequency(50ms) interrupt polling daemon which is
implemented by registering an alarm callback periodically.

The virtual channel capability bit VIRTCHNL_VF_OFFLOAD_WB_ON_ITR can be
used to negotiate if iavf PMD needs to enable background alarm or not, so
ideally this change will not impact the case hosted by Intel 800 series
NICS.

This patch implements the same logic with an early i40e commit:
commit 864a800d70 ("net/i40e: remove VF interrupt handler")

Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Pallavi Kadam <pallavi.kadam@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 09:27:12 +02:00
Wenjun Wu
f8d541da51 net/iavf: remove support for IP fragment default RSS
To support independent IP fragment default RSS, considerable
additional work need to be done, so we decide to remove this
feature to avoid some unexpected behavior we have observed,
meanwhile user always can use rte_flow to create RSS for IP
fragment packet explicitly.

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 09:19:06 +02:00
Wenjun Wu
cc46bab596 net/ice: remove support for IP fragment default RSS
To support independent IP fragment default RSS, considerable
additional work need to be done, so we decide to remove this
feature to avoid some unexpected behavior we have observed,
meanwhile user always can use rte_flow to create RSS for IP
fragment packet explicitly.

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 09:18:45 +02:00
Lingyu Liu
cd212c4669 net/iavf: fix QFI fields of GTPU UL/DL for flow director
Fix QFI (QoS Flow Identifier) fields matching of GTPU UL/DL for FDIR.

Fixes: 78e8a87f63 ("net/iavf: fix GTPU UL and DL support for flow director")
Cc: stable@dpdk.org

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Lingyu Liu <lingyu.liu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 09:15:44 +02:00
Qiming Chen
1028e5bc36 net/iavf: fix mbuf leak
In the iavf_dev_rx_queue_start function, if the iavf_switch_queue
or iavf_switch_queue_lv function fails, the previously applied mbuf
is not released, resulting in leakage. The patch fixes the problem.

Fixes: 9cf9c02bf6 ("net/iavf: add enable/disable queues for large VF")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 09:05:50 +02:00
Simei Su
437dbd2fd4 net/ice: support 1PPS
The E810 supports four single-ended GPIO signals (SDP[20:23]). The 1PPS
signal outputs via SDP[20:23], which is measured by an oscilloscope.
This feature can be turned by a devargs which can select GPIO pin index
flexibly. Pin index 0 means SDP20, pin index 1 means SDP21 and so on.

The example for test command is as below:
./build/app/dpdk-testpmd -a af:00.0,pps_out='[pin:2]' -c f -n 4 -- -i

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 08:47:42 +02:00
Qi Zhang
d8aaa6d9c2 net/ice/base: add API for parser profile initialization
Add API ice_parser_profile_init to init a parser profile base on
a parser result and a mask buffer. The ice_parser_profile can feed to
low level FXP engine to create HW profile / field vector directly.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
6065f4cdc3 net/ice/base: support tunnel port for parser
UDP tunnel can be added/deleted for vxlan, geneve, ecpri through
below APIs:
ice_parser_vxlan_tunnel_set
ice_parser_geneve_tunnel_set
ice_parser_ecpri_tunnel_set

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
cc3f51e466 net/ice/base: support double VLAN mode configure for parser
Add API ice_parser_dvm_set to support turn on/off parser's
double vlan mode.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
39925373a3 net/ice/base: add parser execution main loop
Implement function ice_parser_rt_execute which perform the main
loop of the parser.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
70ada0c508 net/ice/base: add helper function to aggregate flags
Add internal helper function ice_xlt_kb_flg_get to aggregate 64 bit
packet flag into 16 bit key builder flags.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
1c9e61b3a4 net/ice/base: add helper function to redirect flags
Add internal helper function ice_flg_redirect to redirect parser flags
to packet flags.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
510965b4dc net/ice/base: add helper for ptype markers match
Add internal helper function ice_ptype_mk_tcam_match for ptype markers
matching in tcam table.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
d490f1ff41 net/ice/base: add helper for parse graph key matching
Add below two internal helper functions for parse graph key matching
in cam table:

ice_pg_cam_match
ice_pg_nm_cam_match

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
4b20fa1b1d net/ice/base: add helper function for boost TCAM match
Add internal helper function ice_bst_tcam_match to perform ternary
match on boost TCAM.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
c84f8aa210 net/ice/base: add parser runtime skeleton
Add parser runtime data struct ice_parser_rt.

Add below APIs for parser runtime preparation:
ice_parser_rt_reset
ice_parser_rt_pkt_buf_set

Add below API skeleton for parser runtime execution:
ice_parser_rt_execute

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:57 +02:00
Qi Zhang
0cbacf60dc net/ice/base: init XLT key builder for parser
Parse below DDP section into struct ice_xlt_kb:
ICE_SID_XLT_KEY_BUILDER_SW
ICE_SID_XLT_KEY_BUILDER_FD
ICE_SID_XLT_KEY_BUILDER_RSS

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:57 +02:00
Qi Zhang
f787952d13 net/ice/base: init flag redirect table for parser
Parse DDP section ICE_SID_RXPARSER_FLAG_REDIR into an array of
ice_flag_rd_item.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:57 +02:00
Qi Zhang
7b61be517f net/ice/base: init protocol group table for parser
Parse DDP section ICE_SID_RXPARSER_PROTO_GRP into an array of
ice_proto_grp_item.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:57 +02:00
Qi Zhang
90bbd7d954 net/ice/base: init marker group table for parser
Parse DDP section ICE_SID_RXPARSER_MARKER_GRP into an array of
ice_mk_grp_item.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:57 +02:00
Qi Zhang
111871087c net/ice/base: init ptype marker TCAM table for parser
Parse DDP section ICE_SID_RXPARSER_MARKER_PTYPE into an array of
ice_ptype_mk_tcam_item.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:57 +02:00
Qi Zhang
1792942b2d net/ice/base: init boost TCAM table for parser
Parse DDP section ICE_SID_RXPARSER_CAM into an array of
ice_bst_tcam_item.
Parse DDP section ICE_SID_LBL_RXPARSER_TMEM into an array of
ice_lbl_item.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:57 +02:00
Qi Zhang
c55b1ba93f net/ice/base: init parse graph CAM table for parser
Parse DDP section ICE_SID_RXPARSER_CAM or ICE_SID_RXPARSER_PG_SPILL
into an array of struct ice_pg_cam_item.
Parse DDP section ICE_SID_RXPARSER_NOMATCH_CAM or
ICE_SID_RXPARSER_NOMATCH_SPILL into an array of struct ice_pg_nm_cam_item.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:57 +02:00
Qi Zhang
2f7a1864cc net/ice/base: init metainit table for parser
Parse DDP section ICE_SID_RXPARSER_METADATA_INIT into an array of
struct ice_metainit_item.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:57 +02:00
Qi Zhang
b3e73a812f net/ice/base: init IMEM table for parser
Parse DDP section ICE_SID_RXPARSER_IMEM into an array of
struct ice_imem_item.

The Instruction Memory (IMEM) section contains three VLIW instructions
for the ALUs, a key extraction instruction for the Parse Graph CAM, and
several other fields.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:55 +02:00
Qi Zhang
7fe2d98070 net/ice/base: add parser create and destroy skeleton
Add new parser module which can parse a packet in binary
and generate information like ptype, protocol/offset pairs
and flags which can be used to feed the FXP profile creation
directly.

The patch added skeleton of the parser instance create and
destroy APIs:
ice_parser_create
ice_parser_destroy

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 14:43:23 +02:00
Qi Zhang
b644b5cf4c net/ice/base: update auto-generated hardware register
Update ice_hw_autogen.h.
Remove duplicated one in ice_nvm.h.
Replace ICE_NVM_ACCESS_GL_HIBA_MAX with GL_HIBA_MAX_INDEX.

Signed-off-by: Scott W Taylor <scott.w.taylor@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 14:33:46 +02:00
Qi Zhang
b3d1ca7d37 net/ice/base: support SMA controller
Add support for controlling SMA (SubMiniature version A) connectors
using GPIO get/set AQs.

Signed-off-by: Maciej Machnikowski <maciej.machnikowski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 14:33:44 +02:00
Qi Zhang
a173a67bf7 net/ice/base: add get/set functions for shared parameters
Add functions used by the driver for setting and getting the shared
driver parameters. These will be used by the driver in order to share
the PTP clock index identifier between PF drivers.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 14:33:42 +02:00
Qi Zhang
c31095a0b2 net/ice/base: add GCO defines and GCO flex descriptor
Added the memory needed for the generic checksum offload (GCO)
feature, including the new flex descriptor ICE_RXDID_GSC.

Signed-off-by: Alice Michael <alice.michael@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 14:33:39 +02:00
Qi Zhang
8e9091f57e net/ice/base: add helper to check for 100M speed support
Add a helper function to check if the underlying part can
support 100M speeds.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 14:33:37 +02:00
Qi Zhang
a61ec03d6a net/ice/base: add package segment ID
DDP package format is shared with different devices, for E810 device
we only support SEGMENT_TYPE_ICE_810.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 14:33:34 +02:00
Qi Zhang
a972972fe0 net/ice/base: allow tool access to manageability register
E810-T supports signed netlists and to support this, the NVM update
tool needs to be able to read the GL_MNG_DEF_DEVID register. Add
said register to the allowlist in ice_validate_nvm_rw_reg.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 14:33:32 +02:00
Qi Zhang
ed2ffccdc1 net/ice/base: change address parameter to 16-bit
Change one of the input parameter (addr) in ice_read_cgu_reg_e822 and
ice_write_cgu_reg_e822 functions. This will avoid the shrink down
conversion from addr to cgu_msg.msg_addr_low.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 14:33:30 +02:00
Qi Zhang
2e826e6462 net/ice/base: allow to enable LAN and loopback in switch
Currently shared code API does not allow to set/unset lb_en
and lan_en flags for advanced rules during their creation.
Because of that we have to use a workaround in switchdev
which is to update rule immediately after its creation.
This change will allow us to set/unset those flags right
away.

Signed-off-by: Wojciech Drewek <wojciech.drewek@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 14:33:28 +02:00
Qi Zhang
cb9c171a24 net/ice/base: use macro instead of open-coded division
For some operating systems, 64-bit division requires using specific
implementations. Use the DIV_64BIT macro to replace open-coded division
so that the driver may convert this to the appropriate operating-system
specific implementation when necessary.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 14:33:26 +02:00
Qi Zhang
8d90c55c45 net/ice/base: include more E810T adapters
Expand the ice_is_e810t to include:
- Intel(R) Ethernet Network Adapter E810-C-Q2T
- Intel(R) Ethernet 25G 4P E810-XXV-st

Signed-off-by: Maciej Machnikowski <maciej.machnikowski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 14:33:24 +02:00
Qi Zhang
3affa0ef2d net/ice/base: calculate logical PF ID
In some devices, the function numbers used are non-contiguous. For
example, some two port devices will report as functions 0 and 2.

When distributing RSS and FDIR masks, which are global resources across
the active devices, it is required to have a contiguous PF id, which can
be described as a logical PF id. In the case above, function 0 would
have a logical PF id of 0, and function 2 would have a logical PF id of
1.

Using logical PF id can properly describe which slice of resources can
be used by a particular PF.

Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 14:33:18 +02:00
Ivan Ilchenko
67f1b4f174 net/sfc: fix getting accumulative SW xstat
Add missing initialisation of the accumulative SW xstat to
zero since it is sum of per-queue xstats.

Fixes: fdd7719eb3 ("net/sfc: add xstats for Rx/Tx doorbells")
Cc: stable@dpdk.org

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2021-09-21 10:32:30 +02:00
Dapeng Yu
ccf0f002d2 net/bonding: fix memory leak on closing device
If the bond device was created by vdev mode, the kvlist was not free
after the bond device was closed.

This patch fixes it.

Fixes: 144dc47399 ("net/bonding: fix leak on remove")
Cc: stable@dpdk.org

Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Min Hu (Connor) <humin29@huawei.com>
2021-09-21 10:03:12 +02:00
Tejasree Kondoj
07d4bde1c0 common/cnxk: support tunnel header verification
Added support to verify tunnel header in IPsec inbound.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-28 17:49:10 +02:00
Anoob Joseph
30ce834f2c crypto/octeontx2: add checks for life configuration
Lifetime tracking is not supported by hardware and is not implemented in
software either. Return failure when lifetime is configured.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-28 14:12:35 +02:00
Anoob Joseph
c4fcfaa742 common/cnxk: support lifetime configuration
Add support for SA lifetime configuration. Expiry can
be either in units of octets or packets.

Also, updated cryptodev dequeue path to update crypto op result to
indicate soft expiry.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-28 14:12:14 +02:00
Tejasree Kondoj
c7c7f34739 crypto/cnxk: add IV in SA in lookaside IPsec debug mode
Adding IV in SA in lookaside IPsec debug mode. It helps
to verify lookaside PMD using known outbound vectors in
lookaside autotest.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-28 13:36:07 +02:00
Michael Baum
be5aa65c26 crypto/mlx5: fix indirect mkey cleaning
The driver creates an indirect mkey per entry in the queue to manage the
crypto operation using the BSF fields.

The indirect mkeys were never released neither while error occurs in the
creation phase nor when the queue is released.

Clean the indirect mkeys in the above cases.

Fixes: c2a42d19d9 ("crypto/mlx5: add WQE set initialization")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-28 08:43:57 +02:00
Tal Shnaiderman
427ec3346d crypto/mlx5: fix queue indexing
The crypto QP consumer (ci) and producer (pi) indexes are increased
with each successful enqueue/dequeue operations.

However the QP pi index is calculated with a wraparound the number
of elements while the QP ci does not.

This is causing incorrect engine calculation for encqueued WQ values
(wq->pi - wq->ci) and eventually the device stops accepting new enqueue
operations.

Fixed by removing the wraparound on QP pi and using a temp calculation
where wraparound values are needed.

Fixes: 8e196c08ab ("crypto/mlx5: support enqueue/dequeue operations")
Cc: stable@dpdk.org

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-28 08:43:57 +02:00
David George
c9902a15bd common/cpt: rework pending queue
Replace pending queue with one that allows concurrent single producer and
single consumer. This relaxes the restriction of only allowing a single
lcore to operate on a given queue pair.

Signed-off-by: David George <david.george@sophos.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
2021-09-28 08:43:57 +02:00
Xueming Li
6e914454d5 vdpa/mlx5: fix large VM memory region registration
When VM size is larger than 4G (u32) and memory region is larger than 4G,
the 32-bit GCD function overflowed and returned wrong value
that resulted in memory registration failure.

This patch calls 64-bit GCD function to avoid overflow.

Fixes: cc07a42da2 ("vdpa/mlx5: prepare memory regions")
Cc: stable@dpdk.org

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: Matan Azrad <matan@nvidia.com>
2021-09-27 17:24:22 +02:00
Nipun Gupta
3ab154b306 net/dpaa2: promote some old experimental API
These APIs were introduced in 19.02, therefore removing
experimental tag to promote them to stable state.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
2021-09-24 18:44:02 +02:00
Nipun Gupta
6b9b687f4f bus/fslmc: move experimental function to internal
Remove experimental tag from internal API dpaa2_seqn.
This API was introduced in DPDK 20.11 and is now moved to
internal tag.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
2021-09-24 18:44:00 +02:00
Nipun Gupta
c4bf04acf4 bus/fslmc: promote experimental VFIO API to stable
This API was introduced in 19.08, therefore removing
experimental tag to promote them to stable state.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
2021-09-24 18:43:38 +02:00
Nipun Gupta
f3130f7a5f bus/dpaa: move experimental function to internal
Remove experimental tag from internal API dpaa_seqn.
This API was introduced in DPDK 20.11 and is now moved to
internal tag.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
2021-09-23 21:46:28 +02:00
Pallavi Kadam
bf7cf1f947 bus/pci: fix unknown NUMA node value on Windows
On older CPUs, currently numa_node returns value only for socket 0.
Instead, application should be able to make correct decision and
also to keep consistent with the Linux code,
replace the return value to -1.

Fixes: ac7c98d04f ("bus/pci: ignore missing NUMA node on Windows")
Cc: stable@dpdk.org

Reported-by: Vipin Varghese <vipin.varghese@intel.com>
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Acked-by: Tal Shnaiderman <talshn@nvidia.com>
2021-09-23 19:09:26 +02:00
Thomas Monjalon
70d2f42110 doc: remove references to the old build system
Some docs and comments in Meson files are still mentioning
the old build system based on "make", removed in 20.11.
After one year, such references are better to be removed.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2021-09-23 08:45:10 +02:00
Michael Baum
0972b7baae regex/mlx5: fix leak after probing failure
In RegEx device probing, there is register read trying after context
device creation.

When the reading fails, the context device was not freed what caused a
memory leak.

Free it.

Fixes: f324162e8e ("regex/mlx5: support combined rule file")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
2021-09-22 21:21:31 +02:00
Steve Yang
ccf69617ce net/ice/base: support L4 for QinQ switch filter
This patch adds more dummy packet types for QinQ packet,
it enables tcp/udp layer of ipv4/ipv6 for QinQ payload,
so we can use L4 dst/src port as input set for switch
filter.

Signed-off-by: Steve Yang <stevex.yang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-16 09:12:18 +02:00
Steve Yang
b43045eede net/ice: support L4 for QinQ switch filter
Add L4 support for QinQ switch filter as following flow patterns:
eth / vlan / vlan / ipv4 / udp
eth / vlan / vlan / ipv4 / tcp
eth / vlan / vlan / ipv6 / udp
eth / vlan / vlan / ipv6 / tcp

Signed-off-by: Steve Yang <stevex.yang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-16 09:11:50 +02:00
Qiming Chen
45570d7e44 net/iavf: fix resource leak on probing failure
During the port probe process, there are two abnormal branches that did
not release the previously requested memory, resulting in leakage. The
patch adds an iavf_uninit_vf function, which corresponds to the
iavf_init_vf function.

Fixes: ff2d0c345c ("net/iavf: support generic flow API")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-15 05:10:10 +02:00
Qiming Chen
c9c45beb1b net/iavf: fix Rx queue buffer size alignment
The RTE_ALIGN macro is aligned upwards. If the buf_size variable is not
aligned with 1 << I40E_RXQ_CTX_DBUFF_SHIFT, the rx_buf_len is larger than
the actual mbuf memory after the operation. When receiving the packet, if
the packet is larger than the configured buf_size, it will cause a memory
stepping event.

The patch uses the RTE_ALIGN_FLOOR down alignment macro to correct the
problem.

Fixes: 69dd4c3d08 ("net/avf: enable queue and device")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-15 04:44:22 +02:00
Qiming Chen
071eb26fb5 net/i40e/base: fix resource leakage
In the i40e_init_arq function, when the i40e_config_arq_regs function
returns from processing failure, the previously applied arq_bufs resource
is not released, which leads to leakage.
The patch is processed in the same way as the i40e_init_asq function,
maintaining a unified coding style.

Fixes: 49ea51605b ("net/i40e/base: gracefully clean the resources")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-15 03:28:24 +02:00
Qiming Chen
a38df1edd6 net/iavf: fix mbuf leak
A local test found that repeated port start and stop operations during
the continuous SSE vector bufflist receiving process will cause the mbuf
resource to run out. The final positioning is when the port is stopped,
the mbuf of the pkt_first_seg pointer is not released. Resources leak.
The patch scheme is to judge whether the pointer is empty when the port
is stopped, and release the corresponding mbuf if it is not empty.

Fixes: 69dd4c3d08 ("net/avf: enable queue and device")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-15 03:22:28 +02:00
Dapeng Yu
da9cdcd1f3 net/ice: fix crash on representor port closing
If DCF representor port is closed after DCF port is closed, there will
be segmentation fault because representor accesses the released resource
of DCF port.

This patch checks if the resource is present before accessing.

Fixes: 5674465a32 ("net/ice: add DCF VLAN handling")
Cc: stable@dpdk.org

Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
2021-09-13 07:53:06 +02:00
Dapeng Yu
f979702337 net/ice/base: fix PF ID for DCF
In original implementation, if DCF is created on PF1, the PF ID is
still 0, but not 1. Without the right PF ID, the ACL will not work.

This patch makes VF to get its parent's physical function ID.

Fixes: 0b02c95194 ("net/ice: handle PF initialization by DCF")
Cc: stable@dpdk.org

Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
2021-09-13 04:48:09 +02:00
Qiming Chen
daf3332e11 net/i40e: fix device startup resource release
In the eth_i40e_dev_init function, the tunnel and ethertype hash table
resource release interface should be rte_hash_free instead of rte_free,
and the previously registered interrupt handling function also needs to
be removed from the interrupt list. The patch is amended to use the
correct interface to release the hash table resource and release the
interrupt handling function at the same time.

Fixes: 425c3325f0 ("net/i40e: store tunnel filter")
Fixes: 5c53c82c81 ("net/i40e: store flow director filter")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 04:41:53 +02:00
Qiming Chen
4b458675d3 net/i40e: fix mbuf leak
A local test found that repeated port start and stop operations during
the continuous SSE vector bufflist receiving process will cause the mbuf
resource to run out. The final positioning is when the port is stopped,
the mbuf of the pkt_first_seg pointer is not released. Resources leak.
The patch scheme is to judge whether the pointer is empty when the port
is stopped, and release the corresponding mbuf if it is not empty.

Fixes: 4861cde461 ("i40e: new poll mode driver")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 04:30:01 +02:00
Haiyue Wang
db46ff4482 common/iavf: update base driver version
Update the driver version to trace the change.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 02:47:33 +02:00
Haiyue Wang
146bf0916c common/iavf: remove flow director query opcode
The VIRTCHNL_OP_QUERY_FDIR_FILTER opcode is not used, so remove it.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 02:47:27 +02:00
Alvin Zhang
67edb141b9 common/iavf: enable hash calculation based on L4 checksum
Add TCP/UDP/SCTP header checksum field selectors, they can be used in
creating FDIR or RSS rules related to TCP/UDP/SCTP header checksum.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 02:47:05 +02:00
Junfeng Guo
e0c765fec8 common/iavf: add QFI fields for GTPU UL and DL
The QFI is 6-bit "QoS Flow Identifier" within the GTPU Extension Header.
Add virtchnl fields QFI of GTPU UL/DL for supporting the AVF FDIR.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 02:46:47 +02:00
Hanumanth Reddy Pothula
07d15d4d84 net/octeontx2: fix MTU when PTP is enabled
Update MTU value based on PTP enable status and reserve eight
bytes in TX path to accommodate VLAN tags.

If PTP is enabled maximum allowed MTU is 9200 otherwise it's 9208.

Fixes: b5dc314044 ("net/octeontx2: support base PTP")
Cc: stable@dpdk.org

Signed-off-by: Hanumanth Reddy Pothula <hpothula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-16 16:29:51 +02:00
Harman Kalra
2c809af8a8 net/cnxk: add callback to get link status
Adding a new callback for reading the link status. PF can read its
link status and can forward the same to VF once it comes up.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-16 16:29:47 +02:00
Harman Kalra
02719901d5 common/cnxk: send link status event to VF
Currently link event is only sent to the PF by AF as soon as it comes
up, or in case of any physical change in link. PF will broadcast
these link events to all its VFs as soon as it receives it.
But no event is sent when a new VF comes up, hence it will not have
the link status.
Adding support for sending link status to the VF once it comes up
successfully.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-16 16:28:51 +02:00
Satheesh Paul
8ca851cdc5 common/cnxk: support dual VLAN insert and strip actions
Add ROC API to configure dual VLAN tag addition and removal.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-16 16:28:02 +02:00
Lance Richardson
cc7f749488 net/bnxt: fix Rx queue startup state
Since the addition of support for runtime queue setup,
receive queues that are started by default no longer
have the correct state. Fix this by setting the state
when a port is started.

Fixes: 0105ea1296 ("net/bnxt: support runtime queue setup")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
2021-09-15 02:07:08 +02:00
Lior Margalit
aa52e5f0f9 net/mlx5: fix RSS expansion traversal over next nodes
The RSS expansion is based on DFS algorithm to traverse over the possible
expansion paths.

The current implementation breaks out, if it reaches the terminator of
the "next nodes" array, instead of going backwards to try the next path.
For example:
testpmd> flow create 0 ingress pattern eth / ipv6 / udp / vxlan / end
actions rss level 2 types tcp end / end
The paths found are:
ETH IPV6 UDP VXLAN END
ETH IPV6 UDP VXLAN ETH IPV4 TCP END
ETH IPV6 UDP VXLAN ETH IPV6 TCP END
The traversal stopped after getting to the terminator of the next nodes
of the ETH node. It missed the rest of the nodes in the next nodes array
of the VXLAN node.

The fix is to go backwards when reaching the terminator of the current
level and find if there is a "next node" to start traversing a new path.
Using the above example, the flows will be:
ETH IPV6 UDP VXLAN END
ETH IPV6 UDP VXLAN ETH IPV4 TCP END
ETH IPV6 UDP VXLAN ETH IPV6 TCP END
ETH IPV6 UDP VXLAN IPV4 TCP END
ETH IPV6 UDP VXLAN IPV6 TCP END
The traversal will find additional paths, because it traverses through
all the next nodes array of the VXLAN node.

Fixes: 4ed05fcd44 ("ethdev: add flow API to expand RSS flows")
Cc: stable@dpdk.org

Signed-off-by: Lior Margalit <lmargalit@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-13 21:56:10 +02:00
Lior Margalit
69d268b4ff net/mlx5: fix RSS expansion for explicit graph node
The RSS expansion algorithm is using a graph to find the possible
expansion paths. A graph node with the 'explicit' flag will be skipped,
if it is not found in the flow pattern.

The current implementation misses the case where the node with the
explicit flag is in the middle of the expanded path.
For example:
testpmd> flow create 0 ingress pattern eth / ipv6 / udp / vxlan / end
actions rss level 2 types tcp end / end
The VLAN node has the explicit flag, so it is currently included in the
expanded flow:
ETH IPV6 UDP VXLAN END
ETH IPV6 UDP VXLAN ETH VLAN IPV4 TCP END
ETH IPV6 UDP VXLAN ETH VLAN IPV6 TCP END

The fix is to skip the nodes with the explicit flag while iterating over
the possible expansion paths. Using the above example, the flows will be:
ETH IPV6 UDP VXLAN END
ETH IPV6 UDP VXLAN ETH IPV4 TCP END
ETH IPV6 UDP VXLAN ETH IPV6 TCP END

Fixes: 3f02c7ff68 ("net/mlx5: fix RSS expansion for inner tunnel VLAN")
Cc: stable@dpdk.org

Signed-off-by: Lior Margalit <lmargalit@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-13 21:56:09 +02:00
Ivan Ilchenko
580f3af31c net/virtio: fix device configure without jumbo Rx offload
Use max-pkt-len only if jumbo frames offload is requested
since otherwise this field isn't valid.

Fixes: 8b90e43581 ("net/virtio: set offload flag for jumbo frames")
Fixes: 4e8169eb0d ("net/virtio: fix Rx scatter offload")
Cc: stable@dpdk.org

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-14 13:21:57 +02:00
Gaoxiang Liu
5d903aee8a net/virtio: fix repeated freeing of virtqueue
When virtio_init_queue returns error, the memory of vq is freed.
But the value of hw->vqs[queue_idx] does not restore.
If virtio_init_queue returns error, the memory of vq is freed again
in virtio_free_queues.

Fixes: 69c80d4ef8 ("net/virtio: allocate queue at init stage")
Cc: stable@dpdk.org

Signed-off-by: Gaoxiang Liu <liugaoxiang@huawei.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2021-09-14 13:21:57 +02:00
David Marchand
848e93d900 net/virtio-user: fix Rx interrupts with multi-queue
The callfds[] array stores eventfds sequentially for Rx and Tx vq.

Fixes: 3d4fb6fd25 ("net/virtio-user: support Rx interrupt")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-14 13:21:57 +02:00
David Marchand
5be2325ece net/virtio: avoid unneeded link interrupt configuration
There is no reason to re-register a interrupt handler for LSC if this
feature was not requested in the first place.
A simple use case is when asking for Rx interrupts without LSC interrupt.

Fixes: 26b683b4f7 ("net/virtio: setup Rx queue interrupts")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-14 13:21:57 +02:00
Ivan Ilchenko
31136836bc net/virtio: report max/min/align Rx descriptor limits
Report max/min/align descriptors limits in device info get callback.
Before calling the callback, rte_eth_dev_info_get() provides
default values of nb_min as zero and nb_max as UINT16_MAX that are
not correct for the driver, so one can't rely on them.

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-14 13:21:57 +02:00