Commit Graph

8765 Commits

Author SHA1 Message Date
Krzysztof Kanas
0b16e2abd6 net/octeontx2: enable Tx through traffic manager
This patch enables pkt transmit through traffic manager
hierarchy by clearing software XOFF on the nodes and linking
tx queues to corresponding leaf nodes.
It also adds support to start and stop tx queue using
traffic manager.

Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 01:52:01 +02:00
Nithin Dabilpuram
2f6d5220fb net/octeontx2: configure TM HW resources
This patch sets up and configure hierarchy in hw
nodes. Since all the registers are with RVU AF,
register configuration is also done using mbox
communication.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2019-07-05 01:52:01 +02:00
Krzysztof Kanas
1439b6a999 net/octeontx2: alloc and free TM HW resources
Allocate and free shaper/scheduler hardware resources for
nodes of hierarchy levels in sw.

Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-05 01:52:01 +02:00
Nithin Dabilpuram
e7b4cc8c47 net/octeontx2: introduce traffic manager
Introduce traffic manager infra and default hierarchy
creation.

Upon ethdev configure, a default hierarchy is
created with one-to-one mapped tm nodes. This topology
will be overridden when user explicitly creates and commits
a new hierarchy using rte_tm interface.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2019-07-05 01:52:01 +02:00
Nithin Dabilpuram
711baf1c2a net/octeontx2: add queue start and stop operations
Add queue start and stop operations. Tx queue needs
to update the flow control value, Which will be
added in sub subsequent patch.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 01:52:01 +02:00
Vamsi Attunuru
da138cd47e net/octeontx2: handle port reconfigure
setup tx & rx queues with the previous configuration during
port reconfig, it handles cases like port reconfigure without
reconfiguring tx & rx queues.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-05 01:52:01 +02:00
Jerin Jacob
1be5cff1fa net/octeontx2: add Tx queue setup and release
Add Tx queue setup and release.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-05 01:52:01 +02:00
Jerin Jacob
094fc8a3a1 net/octeontx2: add Rx queue setup and release
Add Rx queue setup and release.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 01:52:01 +02:00
Vamsi Attunuru
83ce2880e2 net/octeontx2: support RSS
Add RSS support and expose RSS related functions
to implement RSS action for rte_flow driver.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
2019-07-05 01:52:01 +02:00
Sunil Kumar Kori
c43adf6168 net/octeontx2: add unicast MAC filter
Add unicast MAC filter for PF device and
update the respective feature list.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-07-05 01:52:01 +02:00
Vamsi Attunuru
adf6bb5d73 net/octeontx2: add promiscuous and allmulticast mode
Add promiscuous and allmulticast mode for PF devices and
update the respective feature list.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-07-05 01:52:01 +02:00
Kiran Kumar K
c870701592 net/octeontx2: add extended stats operations
Add extended operations and updated the feature list.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 01:52:01 +02:00
Kiran Kumar K
2265e4b4e8 net/octeontx2: add basic stats operation
Add basic stat operation and updated the feature list.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 01:52:01 +02:00
Vamsi Attunuru
38f566280a net/octeontx2: add link stats operations
Add link stats related operations and mark respective
items in the documentation.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-05 01:52:01 +02:00
Kiran Kumar K
3e3b5c6350 net/octeontx2: support register dump
Add register dump support and mark Registers dump in features.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-05 01:52:01 +02:00
Jerin Jacob
008e97cb40 net/octeontx2: add context debug utils
Add RQ,SQ,CQ context and CQE structure dump utils.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vivek Sharma <viveksharma@marvell.com>
2019-07-05 01:52:01 +02:00
Jerin Jacob
dc47ba15f6 net/octeontx2: handle queue specific error interrupts
Handle queue specific error interrupts.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-05 01:52:01 +02:00
Jerin Jacob
548b5839a3 net/octeontx2: add device configure operation
Add device configure operation. This would call lf_alloc
mailbox to allocate a NIX LF and upon return, AF will
return the attributes for the select LF.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-05 01:52:01 +02:00
Jerin Jacob
60bb09ad2a net/octeontx2: add info get operation
Add device information get operation.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
2019-07-05 01:52:01 +02:00
Jerin Jacob
b26d65bee9 net/octeontx2: handle device error interrupts
Handle device specific error and ras interrupts.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
2019-07-05 01:52:01 +02:00
Jerin Jacob
fb0198b7dc net/octeontx2: add devargs parsing functions
add various devargs command line options supported by this driver.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 01:52:01 +02:00
Jerin Jacob
1e3da54631 net/octeontx2: add device init and uninit
Add basic init and uninit function which includes
attaching LF device to probed PCIe device.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 01:52:01 +02:00
Jerin Jacob
f81db0c8c5 net/octeontx2: add ethdev probe and remove
add basic PCIe ethdev probe and remove.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-05 01:52:01 +02:00
Jerin Jacob
9a8864c8b5 net/octeontx2: add build and doc infrastructure
Adding bare minimum PMD library and doc build infrastructure
and claim the maintainership for octeontx2 PMD.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
2019-07-05 01:52:01 +02:00
Andy Pei
343b8e4ada net/i40e: fix crash when TxQ/RxQ set to 0 in VF
Testpmd would stuck and result in core dump when user specifies an
invalid VF queue number, for example when setting txq or rxq to 0.
When txq or rxq is set to 0, pointer of pointer rxq or txq in
function i40evf_configure_vsi_queues is NULL. The usage of txq[i]
or rxq[0] is valid. This patch fixes this issue.

Fixes: d6b1972909 ("i40evf: support configurable crc stripping")
Cc: stable@dpdk.org

Signed-off-by: Andy Pei <andy.pei@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-07-05 01:52:01 +02:00
Stephen Hemminger
ff155eac93 net/netvsc: fix definition of offload values
The definition of ipsec and rsc offloads was incorrect.
Neither one of these is used by current driver, but the values
should be fixed now for future RSC support.

Fixes: 4e9c73e96e ("net/netvsc: add Hyper-V network device")
Cc: stable@dpdk.org

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
2019-07-05 01:52:01 +02:00
Krzysztof Kanas
4f538fa249 net/af_packet: set default block size to page size
Kernel validates block size to be aligned to page size. Code works on
platforms with page size 4k, but on others e.g. Arm64 fails with default
parameters.

Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-07-05 01:52:01 +02:00
Dekel Peled
585b99fb4a net/mlx5: modify TCP header using Direct Verbs
This patch implements additional actions of packet header
modifications.

Add actions:
- INC_TCP_SEQ - Increase sequence number in the outermost TCP header.
- DEC_TCP_SEQ - Decrease sequence number in the outermost TCP header.
- INC_TCP_ACK - Increase acknowledgment number in the outermost TCP
		header.
- DEC_TCP_ACK - Decrease acknowledgment number in the outermost TCP
		header.

Original work by Xiaoyu Min.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2019-07-05 01:52:01 +02:00
Andrew Rybchenko
8fce2224d0 net/sfc: release port upon close
Set RTE_ETH_DEV_CLOSE_REMOVE upon probe so all the resources
for the port can be freed by rte_eth_dev_close() and the ethdev
port freed.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2019-07-05 01:52:01 +02:00
Andrew Rybchenko
93f993cbbb net/sfc: ensure that device is closed on removal
PCI device may be unplugged when ethdev is not closed yet.

Fixes: aaa3f5f0f7 ("net/sfc: add configure and close stubs")
Cc: stable@dpdk.org

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2019-07-05 01:52:01 +02:00
Anatoly Burakov
028669bc9f eal: hide shared memory config
Now that everything that has ever accessed the shared memory
config is doing so through the public API's, we can make it
internal. Since we're removing quite a few headers from
rte_eal_memconfig.h, we need to add them back in places
where this header is used.

This bumps the ABI, so also change all build files and make
update documentation.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: David Marchand <david.marchand@redhat.com>
2019-07-06 10:32:34 +02:00
Anatoly Burakov
76f80881ef mem: add API to lock/unlock memory hotplug
Currently, the memory hotplug is locked automatically by all
memory-related _walk() functions, but sometimes locking the
memory subsystem outside of them is needed. There is no
public API to do that, so it creates a dependency on shared
memory config to be public. Fix this by introducing a new
API to lock/unlock the memory hotplug subsystem.

Create a new common file for all things mem config, and a
new API namespace rte_mcfg_*, and search-and-replace all
usages of the locks with the new API.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: David Marchand <david.marchand@redhat.com>
2019-07-05 22:12:40 +02:00
Ben Walker
703458e19c bus/pci: consider only usable devices for IOVA mode
When selecting the preferred IOVA mode of the pci bus, the current
heuristic ("are devices bound?", "are devices bound to UIO?", "are pmd
drivers supporting IOVA as VA?" etc..) should honor the device
white/blacklist so that an unwanted device does not impact the decision.

There is no reason to consider a device which has no driver available.

This applies to all OS, so implements this in common code then call a
OS specific callback.

On Linux side:
- the VFIO special considerations should be evaluated only if VFIO
  support is built,
- there is no strong requirement on using VA rather than PA if a driver
  supports VA, so defaulting to DC in such a case.

Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Anatoly Burakov <anatoly.burakov@intel.com>
2019-07-05 16:56:00 +02:00
Bruce Richardson
34921a6fa0 raw/ioat: fix icc build
When using _mm_set_epi64() rather than _mm_set_epi64x() intrinsic, ICC
tries to use the x87 floating point registers, leading to warnings about
not properly clearing value when switching between x87 and SSE/AVX modes.

	error #13203: No EMMS instruction before call to function

Fix this by using the set64x() intrinsic.

Fixes: 0a92e63fc4 ("raw/ioat: add local API to perform copies")

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Tested-by: Anatoly Burakov <anatoly.burakov@intel.com>
2019-07-05 15:01:59 +02:00
Xiaoyun Li
c5eebf85ba examples/ntb: add example for NTB
Enable an example for rawdev ntb. Support interactive mode to send
file on one host and receive file from another host. The command line
would be 'send [filepath]' and 'receive [filepath]'.

But since the FIFO is not enabled right now, use rte_memcpy as the enqueue
and dequeue functions and only support transmitting file no more than 4M.

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-07-05 12:50:19 +02:00
Xiaoyun Li
62012a7681 raw/ntb: add handshake process
Add handshake process using doorbell so that two hosts can
communicate to start and stop.

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-07-05 12:50:19 +02:00
Xiaoyun Li
034c328eb0 raw/ntb: support Intel NTB
Add in the list of registers for the device.
And enable NTB device ops for Intel Skylake platform.

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-07-05 12:50:19 +02:00
Xiaoyun Li
2773100279 raw/ntb: introduce NTB raw device driver
Introduce rawdev driver support for NTB (Non-transparent Bridge) which
can help to connect two separate hosts with each other.

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-07-05 12:49:33 +02:00
Satha Rao
b225073dda raw/octeontx2_dma: add driver self test
Sample test to verify DMA functionality, this test covers
internal transfer mode.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 12:43:52 +02:00
Satha Rao
78ca17f594 raw/octeontx2_dma: add dequeue and device control operations
Add dequeue, device start, stop, close and reset operations.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 12:43:49 +02:00
Satha Rao
59d345dad3 raw/octeontx2_dma: add enqueue operation
Add enqueue operation.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 12:43:48 +02:00
Satha Rao
f613c52f7f raw/octeontx2_dma: add device close operation
Send message to PF to stop DMA queue when device close is
called from application.
Defined the required data structures to support enqueue and
dequeue APIs.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 12:43:46 +02:00
Satha Rao
04b7dde74c raw/octeontx2_dma: add device configuration
Register dev_configure API to configure DPI PCI devices.
After successful initialization send message to PF to open
corresponding DPI DMA queue. At present hardware doesn't
support mail box for DPI, so PMD to PF communication uses
pre build kernel devfs.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 12:43:45 +02:00
Satha Rao
cce02d4d78 raw/octeontx2_dma: update probe function
Probe function enhanced to allocate and initialize PMD private data.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 12:43:41 +02:00
Jerin Jacob
185656e7c9 raw/octeontx2_dma: add build infra and device probe
Add the make and meson based build infrastructure along
with the DMA device probe with documentation infrastructure.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
2019-07-05 12:43:30 +02:00
Pavan Nikhilesh
29893042c2 mempool/octeontx2: fix clang build for arm64
The ARMv8.1 CASP instruction works with even register pairs and since
there no register constraint in older versions of GCC/Clang, use
explicit register allocation to satisfy CASP requirements.
Remove function level optimization specification as Clang doesn't have
support for it and explicit register allocation removes the need for it.

Fixes build issue with arm64-armv8a-linux-clang.

Fixes: ee338015e7 ("mempool/octeontx2: add optimized dequeue operation for arm64")

Reported-by: Gavin Hu <gavin.hu@arm.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-07-05 10:55:46 +02:00
Li Qiang
d37f5f279b mempool/dpaa: fix leak in pool creation failure
When 'rte_zmalloc' failed dpaa_mbuf_create_pool() forgets freeing
'bp' thus leading resource leak. This patch avoids this.

Coverity issue: 337679

Signed-off-by: Li Qiang <liq3ea@163.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2019-07-04 17:20:33 +02:00
Pavan Nikhilesh
cea66312b4 event/octeontx2: add libatomic dependency for 32-bit clang
When compiling with clang on 32-bit platforms, we are missing
copies of 64-bit atomic functions. We can solve this by linking
against libatomic for the drivers and libs which need those
atomic ops.

Fixes: f0b9982cb3 ("event/octeontx2: add TIM bucket operations")

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-04 17:12:55 +02:00
Amit Gupta
e66a5a8270 drivers/octeontx2: fix icc build for i686
Fix the following ICC specific compilation issue with i686 build.

dpdk/drivers/common/octeontx2/otx2_mbox.c(47): error #2259:
non-pointer conversion from "unsigned long long" to "struct mbox_hdr *"
may lose significant bits
(struct mbox_hdr *)((uintptr_t)mdev->mbase + mbox->tx_start);

Fixes: 732377a679 ("mempool/octeontx2: add build infra and device probe")
Fixes: 371d3212cb ("common/octeontx2: add build infrastructure and HW definition")

Signed-off-by: Amit Gupta <agupta3@marvell.com>
2019-07-04 16:46:33 +02:00
Andy Pei
79f52bff01 raw/ifpga: fix unintentional integer overflow
cast unsigned int ports_per_retimer, unsigned int nums_retimer,
unsigned int nums_fvl and unsigned int ports_per_fvl to uint64_t
before multiply operation, to avoid Unintentional integer overflow.

Coverity issue: 337924, 337926
Fixes: d1cd4eb2d4 ("raw/ifpga: support ipn3ke")
Cc: stable@dpdk.org

Signed-off-by: Andy Pei <andy.pei@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2019-07-04 15:49:59 +02:00
Tianfei Zhang
12f92a513a raw/ifpga/base: fix retimer link status
Fix the readout retimer link status incorrectly when we
remove the linux intel-fpga-driver and run the DPDK application.
The linux driver will stop the retimer when remove the kernel
modules.

Fixes: 8a256bef ("raw/ifpga/base: add eth group driver")
Cc: stable@dpdk.org

Reported-by: Amrutha Sampath <amrutha.sampath@intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2019-07-04 15:36:12 +02:00
Tianfei Zhang
4507a3d1f8 raw/ifpga/base: fix physical address info
Fix miss phy_addr on ifpga_acc_get_region_info() function.

Fixes: 56bb54ea1b ("raw/ifpga/base: add Intel FPGA OPAE share code")
Cc: stable@dpdk.org

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2019-07-04 15:35:26 +02:00
Tianfei Zhang
a3056b6b05 raw/ifpga/base: fix bit fields definition
Fix CTRL_DEV_SELECT bit fields definition about eth_group devices.

Fixes: 8a256bef32 ("raw/ifpga/base: add eth group driver")
Cc: stable@dpdk.org

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2019-07-04 15:35:09 +02:00
Tianfei Zhang
8e80eb4e62 raw/ifpga/base: fix logically dead code
add temporary variable in max10_reg_write().

Coverity issue: 337927
Fixes: 96ebfcf ("raw/ifpga/base: add SPI and MAX10 device driver")
Cc: stable@dpdk.org

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2019-07-04 15:34:55 +02:00
Tianfei Zhang
8234347f99 raw/ifpga/base: fix use of untrusted scalar value
Add checking the buffer size and use
const char * for buffer declaration.

Coverity issue: 279449
Fixes: ef1e8ede ("raw/ifpga: add Intel FPGA bus rawdev driver")
Cc: stable@dpdk.org

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2019-07-04 15:30:52 +02:00
Bruce Richardson
0a92e63fc4 raw/ioat: add local API to perform copies
Add local APIs to trigger data copies, and retrieve handle values once
those copies are completed. Included are unit tests to validate the data
is copies correctly.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:44:40 +02:00
Bruce Richardson
39e4701f0b raw/ioat: add statistics functions
Add stats functions to track what is happening in the driver, and put
unit tests to check those.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:44:35 +02:00
Bruce Richardson
849470d522 raw/ioat: add configure, start and stop functions
Allow initializing a driver instance. Include selftest to validate these
functions.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:44:31 +02:00
Bruce Richardson
b69512dda1 raw/ioat: add device info function
Add in the "info_get" function to the driver, to allow us to query the
device. This allows us to have the unit test pick up the presence of
supported hardware or not.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:44:28 +02:00
Bruce Richardson
abff4333ec raw/ioat: create device on probe and destroy on release
Add the create/destroy driver functions so that we can actually allocate
a rawdev and destroy it when done. No rawdev API functions are actually
implemented at this point.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:44:23 +02:00
Bruce Richardson
f50979dc4c raw/ioat: add register definition file
Add in the list of registers for the device. File is taken from the SPDK
project:

  https://github.com/spdk/spdk/blob/master/include/spdk/ioat_spec.h

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:44:23 +02:00
Bruce Richardson
f687e842e3 raw/ioat: introduce IOAT driver
Add stubs for ioat rawdev driver support in DPDK, specifically:

  * makefile and meson build hooks
  * initial public header file
  * rawdev main C file, with probe and release functions
  * release note update announcing the driver
  * initial documentation for the new section in the rawdev doc
  * unit test stubs for device unit tests

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-04 09:43:42 +02:00
Morten Brørup
f0c2dc8201 net: move TCP flags from ethdev header
TCP flags were moved to the TCP header file from the Ethernet control
header file, and the RTE prefix was added to their names.

Missing TCP ECN flags were added.

The ALL mask did not include TCP ECN flags, so it was renamed to reflect
that it applies to N-tuple filtering only.

Updated other files affected by the renaming accordingly.

Signed-off-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2019-07-03 12:57:30 +02:00
Liron Himi
d72ce66556 net/mvneta: optimize checksum generation offload
For tx checksum offload it is not mandatory to provide
a valid packet_type in addition to a valid ol_flags.
This patch only use ol_flags information for this feature
as a performance improvement.

Signed-off-by: Liron Himi <lironh@marvell.com>
Reviewed-by: Yuri Chipchev <yuric@marvell.com>
Tested-by: Liron Himi <lironh@marvell.com>
2019-07-03 12:57:30 +02:00
Yuri Chipchev
15ae783a15 net/mvneta: reset stats during device init
reset device statistics on device initialization

Signed-off-by: Yuri Chipchev <yuric@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
Tested-by: Yuri Chipchev <yuric@marvell.com>
2019-07-03 12:57:30 +02:00
Liron Himi
09a6afe7e4 net/mvneta: fix ierror statistics
Error packets were counted twice due to use of redundant counters.

Fixes: e9d5faffd1 ("net/mvneta: support basic stats")
Cc: stable@dpdk.org

Signed-off-by: Liron Himi <lironh@marvell.com>
Reviewed-by: Yuri Chipchev <yuric@marvell.com>
Tested-by: Liron Himi <lironh@marvell.com>
2019-07-03 12:57:30 +02:00
Qiming Yang
d4c5136227 net/ice: support UDP tunnelling port
Enabled UDP tunnel port add and delete functions.

Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2019-07-03 12:57:30 +02:00
Qiming Yang
d76116a467 net/ice: add generic flow API
This patch adds ice_flow_create, ice_flow_destroy,
ice_flow_flush and ice_flow_validate support,
these are used to handle all the generic filters.

Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2019-07-03 12:57:30 +02:00
Wei Zhao
57c4f26935 net/ice: enable switch filter
The patch enables the backend of rte_flow. It transfers
rte_flow_xxx to device specific data structure and
configures packet process engine's binary classifier
(switch) properly.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2019-07-03 12:57:30 +02:00
Leyi Rong
60687da86a net/ice/base: fix inner L2 offset in GRE dummy packet
The offset for the inner L2 header in the dummy GRE packet
was off by 2 bytes so updated the offset.

Fixes: 839c0a4b77 ("net/ice/base: enable additional switch rules")

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-07-03 12:57:30 +02:00
Leyi Rong
ee3e244afb net/ice/base: support ethertype switch filters
Add protocol definitions for ethertype.
Add ice_ethtype_hdr structure definition into the ice_prot_hdr union.
Add ethtype offsets into the training packet maps.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Tested-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-07-03 12:57:30 +02:00
Leyi Rong
38d9b0b03c net/ice/base: support IPv6 based switch filters
- Add IPv6 switch rule support.
- Add IPv6 training packet.
- Correct name of IPv6 header variable.
- Fix enum values so that they point to the proper
  ice_prot_ext_tbl_entry field.

Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-07-03 12:57:30 +02:00
Dan Wei
aa6ff92898 net/ipn3ke: modify AFU configurations
Modify AFU configurations for new BBS (Blue Bitstream) of A10 on N3000
card:
- AFU register access: RTL changes the UPL (User Programmable Logic
which is the container of vBNG IP) base address and the read/write
commands of register indirect access.
- Poll the INIT_STS register to wait for the vBNG IP and DDR reset
completion.
- Refine log for debug: print UPL_version not only for vBNG bit stream,
but also for other bit streams.

Fixes: c01c748e4a ("net/ipn3ke: add new driver")
Cc: stable@dpdk.org

Signed-off-by: Dan Wei <dan.wei@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2019-07-03 12:57:30 +02:00
Rastislav Cernay
f37c57a1a3 net/nfb: support Silicom Mango card
Add support for Silicom FB2CGG3 smart NIC

Signed-off-by: Rastislav Cernay <cernay@netcope.com>
2019-07-03 12:57:30 +02:00
Rastislav Cernay
6595e2f72e net/szedata2: support Silicom Mango card
Add support for Silicom FB2CGG3 smart NIC

Signed-off-by: Rastislav Cernay <cernay@netcope.com>
Acked-by: Jan Remes <remes@netcope.com>
2019-07-03 12:57:30 +02:00
Pavan Nikhilesh
28e767e819 event/octeontx2: add devargs to control timer adapters
Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.

Example:
	--dev "0002:0e:00.0,tim_ring_ctl=[2-1023-1-0]"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:28 +02:00
Pavan Nikhilesh
b2530cda86 event/octeontx2: add devargs to limit timer adapters
Add devargs to limit the max number of TIM rings reserved on probe.
Since, TIM rings are HW resources we can avoid starving other
applications by not grabbing all the rings.

Example:
	--dev "0002:0e:00.0,tim_rings_lmt=2"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:22 +02:00
Pavan Nikhilesh
d202edd715 event/octeontx2: add timer adapter start and stop
Add event timer adapter start and stop functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:20 +02:00
Pavan Nikhilesh
f513827934 event/octeontx2: add timer stats get and reset
Add event timer adapter statistics get and reset functions.
Stats are disabled by default and can be enabled through devargs.

Example:
	--dev "0002:0e:00.0,tim_stats_ena=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:10 +02:00
Pavan Nikhilesh
17424ededb event/octeontx2: add timer cancel function
Add function to cancel event timer that has been armed.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:09 +02:00
Pavan Nikhilesh
95e4e4ec74 event/octeontx2: add timer arm timeout burst
Add event timer arm timeout burst function.
All the timers requested to be armed have the same timeout.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:08 +02:00
Pavan Nikhilesh
80999bac03 event/octeontx2: add timer arm routine
Add event timer arm routine.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:07 +02:00
Pavan Nikhilesh
f0b9982cb3 event/octeontx2: add TIM bucket operations
Add TIM bucket operations used for event timer arm and cancel.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:05 +02:00
Pavan Nikhilesh
984ffd72d6 event/octeontx2: add timer adapter info function
Add TIM event timer adapter info get function.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:04 +02:00
Pavan Nikhilesh
ffa4ec0b60 event/octeontx2: allow adapters to resize inflight buffers
Add internal SSO functions to allow event adapters to resize SSO buffers
that are used to hold in-flight events in DRAM.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:03 +02:00
Pavan Nikhilesh
f67c9e8df9 event/octeontx2: add TIM IRQ handlers
Register and implement TIM IRQ handlers for error interrupts

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:02 +02:00
Pavan Nikhilesh
d457de0fe0 event/octeontx2: add devargs to modify chunk slots
Add devargs support to modify number of chunk slots. Chunks are used to
store event timers, a chunk can be visualised as an array where the last
element points to the next chunk and rest of them are used to store
events. TIM traverses the list of chunks and enqueues the event timers
to SSO.
If no argument is passed then a default value of 255 is taken.

Example:
	--dev "0002:0e:00.0,tim_chnk_slots=511"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:52 +02:00
Pavan Nikhilesh
464060c02f event/octeontx2: add devargs to disable NPA
If the chunks are allocated from NPA then TIM can automatically free
them when traversing the list of chunks.
Add devargs to disable NPA and use software mempool to manage chunks.

Example:
	--dev "0002:0e:00.0,tim_disable_npa=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:43 +02:00
Pavan Nikhilesh
dc2aae650d event/octeontx2: allow TIM to optimize config
Allow TIM to optimize user supplied configuration based on
RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES flag.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:42 +02:00
Pavan Nikhilesh
411c062505 event/octeontx2: create and free timer adapter
When the application calls timer adapter create the following is used:
- Allocate a TIM lf based on number of lf's provisioned.
- Verify the config parameters supplied.
- Allocate memory required for
	* Buckets based on min and max timeout supplied.
	* Allocate the chunk pool based on the number of timers.

On Free:
- Free the allocated bucket and chunk memory.
- Free the TIM lf allocated.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:38 +02:00
Pavan Nikhilesh
278821213a event/octeontx2: add timer adapter capabilities
Add function to retrieve event timer adapter capabilities.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:37 +02:00
Pavan Nikhilesh
382f892267 event/octeontx2: support event timer
Add event timer adapter aka TIM initialization on SSO probe.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:35 +02:00
Pavan Nikhilesh
62561532ac event/octeontx2: add SSO selftest
Add selftest to verify sanity of SSO.
Can be run by passing devargs to SSO PF as follows:

Example:
	--dev "0002:0e:00.0,selftest=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:29 +02:00
Pavan Nikhilesh
de128f732f event/octeontx2: add device stop and close functions
Add event device stop and close callback functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:27 +02:00
Pavan Nikhilesh
9c96ff7696 event/octeontx2: add devargs to control SSO GGRP QoS
SSO GGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO GGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to GGRPs based on a preconfigured threshold.
We can control the QoS of SSO GGRP by modifying the above mentioned
thresholds. GGRPs that have higher importance can be assigned higher
thresholds than the rest.

Example:
	--dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]

Qx  -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.

The values need to be expressed in terms of percentages, 0 represents
default.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:23 +02:00
Pavan Nikhilesh
5d6c50ffec event/octeontx2: add device start function
Add eventdev start function along with few cleanup API's to maintain
sanity.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:22 +02:00
Pavan Nikhilesh
09d5c0f356 event/octeontx2: add devargs to force legacy mode
Octeontx2 SSO by default is set to use dual workslot mode.
Add devargs option to force legacy mode i.e. single workslot mode.
Example:
	--dev "0002:0e:00.0,single_ws=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:17 +02:00
Pavan Nikhilesh
54c5d3c24d event/octeontx2: add worker dual GWS dequeue functions
Add workder dual workslot mode dequeue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:16 +02:00
Pavan Nikhilesh
ad4a8adf25 event/octeontx2: add worker dual GWS enqueue functions
Add dual workslot mode event enqueue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:14 +02:00
Pavan Nikhilesh
21d8822180 event/octeontx2: add SSO dual GWS HW device operations
Add SSO dual workslot mode GWS HW device operations.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:12 +02:00