This adds support for matching against a core lookup table when performing
early boot core lookup, and includes the BCM4706/Northstar-specific
ChipCommon core ID in the set of supported ChipCommon cores.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D10033
While there, parse u-boot provided command line arguments
for supported switches and update boothowto appropriately.
Also support setting kenv variables from the kernel comman
line.
PR: 216831 (modified)
as kernel drivers and their dependency onto mmc(4); this allows for
incrementing the mmc(4) module version but also for entire omission
of these bridge declarations for mmccam(4) in a single place, i. e.
in dev/mmc/bridge.h.
comments, marking unused parameters as such, style(9), whitespace,
etc.
o In the mmc(4) bridges and sdhci(4) (bus) front-ends:
- Remove redundant assignments of the default bus_generic_print_child
device method (I've whipped these out of the tree as part of r227843
once, but they keep coming back ...),
- use DEVMETHOD_END,
- use NULL instead of 0 for pointers.
o Trim/adjust includes.
Renumber cluase 4 to 3, per what everybody else did when BSD granted
them permission to remove clause 3. My insistance on keeping the same
numbering for legal reasons is too pedantic, so give up on that point.
Submitted by: Jan Schaumann <jschauma@stevens.edu>
Pull Request: https://github.com/freebsd/freebsd/pull/96
Make the random number generator work so we can do WPA encryption on the AP's.
Submitted by: Michael Vale <m.vale@live.com.au>
Pull Request: https://github.com/freebsd/freebsd/pull/16
This is required for FDT's standard "reg-io-width" property
(similar to "reg-shift" property) found in many DTS files.
This fixes operation on Altera Arria 10 SOC Development Kit,
where standard ns8250 uart allows 4-byte access only.
Reviewed by: kan, marcel
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D9785
Convert PCIe hot plug support over to asking the firmware, if any, for
permission to use the HotPlug hardware. Implement pci_request_feature
for ACPI. All other host pci connections to allowing all valid feature
requests.
Sponsored by: Netflix
Stop building BERI_DE4_BASE and BERI_SIM_BASE, they aren't particularly
valid as they don't have a root dev. Do build BERI_DE4_SDROOT which
does so devices get coverage.
Remove ident from BERI_DE4_BASE for the reasons above which will cause
it to fail to build. BERI_SIM_BASE was already this way and broke
universe.[0]
Reported by: rpokala
Sponsored by: DARPA, AFRL
Implement get_pcpu() for amd64/sparc64/mips/powerpc, and use it to
replace pcpu_find(curcpu) in MI code.
Reviewed by: andreast, kan, lidl
Tested by: lidl(mips, sparc64), andreast(powerpc)
Differential Revision: https://reviews.freebsd.org/D9587
The types are for the byte offset and page index in vm object. They
are similar to off_t, which is defined as 64bit MI integer. Using MI
definitions will allow to provide consistent MD values of vm
object-related maximum sizes.
Reviewed by: alc
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
The switch to get_pcpu() in MI code seems to cause hangs on MIPS.
Back out until we can get a better idea of what's happening there.
Reported by: kan, lidl
atomic_fcmpset_*() is analogous to atomic_cmpset(), but saves off the
read value from the target memory location into the 'old' pointer.
Reviewed by: imp, brooks
Requested by: mjg
Differential Revision: https://reviews.freebsd.org/D9391
Upstream GCC and devel/mips64-gcc use "octeon+" as the CPU setting for
the Octeon processor in the EdgeRouter Lite. As of r312899 the base
system GCC 4.2.1 accepts octeon+ as an alias for the Octeon support
added in r208737 for the same CPU.
Sponsored by: The FreeBSD Foundation
This patch adds missing hints for ath0 (eepromaddr) and GPIO (mask & leds).
ath0 doesn't work without eeprom hints, so this commit should make wifi
works on Onion Omega.
GPIO mask is required if you want to use gpiobus and GPIO pins on your
board. Onion Omega has several leds connected to gpio pins (one on board,
one color on dock).
This commit adds mask for gpiobus and allow you to turn off/on leds via
/dev/leds/{board,blue,green,red} (on by default).
Tested on Onion Omega 1.
Reviewed by: adrian
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D9107
- em(4) igb(4) and lem(4)
- deprecate the igb device from kernel configurations
- create a symbolic link in /boot/kernel from if_em.ko to if_igb.ko
Devices tested:
- 82574L
- I218-LM
- 82546GB
- 82579LM
- I350
- I217
Please report problems to freebsd-net@freebsd.org
Partial review from jhb and suggestions on how to *not* brick folks who
originally would have lost their igbX device.
Submitted by: mmacy@nextbsd.org
MFC after: 2 weeks
Relnotes: yes
Sponsored by: Limelight Networks and Dell EMC Isilon
Differential Revision: https://reviews.freebsd.org/D8299
Build and install an o32 set of libraries on mips64 suitable for
running o32 binaries via COMPAT_FREEBSD32. Enable COMPAT_FREEBSD32 in
MALTA64.
Reviewed by: jmallett, imp
Sponsored by: DARPA / AFRL
Differential Revision: https://reviews.freebsd.org/D9032
The format strings weren't checked when stacksave_subr() used a function
pointer for printf instead of directly using db_printf().
Reported by: kib
Sponsored by: DARPA / AFRL
Previously, the stack unwinder tried to locate the start of the function
in each frame by walking backwards until it found an instruction that
modified the stack pointer and then assumed that was the first instruction
in a function. The unwinder would only print a function name if the
starting instruction's address was an exact match for a symbol name.
However, not all functions generated by modern compilers start off functions
with that instruction. For those functions, the unwinder would fail to
find a matching function name. As a result, most frames in a stack
trace would be printed as raw hex PC's instead of a function name.
Stop depending on this incorrect assumption and just use db_printsym()
like other platforms to display the function name and offset for each
frame. This generates a far more useful stack trace.
While here, don't print out curproc's pid at the end of the trace. The
pid was always from curproc even if tracing some other process.
In addition, remove some rotted comments about hardcoded constants that
are no longer hardcoded.
Sponsored by: DARPA / AFRL
There was a single call to stacktrace() under an #ifdef DEBUG to obtain
a stack trace during a fault that resulted in a function pointer to a
printf function being passed to stacktrace_subr() in db_trace.c. The
kernel now has existing interfaces for obtaining a stack trace outside
of DDB (kdb_backtrace(), or the stack_*() API) that should be used instead.
Rather than fix the one call however, remove it since the kernel will
dump a trace anyway once it panics.
Make stacktrace_subr() static, remove the function pointer and change it
to use db_printf() explicitly.
Discussed with: kan
Sponsored by: DARPA / AFRL
Use the trapframe unwinder recently added for kernel stack overflow
panics for frames crossing MipsKernGenException and MipsKernIntr.
This provides more reliably unwinding across nested interrupts and
exceptions in the kernel.
While here, dump the value of the CAUSE and BADVADDR registers when
crossing a trapframe.
Submitted by: rwatson (original version)
Obtained from: CheriBSD
Sponsored by: DARPA / AFRL
Recognize new MACHINE_ARCH names now as we have added hardfloat support.
Switch JZ4780 to mipselhf and remove all uses of TARGET_ARCH in kernel
.mk files.
Reviewed by: adrian
Differential Revision: https://reviews.freebsd.org/D8989
Ingenic CPUs treat plain cache writeback as local-only operation and do
nothing if that is a remote CPU that holds the dirty cache line. They
do broadcast invalidate and write-and-invalidate to other cores though,
so take advantage of that and use wbinv in place of wb as this still gives
us required busdma semantics. Otherwise we'd have to do IPI to remote CPU
ourselves.
transmitter, but not both at the same time. This patch:
- Adds a dev.pcm.0.internal_codec sysctl node for selecting between
internal and external codec
- Changes playback sample rate from 96 kHz to 48 kHz for HDMI compatibility
- Enables i2s clock on codec access
Reviewed by: br
Differential Revision: https://reviews.freebsd.org/D8960
Some MIPS revisions do implement uncached-accelerate caching
attribute, but place extra requirement on access, such as
partial-word or out-of-sequence writes potentially having an
“unpredictable” effects.
On platforms that have uncached-accelerate cache attribute, map it
to VM_MEMATTR_WRITE_COMBINING. Otherwise, leave write comining
undefined.
Reviewed by: adrian, jhb (glance)
Differential Revision: https://reviews.freebsd.org/D8894
Kernel stack overflows in MIPS call panic() directly from an assembly
handler after storing the interrupted context's registers in a
trapframe. Rather than inferring the location of ra, sp, and pc from
the instruction stream, recognize the pc of a kernel stack overflow
and pull the registers from the trapframe.
Sponsored by: DARPA / AFRL
- Honor PG_NODUMP by not dumping pages with this flag set.
- Pat the watchdog during dumps to avoid a watchdog reset while writing
out a dump.
- Reformat the output during a dump to update every 10% done rather than
every 2MB dumped.
- Include UMA small pages and pages holding PV entries in minidumps.
Sponsored by: DARPA / AFRL
dump_avail[] is supposed to be a superset of phys_avail[] that
describes all of the memory ranges that should be included in a full
dump. minidumps don't consider pages described by dump_avail[] to be
valid and thus they are excluded via the is_dumpable() function. Most
MIPS platforms (including MALTA) set dump_avail[] to be identical to
phys_avail[]. In particular, phys_avail[] doesn't include the kernel
itself, so pages for the kernel and it's global variables are not
considered dumpable and not included in the dump. Fix this by setting
dump_avail[0] to the first memory address (0) rather than the end of
the kernel.
Several other MIPS platforms have the same bug, though I am only able
to test malta in qemu. The correct fix is to set dump_avail[] to
describe RAM and in particular to not set dump_avail[0] to the end of
the kernel (kernel_kseg0_end).
Sponsored by: DARPA / AFRL
As cs is stored in a uint32_t, use the last bit to store the
active high flag as it's unlikely that we will have that much CS.
Reviewed by: loos
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D8614
When the kernel debugger is entered, makectx() is called to store
appropriate state from the trapframe for the debugger into a global
kdb_pcb used as the thread context of the thread entering the
debugger. Stack unwinders for DDB called via db_trace_thread() are
supposed to then use this saved context so that the stack trace for
the current thread starts at the location of the event that triggered
debugger entry.
MIPS was instead starting the stack trace of the current thread from
the context of db_trace_thread itself and unwinding back out through
the debugger to the original frame. Fix a couple of things to bring
MIPS inline with other platforms:
- Fix makectx() to store the PC, SP, and RA in the right portion of
the PCB used by db_trace_thread().
- Fix db_trace_thread() to always use kdb_thr_ctx() (and thus kdb_pcb
for the debugger thread).
- Move the logic for tracing curthread from within the current
function into db_trace_self() to match other architectures.
Sponsored by: DARPA / AFRL
This fixes backtraces from DDB in n32 kernels as uintptr_t is only a
uint32_t. In particular, the upper 32-bits of each register value were
treated as the register's value breaking both the output of register
values, but also the values of 'ra' and 'sp' required to walk up to the
previous frame.
Sponsored by: DARPA / AFRL
This commit corrects print of nomatch (newline was too early) and fix
unit number for new child in ar5315_spi (was 0, now is -1 to calculate it
according to actual system state)
Submitted by: Hiroki Mori <yamori813@yahoo.co.jp>
Reviewed by: ray, loos, mizhka
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D8749
Changes include modifications in kernel crash dump routines, dumpon(8) and
savecore(8). A new tool called decryptcore(8) was added.
A new DIOCSKERNELDUMP I/O control was added to send a kernel crash dump
configuration in the diocskerneldump_arg structure to the kernel.
The old DIOCSKERNELDUMP I/O control was renamed to DIOCSKERNELDUMP_FREEBSD11 for
backward ABI compatibility.
dumpon(8) generates an one-time random symmetric key and encrypts it using
an RSA public key in capability mode. Currently only AES-256-CBC is supported
but EKCD was designed to implement support for other algorithms in the future.
The public key is chosen using the -k flag. The dumpon rc(8) script can do this
automatically during startup using the dumppubkey rc.conf(5) variable. Once the
keys are calculated dumpon sends them to the kernel via DIOCSKERNELDUMP I/O
control.
When the kernel receives the DIOCSKERNELDUMP I/O control it generates a random
IV and sets up the key schedule for the specified algorithm. Each time the
kernel tries to write a crash dump to the dump device, the IV is replaced by
a SHA-256 hash of the previous value. This is intended to make a possible
differential cryptanalysis harder since it is possible to write multiple crash
dumps without reboot by repeating the following commands:
# sysctl debug.kdb.enter=1
db> call doadump(0)
db> continue
# savecore
A kernel dump key consists of an algorithm identifier, an IV and an encrypted
symmetric key. The kernel dump key size is included in a kernel dump header.
The size is an unsigned 32-bit integer and it is aligned to a block size.
The header structure has 512 bytes to match the block size so it was required to
make a panic string 4 bytes shorter to add a new field to the header structure.
If the kernel dump key size in the header is nonzero it is assumed that the
kernel dump key is placed after the first header on the dump device and the core
dump is encrypted.
Separate functions were implemented to write the kernel dump header and the
kernel dump key as they need to be unencrypted. The dump_write function encrypts
data if the kernel was compiled with the EKCD option. Encrypted kernel textdumps
are not supported due to the way they are constructed which makes it impossible
to use the CBC mode for encryption. It should be also noted that textdumps don't
contain sensitive data by design as a user decides what information should be
dumped.
savecore(8) writes the kernel dump key to a key.# file if its size in the header
is nonzero. # is the number of the current core dump.
decryptcore(8) decrypts the core dump using a private RSA key and the kernel
dump key. This is performed by a child process in capability mode.
If the decryption was not successful the parent process removes a partially
decrypted core dump.
Description on how to encrypt crash dumps was added to the decryptcore(8),
dumpon(8), rc.conf(5) and savecore(8) manual pages.
EKCD was tested on amd64 using bhyve and i386, mipsel and sparc64 using QEMU.
The feature still has to be tested on arm and arm64 as it wasn't possible to run
FreeBSD due to the problems with QEMU emulation and lack of hardware.
Designed by: def, pjd
Reviewed by: cem, oshogbo, pjd
Partial review: delphij, emaste, jhb, kib
Approved by: pjd (mentor)
Differential Revision: https://reviews.freebsd.org/D4712
- Defined an abstract NVRAM I/O API (bhnd_nvram_io), decoupling NVRAM/SPROM
parsing from the actual underlying NVRAM data provider (e.g. CFE firmware
devices).
- Defined an abstract NVRAM data API (bhnd_nvram_data), decoupling
higher-level NVRAM operations (indexed lookup, data conversion, etc) from
the underlying NVRAM file format parsing/serialization.
- Implemented a new high-level bhnd_nvram_store API, providing indexed
variable lookup, pending write tracking, etc on top of an arbitrary
bhnd_nvram_data instance.
- Migrated all bhnd(4) NVRAM device drivers to the common bhnd_nvram_store
API.
- Implemented a common bhnd_nvram_val API for parsing/encoding NVRAM
variable values, including applying format-specific behavior when
converting to/from the NVRAM string representations.
- Dropped the now unnecessary bhnd_nvram driver, and moved the
broadcom/mips-specific CFE NVRAM driver out into sys/mips/broadcom.
- Implemented a new nvram_map file format:
- Variable definitions are now defined separately from the SPROM
layout. This will also allow us to define CIS tuple NVRAM
mappings referencing the common NVRAM variable definitions.
- Variables can now be defined within arbitrary named groups.
- Textual descriptions and help information can be defined inline
for both variables and variable groups.
- Implemented a new, compact encoding of SPROM image layout
offsets.
- Source-level (but not build system) support for building the NVRAM file
format APIs (bhnd_nvram_io, bhnd_nvram_data, bhnd_nvram_store) as a
userspace library.
The new compact SPROM image layout encoding is loosely modeled on Apple
dyld compressed LINKEDIT symbol binding opcodes; it provides a compact
state-machine encoding of the mapping between NVRAM variables and the SPROM
image offset, mask, and shift instructions necessary to decode or encode
the SPROM variable data.
The compact encoding reduces the size of the generated SPROM layout data
from roughly 60KB to 3KB. The sequential nature SPROM layout opcode tables
also simplify iteration of the SPROM variables, as it's no longer
neccessary to iterate the full NVRAM variable definition table, but
instead simply scan the SPROM revision's layout opcode table.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D8645
It is required to proceed full cache flush before we can use wait
instruction on multicore, so use nop instead for now.
Submitted by: kan
Sponsored by: DARPA, AFRL
X1000 systems on chips.
Imgtec CI20 and Ingenic CANNA boards supported.
Submitted by: Alexander Kabaev <kan@FreeBSD.org>
Reviewed by: Ruslan Bukin <br@FreeBSD.org>
Sponsored by: DARPA, AFRL
Secondary data cache line size can be bigger than
primary data cache line size, so use biggest value
as a minimum alignment.
Submitted by: kan
Sponsored by: DARPA, AFRL
While there, make param.h guess proper MACHINE_ARCH on hardfloat targets
correctly as well, so tools like bmake can get their defaults right.
This does not help the kernel case, since we compile them with forced
-msoft-float and need to override an incorrect guess by param.h.
Reviewed by: br
Differential Revision: https://reviews.freebsd.org/D8574
This commit improves code styles like:
- removing commented code
- format comments as C-style
- add spaces after #define-s
It also bring ability to build kernel without INTRNG and remove RedBoot dependency.
Tested on FON2201
Submitted by: Hiroki Sato <yamori813@yahoo.co.jp>
Reviewed by: adrian, mizhka
Approved by: adrian(mentor)
Differential Revision: https://reviews.freebsd.org/D8557
Bit identifier of printf %b is octal integer, but not decimal. ULRI bit is
13-th bit (starting with 0) according to MIPS Architecture Volume III v.6.
In this case the bit identifier (starts with 1) should be \16.
Reviewed by: gonzo
Approved by: adrian(mentor)
Differential Revision: https://reviews.freebsd.org/D8516
Add an implementation for pmaps_sync_icache() on MIPS that sync's the
instruction cache on all CPUs via smp_rendezvous() after a debugger
inserts a breakpoint via ptrace(PT_IO).
Tested by: kan (on Creator CI20 running Ingenic JZ4780 SOC)
MFC after: 2 weeks
Sponsored by: DARPA / AFRL
Config7 contains useful fields, for instance, field AR indicating that the D-cache is configured to avoid cache aliases. This patch brings printing of config7 for MIPS 24K, 74K, 1004K.
Reviewed by: adrian
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D8514
Add missing fields ('sr' and 'mc_tls') to 'struct sigcontext'.
The kernel doesn't use 'struct sigcontext' but instead uses 'ucontext_t'
which includes 'mcontext_t' in 'struct sigframe' to build the signal frame.
As a result, this change is not an ABI change but simply making
'struct sigcontext' correct. Note that 'struct sigcontext' is only used
for "Traditional BSD style" signal handlers.
While here, rename the 'xxx' field to '__spare__' to match 'mcontext_t'.
Sponsored by: DARPA, AFRL
All devices:
- add support for rate adaptation via ieee80211_amrr(9);
- use short preamble for transmitted frames when needed;
- multi-bss support:
* for RTL8821AU: 2 VAPs at the same time;
* other: 1 any VAP + 1 sta VAP.
RTL8188CE:
- fix IQ calibration bug (reason of significant speed degradation);
- add h/w crypto acceleration support.
USB:
- A-MPDU Tx support;
- short GI support;
Other:
- add support for RTL8812AU / RTL8821AU chipsets
(a/b/g/n only; no ac yet);
- split merged code into subparts:
* bus glue (usb/*, pci/*, rtl*/usb/*, rtl*/pci/*)
* common (if_rtwn*)
* chip-specific (rtl*/*)
- various other bugfixes.
Due to code reorganization, module names / requirements were changed too:
urtwn urtwnfw -> rtwn rtwn_usb rtwnfw
rtwn rtwnfw -> rtwn rtwn_pci rtwnfw
Tested with RTL8188CE, RTL8188CUS, RTL8188EU and RTL8821AU.
Tested by: kevlo, garga,
Peter Garshtja <peter.garshtja@ambient-md.com>,
Kevin McAleavey <kevin.mcaleavey@knosproject.com>,
Ilias-Dimitrios Vrachnis <id@vrachnis.com>,
<otacilio.neto@bsd.com.br>
Relnotes: yes
When detaching device trees parent devices must be detached prior to
detaching its children. This is because parent devices can have
pointers to the child devices in their softcs which are not
invalidated by device_delete_child(). This can cause use after free
issues and panic().
Device drivers implementing trees, must ensure its detach function
detaches or deletes all its children before returning.
While at it remove now redundant device_detach() calls before
device_delete_child() and device_delete_children(), mostly in
the USB controller drivers.
Tested by: Jan Henrik Sylvester <me@janh.de>
Reviewed by: jhb
Differential Revision: https://reviews.freebsd.org/D8070
MFC after: 2 weeks
with no creative content. Include "lost" changes from git:
o Use /dev/efi instead of /dev/efidev
o Remove redundant NULL checks.
Submitted by: kib@, dim@, zbb@, emaste@
As of r302092, pipe is a wrapper around pipe2 and the pipe syscall is no
longer used. It is included only with the COMPAT_FREEBSD10 kernel option.
Add the compat option to support upgrades from systems with an earlier
userland.
MFC after: 1 week
Keep resource state consistent with INTRNG state - if intr_activate_irq
fails - deactivate resource and propagate error to calling function
Reviewed by: mmel
to add actions that run when a TCP frame is sent or received on a TCP
session in the ESTABLISHED state. In the base tree, this functionality is
only used for the h_ertt module, which is used by the cc_cdg, cc_chd, cc_hd,
and cc_vegas congestion control modules.
Presently, we incur overhead to check for hooks each time a TCP frame is
sent or received on an ESTABLISHED TCP session.
This change adds a new compile-time option (TCP_HHOOK) to determine whether
to include the hhook(9) framework for TCP. To retain backwards
compatibility, I added the TCP_HHOOK option to every configuration file that
already defined "options INET". (Therefore, this patch introduces no
functional change. In order to see a functional difference, you need to
compile a custom kernel without the TCP_HHOOK option.) This change will
allow users to easily exclude this functionality from their kernel, should
they wish to do so.
Note that any users who use a custom kernel configuration and use one of the
congestion control modules listed above will need to add the TCP_HHOOK
option to their kernel configuration.
Reviewed by: rrs, lstewart, hiren (previous version), sjg (makefiles only)
Sponsored by: Netflix
Differential Revision: https://reviews.freebsd.org/D8185
These are older MIPS4kc parts from Atheros. They typically ran at
sub-200MHz and have 11bg, 11a, or 11abg wifi MAC/PHYs integrated.
This port is the initial non-wifi pieces required to bring up the
chip. I'll commit the redboot and other pieces later, and then
hopefully(!) wifi support will follow.
Submitted by: Mori Hiroki <yamori813@yahoo.co.jp>
Differential Revision: https://reviews.freebsd.org/D7237
drivers.
The BMIPS32/BMIPS3300 cores use a register layout distinct from the MIPS74K
core, and are only found on siba(4) devices.
Reviewed by: mizhka
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7791
Move to a per-proc TLS offset rather than incorrectly keying off the
presense of freebsd32 compability in the kernel.
Reviewed by: adrian, sbruno
Obtained from: CheriBSD
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D7843
This will be required for SMP support on MIPS Malta platform.
Reviewed by: adrian
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Differential Revision: https://reviews.freebsd.org/D7835
More changes to MIPS may be required, as commented in D7692, but this
revision aims to restore MIPS INTRNG functionality so we can move on
with working interrupts.
Reported by: yamori813@yahoo.co.jp
Tested by: mizhka (on BCM), sgalabov (on Mediatek)
Reviewed by: adrian, nwhitehorn (older version)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D7692
This patch adds driver implementation for BHND USB core. Driver has been
imported from ZRouter project with small adaptions for FreeBSD 11.
Also it's enabled for BroadCom MIPS74k boards by default. It's fully tested
on Asus boards (RT-N16: external USB, RT-N53: USB bus between SoC and WiFi
chips).
Reviewed by: adrian (mentor), ray
Approved by: adrian (mentor)
Obtained from: ZRouter
Differential Revision: https://reviews.freebsd.org/D7781
Adds support for probing and initializing bhndb(4) bridge state using
the bhnd_erom API, ensuring that full bridge configuration is available
*prior* to actually attaching and enumerating the bhnd(4) child device,
allowing us to safely allocate bus-level agent/device resources during
bhnd(4) bus enumeration.
- Add a bhnd_erom_probe() method usable by bhndb(4). This is an analogue
to the existing bhnd_erom_probe_static() method, and allows the bhndb
bridge to discover the best available erom parser class prior to newbus
probing of its children.
- Add support for supplying identification hints when probing erom
devices. This is required on early EXTIF-only chipsets, where chip
identification registers are not available.
- Migrate bhndb over to the new bhnd_erom API, using bhnd_core_info
records rather than bridged bhnd(4) device_t references to determine
the bridged chipsets' capability/bridge configuration.
- The bhndb parent (e.g. if_bwn) is now required to supply a hardware
priority table to the bridge. The default table is currently sufficient
for our supported devices.
- Drop the two-pass attach approach we used for compatibility with bhndb(4) in
the bhnd(4) bus drivers, and instead perform bus enumeration immediately,
and allocate bridged per-child bus-level resources during that enumeration.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7768
This defines a new bhnd_erom_if API, providing a common interface to device
enumeration on siba(4) and bcma(4) devices, for use both in the bhndb bridge
and SoC early boot contexts, and migrates mips/broadcom over to the new API.
This also replaces the previous adhoc device enumeration support implemented
for mips/broadcom.
Migration of bhndb to the new API will be implemented in a follow-up commit.
- Defined new bhnd_erom_if interface for bhnd(4) device enumeration, along
with bcma(4) and siba(4)-specific implementations.
- Fixed a minor bug in bhndb that logged an error when we attempted to map the
full siba(4) bus space (18000000-17FFFFFF) in the siba EROM parser.
- Reverted use of the resource's start address as the ChipCommon enum_addr in
bhnd_read_chipid(). When called from bhndb, this address is found within the
host address space, resulting in an invalid bridged enum_addr.
- Added support for falling back on standard bus_activate_resource() in
bhnd_bus_generic_activate_resource(), enabling allocation of the bhnd_erom's
bhnd_resource directly from a nexus-attached bhnd(4) device.
- Removed BHND_BUS_GET_CORE_TABLE(); it has been replaced by the erom API.
- Added support for statically initializing bhnd_erom instances, for use prior
to malloc availability. The statically allocated buffer size is verified both
at runtime, and via a compile-time assertion (see BHND_EROM_STATIC_BYTES).
- bhnd_erom classes are registered within a module via a linker set, allowing
mips/broadcom to probe available EROM parser instances without creating a
strong reference to bcma/siba-specific symbols.
- Migrated mips/broadcom to bhnd_erom_if, replacing the previous MIPS-specific
device enumeration implementation.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7748
Idle page zeroing has been disabled by default on all architectures since
r170816 and has some bugs that make it seemingly unusable. Specifically,
the idle-priority pagezero thread exacerbates contention for the free page
lock, and yields the CPU without releasing it in non-preemptive kernels. The
pagezero thread also does not behave correctly when superpage reservations
are enabled: its target is a function of v_free_count, which includes
reserved-but-free pages, but it is only able to zero pages belonging to the
physical memory allocator.
Reviewed by: alc, imp, kib
Differential Revision: https://reviews.freebsd.org/D7714
handling.
- Extended PWRCTL/PMU APIs to support querying clock frequency during very
early boot, prior to bus attach.
- Implement generic PMU-based calculation of UART rclk values.
- Replaced use of static frequency tables (bcm_socinfo) with
runtime-determined values.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7552
- Added bhnd_pmu driver implementations for PMU and PWRCTL chipsets,
derived from Broadcom's ISC-licensed HND code.
- Added bhnd bus-level support for routing per-core clock and resource
power requests to the PMU device.
- Lift ChipCommon support out into the bhnd module, dropping
bhnd_chipc.
Reviewed by: mizhka
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7492
This adds support for performing platform_reset() on all supported
devices, using early boot enumeration of chipc capabilities and
available cores.
- Added Broadcom-specific MIPS CP0 register definitions used by
BCM4785-specific reset handling.
- Added a bcm_platform structure for tracking chipc/pmu/cfe platform
data.
- Extended the BCMA EROM API to support early boot lookup of core info
(including port/region mappings).
- Extended platform_reset() to support PMU, PMU+AOB, and non-PMU
devices.
Reviewed by: mizhka
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7539
This was .. an interesting headache.
There are two halves:
* The earlier IRIX stuff (yes, early) occasionally would do dead
code removal and generate multiple consecutive LO16 entries.
If this is done for REL entries then it's fine - there's no
state kept between them. But gcc 5.x seems to do this for
RELA entries.
eg:
HI1 LO1 HI2 LO2 LO3 HI4 LO4
.. in this instance, LO2 should affect HI2, but LO3 doesn't at all
affect anything. The matching HI3 was in code that was deleted
as "dead code".
Then, the next one:
* A "GCC extension" allows for multiple HI entries before a LO entry;
and all of those HI entries use the first LO entry as their basis
for RELA offset calculations.
It does this so GCC can also do dead code deletion without necessarily
having to geneate fake relocation entries for balanced HI/LO RELA
entries.
eg:
HI1 LO1 HI2 HI3 HI4 LO4 LO5 HI6 LO6 LO7
in this instance, HI{2,3,4} are the same relocation as LO4 (eg .bss)
and need to be buffered until LO4 - then the RELA offset is applied
from LO4 to HI{2,3,4} calculations.
/And/, the AHL from HI4 is used during the LO4 relocation calculation,
just like in the normal (ie, before this commit) implementation.
Then, LO5 doesn't trigger anything - the HI "buffer" is empty,
so there are no HI relocations to flush out.
HI6/LO6 are normal, and LO7 doesn't trigger any HI updates.
Tested:
* AR9344 SoC, kernel modules, using gcc-5.3 (mips-gcc-5.3.0 package)
Notes:
* Yes, I do feel dirty having written this code.
Reviewed by: imp (after a handful of "this should be on fire" moments wrt gcc and this code)
- Read interrupt properties at bus enumeration time and store
it into global mapping table.
- At bus_activate_resource() time, given mapping entry is resolved and
connected to real interrupt source. A copy of mapping entry is attached
to given resource.
- At bus_setup_intr() time, mapping entry stored in resource is used
for delivery of requested interrupt configuration.
- For MSI/MSIX interrupts, mapping entry is created within
pci_alloc_msi()/pci_alloc_msix() call.
- For legacy PCI interrupts, mapping entry must be created within
pcib_route_interrupt() by pcib driver itself.
Reviewed by: nwhitehorn, andrew
Differential Revision: https://reviews.freebsd.org/D7493
This adds support for EARLY_PRINTF via the CFE console; the aim is to
provide a fix for the otherwise cyclic dependency between PMU discovery
and console printf/DELAY:
- We need to parse the bhnd(4) core table to determine the address (and
type) of the PMU/PLL registers and calculate the CPU clock frequency.
- The core table parsing code will emit a printf() if a parse error is
hit.
- Safely calling printf() without EARLY_PRINTF requires a working
DELAY+cninit, which means we need the PMU.
Errors in core table parsing shouldn't happen, but lack of EARLY_PRINTF
makes debugging more difficult.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7498
- Added a generic bhnd_nvram_parser API, with support for the TLV format
used on WGT634U devices, the standard BCM NVRAM format used on most
modern devices, and the "board text file" format used on some hardware
to supply external NVRAM data at runtime (e.g. via an EFI variable).
- Extended the bhnd_bus_if and bhnd_nvram_if interfaces to support both
string-based and primitive data type variable access, required for
common behavior across both SPROM and NVRAM data sources.
- Extended the existing SPROM implementation to support the new
string-based NVRAM APIs.
- Added an abstract bhnd_nvram driver, implementing the bhnd_nvram_if
atop the bhnd_nvram_parser API.
- Added a CFE-based bhnd_nvram driver to provide read-only access to
NVRAM data on MIPS SoCs, pending implementation of a flash-aware
bhnd_nvram driver.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7489
Several files use the internal name of `struct device` instead of
`device_t` which is part of the public API. This patch changes all
`struct device *` to `device_t`.
The remaining occurrences of `struct device` are those referring to the
Linux or OpenBSD version of the structure, or the code is not built on
FreeBSD and it's unclear what to do.
Submitted by: Matthew Macy <mmacy@nextbsd.org> (previous version)
Approved by: emaste, jhibbits, sbruno
MFC after: 3 days
Differential Revision: https://reviews.freebsd.org/D7447
This work, originally from Stacey Son, uses the MIPS UserReg for
reading the TLS data, and will fall back to the normal syscall path
when it isn't supported.
This code dynamically patches cpu_switch() to bypass the UserReg
instruction so to avoid generating a machine exception.
Thanks to sson for the original work, and to Dan Nelson for
bringing it to date and testing it on MIPS32 with me.
Tested:
* mips64 (sson)
* mips74k (dnelson_1901@yahoo.com) - AR9344 SoC, UserReg support
* mips24k (adrian) - AR9331 SoC, no UserReg support
Obtained from: sson, dnelson_1901@yahoo.com
* add an ANY debug level which will always echo the message if debugging
is compiled in;
* log MDIO transaction timeouts if debugging is compiled in;
* the argemdio device is different to arge, so turning on MDIO debugging
flags in arge->sc_debug doesn't help. Add a debug sysctl to argemdio
as well so that MDIO transactions can be debugged.
Tested:
* AR9331
Relying on the boot loader console configuration allows us to use a
common set of device hints for all SENTRY5 devices.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7376
For reasons I won't comment on, the AR934x and QCA953x GPIO_OE register
value is inverted - bit set == input, bit clear == output.
So, fix this in the output setting, in reading the initial state from
the boot loader, and also setting any gpiofunc pins that are necessary.
- Cast 32-bit register values to uintmax_t for use with %jx.
- Add special-case return address handling for MipsKernGenException to
avoid early termination of stack walking in the exception handler
stack frame.
Submitted by: Michael Zhilin <mizhka@gmail.com>
Reviewed by: ray
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6907
Recource management functions in GT PCI controller driver
treated memory/IO resources as KSEG1 addresses, later during
activation these values would be increased by KSEG1 base again
rendering the address invalid and causing "bus error" trap.
Actual logic was converted to use real physical addresses,
so mapping takes place only during activation.
Submitted by: Aleksandr Rybalko <ray@FreeBSD.org>
Approved by: re (gjb)
The delta between SENTRY5 and BCM was already small due to BCM being
derived from SENTRY5; re-integrating the two avoids the maintenance
overhead of keeping them both in sync with bhnd(4) changes.
- Re-integrate minor SENTRY5 deltas in bcm_machdep.c
- Modify uart_cpu_chipc to allow specifying UART debug/console flags via
kenv and device hints.
- Switch SENTRY5 to std.broadcom
- Enabled CFI flash support for SENTRY5
Reviewed by: Michael Zhilin <mizkha@gmail.com> (Broadcom MIPS support)
Approved by: re (gjb), adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6897
Replaces use of DEVICE_IDENTIFY with explicit enumeration of chipc
child devices using the chipc capability structure.
This is a precursor to PMU support, which requires more complex resource
assignment handling than achievable with the static device name-based
hints table.
Reviewed by: Michael Zhilin <mizkha@gmail.com> (Broadcom MIPS support)
Approved by: re (gjb), adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6896
threads, to make it less confusing and using modern kernel terms.
Rename the functions to reflect current use of the functions, instead
of the historic KSE conventions:
cpu_set_fork_handler -> cpu_fork_kthread_handler (for kthreads)
cpu_set_upcall -> cpu_copy_thread (for forks)
cpu_set_upcall_kse -> cpu_set_upcall (for new threads creation)
Reviewed by: jhb (previous version)
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
Approved by: re (hrs)
Differential revision: https://reviews.freebsd.org/D6731
Changes:
- Fixed incorrect MIPS74k vendor ID in the bhnd core descriptor tables
- Fixed MIPS core driver's matching against MIPS/MIPS33 cores.
- Improved MIPS3302 core description.
- Enabled BUS_PASS_BUS on the bhnd nexus drivers to allow early probing
of the MIPS core.
- Enabled BUS_PASS_CPU on the MIPS core driver to ensure correct attach
order.
- Disabled matching of the MIPS core driver on non-SoC devices.
Reviewed by: Michael Zhilin <mizhka@gmail.com>
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6735
p_sched is unused.
The struct td_sched is always co-allocated with the struct thread,
except for the thread0. Avoid useless indirection, instead calculate
td_sched location using simple pointer arithmetic in td_get_sched(9).
For thread0, which is statically allocated, create a structure to
emulate layout of the dynamic allocation.
Reviewed by: jhb (previous version)
Sponsored by: The FreeBSD Foundation
Differential revision: https://reviews.freebsd.org/D6711
Now that bhnd(4) provides feature parity with the previous siba/mips
implementation, we can switch sentry5 over and begin lifting common
support code out for use across bhnd(4) embedded targets.
Changes:
- Fixed enumeration of siba(4) per-core address maps, required for
discovery of memory mapped chipc flash region on siba(4) devices.
- Simplified bhnd kernel configuration (dropped 'bhndbus' option).
- Replaced files.broadcom's direct file references with their
corresponding standard kernel options.
- Lifted out common bcma/siba nexus support, inheriting from the new
generic bhnd_nexus driver.
- Dropped now-unused sentry5 siba code.
- Re-integrated BCM into the universe build now that it actually compiles.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6712
This adds support for serial (via SPI) and parallel (via CFI) flash
as found on BCM47xx/BCM53xx SoCs.
Submitted by: Michael Zhilin <mizhka@gmail.com>
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6250
Etherswitch support is built by default on all SoCs except RT3662/RT3883
as they have no built-in switch and their configurations with external
switches are not yet supported.
Sponsored by: Smartcom - Bulgaria AD
Add more 'compatible' strings found in various LEDE DTS files.
Reviewed by: adrian
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D6432
needed in later changes where we may not be able to lock the pic list lock
to perform a lookup, e.g. from within interrupt context.
Obtained from: ABT Systems Ltd
Sponsored by: The FreeBSD Foundation
PCIe PHY needs different initialization on MT7628/MT7688 SoCs than it does
on MT7620.
However, LEDE (and OpenWRT) dts files have the PCIe node for MT7628/MT7688
as compatible with mt7620-pci.
We already can handle this properly in our driver, so we just need to add
compat strings to fbsd-mt7628an.dtsi and the PCIe driver.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D6395
Relies on BHND(4) driver.
There files contains machine-dependent code for Broadcom MIPS processor and
provide UART driver.
This is a work in progress; it and the current bhnd code is enough to boot
on the ASUS RT-N16 and RT-N53 platforms.
Submitted by: Michael Zhilin <mizhka@gmail.com>
Differential Revision: https://reviews.freebsd.org/D6251
interface with 5 methods to mirror the 5 MSI/MSI-X methods in the pcib
interface. The pcib driver will need to perform a device specific lookup
to find the MSI controller and pass this to intrng as the xref. Intrng
will finally find the controller and have it handle the requested operation.
Obtained from: ABT Systems Ltd
MFH: yes
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D5985
legacy siba sentry5 cpu glue.
The siba_cc code is the hard-coded chipcommon bits for the sentry s5,
which will eventually be replaced with the more flexible bhnd sipa/cc
code.
bwn, etc uses siba_bwn, which doesn't use siba or siba_cc to do anything.
Allow output pins to be read and input pins to be set.
Fix bugs where we were trying to access the gpio softc before doing
device_get_softc.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D6222
struct associated with some type defined in enum intr_map_data_type
must have struct intr_map_data on the top of its own definition now.
When such structs are used, correct type and size must be filled in.
There are three such structs defined in sys/intr.h now. Their
definitions should be moved to corresponding headers by follow-up
commits.
While this change was propagated to all INTRNG like PICs,
pic_map_intr() method implementations were corrected on some places.
For this specific method, it's ensured by a caller that the 'data'
argument passed to this method is never NULL. Also, the return error
values were standardized there.
64-bit MIPS, use superpage rather than physical-segment constants, or
we may improperly fail to apply suitable alignment -- yet still allow
mmap() to appear to succeed.
Reviewed by: sson
MFC after: 1 week
Sponsored by: DARPA, AFRL
Rescanning a PCI bus uses the following steps:
- Fetch the current set of child devices and save it in the 'devlist'
array.
- Allocate a parallel array 'unchanged' initalized with NULL pointers.
- Scan the bus checking each slot (and each function on slots with a
multifunction device).
- If a valid function is found, look for a matching device in the 'devlist'
array. If a device is found, save the pointer in the 'unchanged' array.
If a device is not found, add a new device.
- After the scan has finished, walk the 'devlist' array deleting any
devices that do not have a matching pointer in the 'unchanged' array.
- Finally, fetch an updated set of child devices and explicitly attach any
devices that are not present in the 'unchanged' array.
This builds on the previous changes to move subclass data management into
pci_alloc_devinfo(), pci_child_added(), and bus_child_deleted().
Subclasses of the PCI bus use custom rescan logic explicitly override the
rescan method to disable rescans.
Differential Revision: https://reviews.freebsd.org/D6018
The purpose of this file was to simply detect the UART speed before
attaching the actual ns8250 driver so that we don't have to specify the
UART speed in DTS files.
However, OpenWRT DTS files specify ns16550a as a compatible string in
their DTS files and this makes the original ns8250 driver attach to
the device. So we would have to edit the DTS files anyway and since this
is only the case for MT7621 and MT7628/MT7688 for now, it's better to
just add the clock-frequency property to those (UART is always clocked
by the same clock in both these SoCs, so that's fine) instead of having
a separate driver and still having to change the DTS files.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D6044
This allows us to come closer to OpenWRT vanilla DTS files.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D6045
This allows us to get closer to OpenWRT DTS files and minimize the diffs
a little more.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D6042
rounddown2 tends to produce longer lines than the original code
and when the code has a high indentation level it was not really
advantageous to do the replacement.
This tries to strike a balance between readability using the macros
and flexibility of having the expressions, so not everything is
converted.
Only compile what each SoC needs and get rid of MEDIATEK generic config.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5996
This revision makes the mtk_gpio_v1 driver read its register map property
from the OpenWRT dts files.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D6029
The driver can read and parse the OpenWRT pinctrl dts entries.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5999
OpenWRT's dts files treat RT3050/RT3052/RT3350 within the same SoC dtsi
file, so we need to distinguish between the three dynamically, mainly
because the bit we use to determine the clock speed on RT3050/RT3052
can actually be floating on RT3350 and RT3350 is always at 320MHz.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5983
Add suppport for passing boot arguments via FDT for mediatek/ralink SoCs.
This was taken from kan's work on CI20.
Since most OpenWRT dts files have bootargs defined, we use bsdbootargs
to specify FreeBSD specific arguments.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5979
Revision 298068 changed MIPS_INTRNG and ARM_INTRNG to simply INTRNG.
MEDIATEK_BASE config was missed by this revision, so we change
MIPS_INTRNG to INTRNG here.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5978
This revision gets our Mediatek/Ralink drivers closer to OpenWRT's dts
definitions, so we can reuse them with less modifications later in order
to bring support for a lot of boards at once.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5961
This is actually initialized properly within xhci.c, so it's better to
not initialize it in mtk_xhci.c
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5935
the following:
1. Give the appropriate board dts file to be used by either:
1.1. edit the SoC kernel config required (e.g., MT7620A_FDT) and include
the required FDT_DTS_FILE makeoption; or
1.2. simply supply FDT_DTS_FILE="xx.dts" on the command line when building
the kernel
Of course, the user can also create a completely new kernel config to
match the desired board and include the SoC kernel config from within
it.
If required, edit the MEDIATEK config file, which includes optional
drivers and comment out the unneeded ones.
2.1. this would only make sense if kernel size is a concern. Even if we
build the kernel with all drivers, if we lzma it and package it as a uImage,
its size is still around 1.1MiB.
The user will have to choose a dts file (or create a new one) from
sys/gnu/dts/mips , where all Mediatek/Ralink dts files will be imported via
a later revision.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5966
The ACPI and OFW PCI bus drivers as well as CardBus override this to
allocate the larger ivars to hold additional info beyond the stock PCI ivars.
This removes the need to pass the size to functions like pci_add_iov_child()
and pci_read_device() simplifying IOV and bus rescanning implementations.
As a result of this and earlier changes, the ACPI PCI bus driver no longer
needs its own device_attach and pci_create_iov_child methods but can use
the methods in the stock PCI bus driver instead.
Differential Revision: https://reviews.freebsd.org/D5891
This revision introduces PCIe support for the relevant Mediatek/Ralink
SoCs.
Currently the PCIe support is not converted to INTRNG, this may be a
task for the future.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5886
Tested on a MT7621 board, similar to the WiTi board.
More testing will be required to confirm everything is fine, but things
look good so far.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5885
USB on both MT7621 and MT7688 seems to work much better without doing
slew rate calibration.
These are the only two SoCs, apart from MT7628, which actually make
use of the slew rate calibration routines implemented in the mtk_usb_phy
driver. Since MT7628 is actually a superset of MT7688 things should be
the same for it as well.
We do not remove the code, we simply define it out.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5884
In mtk_soc.c memory is mapped incorrectly for MT7621. This revision fixes
this.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5882
GPIO controller drivers import.
As with other Ralink/Mediatek work, there are 2 versions of the GPIO
controller driver, depending on the type of SoC.
This revision introduces initial support for these.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5877
SPI drivers for the various Ralink/Mediatek SoCs. There are 2 versions of
the SPI controller (so far) present in the supported SoCs, hence v1 and v2
drivers.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5842
USB support
This revision adds USB (EHCI/OHCI/OTG, depending on SoC type) support for
various Ralink/Mediatek SoCs.
Currently USB is not supported on MT7621, this will be a future addition.
A USB PHY driver is also included, so that we can properly initialize the
USB PHY (e.g., clocks, resets, registers where needed), before attempting
to initialize EHCI/OHCI/OTG functionality.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5841
UART drivers.
- uart_dev_mtk.[ch] are the old-style Mediatek/Ralink-specific UART driver
as also found in sys/mips/rt305x/uart_dev_rt305x.c, with minor improvements
and FDT attachment enabled for the appropriate SoCs.
- uart_dev_mtk_ns8250.c is the new-style ns16550a-compatible UART driver
found in newer Mediatek SoCs. It uses the uart_dev_ns8250.c driver
indirectly and is basically just a wrapper around it and only overrides its
probe method.
The reason I am not using the uart_dev_ns8250.c driver directly is because
I have some code that does UART clock detection before initializing the
UART, so that we don't need to hard-code the UART clock frequency in the
dts files for each board.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5840
Interrupt controllers found in various Mediatek/Ralink SoCs.
mtk_intr_v1 and mtk_intr_v2 are basically the same at the moment, with
just different register mappings.
However, v1 interrupt controller has a subset of the functionality of the
v2 interrupt controller, so in the future the v2 interrupt controller driver
may be enhanced, if needed, with things like level/edge interrupts and soft
interrupts. So, for the moment I suggest we keep them as 2 separate files.
mtk_intr_gic provides very basic (similar to v1 and v2) support for MIPS GIC
controllers, which currently maps all interrupts to a single core and sets
them to type level, active high. In the future this may be developed into a
generic GIC controller to support any new MIPS SoCs that include it. The GIC
is a standard MTI interrupt controller in their multi-core line-up (e.g.,
1004K, 1074K, etc.), rather than a SoC-specific controller.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5839
This revision adds the following to the Mediatek/Ralink support:
- initial support for "clocks" FDT property, currently based on fdt_clock
- initial support for "resets" FDT property, currently based on the
fdt_reset interface from D5826
- initial support for "pinctrl,bits" functionality via FDT. May be extended
in the future to cover a better and fuller pinctrl implementation
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5827
- machine dependent low level init code
- SoC clocks detection and some utility functions
- Common interface to read/write/modify SoC system control registers, used
by some of the other drivers and utility functions
- simple FDT resets support, based on the fdt_clock implementation already
in the tree. For the moment resets and clocks are managed using these
implementations. I am planning to port those to the new extres framework
in the future, but currently I simply don't have time to do this part too.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5826
On some architectures, u_long isn't large enough for resource definitions.
Particularly, powerpc and arm allow 36-bit (or larger) physical addresses, but
type `long' is only 32-bit. This extends rman's resources to uintmax_t. With
this change, any resource can feasibly be placed anywhere in physical memory
(within the constraints of the driver).
Why uintmax_t and not something machine dependent, or uint64_t? Though it's
possible for uintmax_t to grow, it's highly unlikely it will become 128-bit on
32-bit architectures. 64-bit architectures should have plenty of RAM to absorb
the increase on resource sizes if and when this occurs, and the number of
resources on memory-constrained systems should be sufficiently small as to not
pose a drastic overhead. That being said, uintmax_t was chosen for source
clarity. If it's specified as uint64_t, all printf()-like calls would either
need casts to uintmax_t, or be littered with PRI*64 macros. Casts to uintmax_t
aren't horrible, but it would also bake into the API for
resource_list_print_type() either a hidden assumption that entries get cast to
uintmax_t for printing, or these calls would need the PRI*64 macros. Since
source code is meant to be read more often than written, I chose the clearest
path of simply using uintmax_t.
Tested on a PowerPC p5020-based board, which places all device resources in
0xfxxxxxxxx, and has 8GB RAM.
Regression tested on qemu-system-i386
Regression tested on qemu-system-mips (malta profile)
Tested PAE and devinfo on virtualbox (live CD)
Special thanks to bz for his testing on ARM.
Reviewed By: bz, jhb (previous)
Relnotes: Yes
Sponsored by: Alex Perez/Inertial Computing
Differential Revision: https://reviews.freebsd.org/D4544
is the physical memory size so may be larger than a u_long can hold, e.g.
on ARM with LPAE we could see an address space of up to 40 bits. On ARM
u_long is only 32 bits so the memory size will be truncated, possibly to
zero.
Reported by: bz
Sponsored by: ABT Systems Ltd
Summary:
As part of the migration of rman_res_t to be typed to uintmax_t, memory ranges
must be clamped appropriately for the bus, to prevent completely bogus addresses
from being used.
This is extracted from D4544.
Reviewed By: cem
Sponsored by: Alex Perez/Inertial Computing
Differential Revision: https://reviews.freebsd.org/D5134
Use u_long instead of uint32_t variables to avoid overflow
in case of PA space bigger than 32-bit.
Obtained from: Semihalf
Submitted by: Michal Stanek <mst@semihalf.com>
Sponsored by: Annapurna Labs
Approved by: cognet (mentor)
Reviewed by: andrew, br, wma
Differential revision: https://reviews.freebsd.org/D5393
This simplifies checking for default resource range for bus_alloc_resource(),
and improves readability.
This is part of, and related to, the migration of rman_res_t from u_long to
uintmax_t.
Discussed with: jhb
Suggested by: marcel
will allow for code that uses the old fdt_get_range and fdt_regsize
functions to find a range, map it, access, then unmap to replace this, up
to and including the map, with a call to OF_decode_addr.
As this function should only be used in the early boot code the unmap is
mostly do document we no longer need the mapping as it's a no-op, at least
on arm.
Reviewed by: jhibbits
Sponsored by: ABT Systems Ltd
Differential Revision: https://reviews.freebsd.org/D5258
ucontext_t available. Our code even has XXX comment about this.
Add a bit of compliance by moving struct __ucontext definition into
sys/_ucontext.h and including it into signal.h and sys/ucontext.h.
Several machine/ucontext.h headers were changed to use namespace-safe
types (like uint64_t->__uint64_t) to not depend on sys/types.h.
struct __stack_t from sys/signal.h is made always visible in private
namespace to satisfy sys/_ucontext.h requirements.
Apparently mips _types.h pollutes global namespace with f_register_t
type definition. This commit does not try to fix the issue.
PR: 207079
Reported and tested by: Ting-Wei Lan <lantw44@gmail.com>
Sponsored by: The FreeBSD Foundation
MFC after: 2 weeks
pmap_unmapdev respectively) so that resources are properly managed.
This is work originally done by kan@. Stanislav picked it up as part
of his Mediatek SoC work.
Tested:
* Carambola2, AR933x SoC
Submitted by: Stanislav Galabov <sgalabov@gmail.com>
Reviewed by: kan
Differential Revision: https://reviews.freebsd.org/D5184
This was originall done by kan@.
Submitted by: Stanislav Galabov <sgalabov@gmail.com>
Reviewed by: kan
Differential Revision: https://reviews.freebsd.org/D5184
This is a prelude to intr-ng support for MIPS boards that need it -
notably the CI20 port from kan@ that's upcoming, but also work that
Stanislav is doing for the Mediatek platforms.
This is the initial platform dependent bits in include/intr.h, some
#defines for the nexus code for the intrng initialisation/runtime
bits, some changed naming (which I'll fix later to be the same, much
like what I did for ARM intr-ng) in exception.S, and the first cut
at a PIC.
Stanislav and I refactored out the common code for intrng support,
so the mips intrng definitions are quite small (sys/mips/include/intr.h.)
This is all work done by kan@, which stanislav has been cherry picking
into common code for his mediatek chipset work.
Tested:
* Carambola2 - no regressions (not intr-ng though!)
Submitted by: Stanislav Galabov <sgalabov@gmail.com>
Reviewed by: kan (original author)
Differential Revision: https://reviews.freebsd.org/D5182
clearing hazards.
This revision makes currently known MIPS32 Release 2 and Release 3 CPUs use
the EHB instruction when clearing hazards. So far the MIPS 74K and MIPS1004K
(somewhat) were already using the EHB. Now we add more r2 and r3 CPUs to
this list.
Also, for the cases of MIPS coherent processing systems (currently 1004K,
1074K, interAptiv and proAptiv) - define proper CCA attributes.
Submitted by: Stanislav Galabov <sgalabov@gmail.com>
Reviewed by: imp
Differential Revision: https://reviews.freebsd.org/D5078
This revision does the following renames:
CPU_MIPS24KC -> CPU_MIPS24K
CPU_MIPS74KC -> CPU_MIPS74K
CPU_MIPS1004KC -> CPU_MIPS1004K
It also adds the following new CPU_MIPSxxx options:
CPU_MIPS24KE, CPU_MIPS34K, CPU_MIPS1074K, CPU_INTERAPTIV, CPU_PROAPTIV
CPU_MIPSxxxxKC is limiting and possibly misleading as it implies the
MIPSxxxxK CPU has no FPU.
It would be better if the CPUs are named after their standard functionalities
only and the presence or absence of FPU can then be controlled via the
CPU_HAVEFPU option.
I will send out another dependent revision that moves MIPS 32 r2 and r3
CPUs to use the EHB instruction for clearing hazards instead of NOP/SSNOP.
Submitted by: Stanislav Galabov <sgalabov@gmail.com>
Reviewed by: imp
Differential Revision: https://reviews.freebsd.org/D5077
Use driver settable callbacks for handling of:
- core post reset
- reading actual port speed
Typically, OTG enabled EHCI cores wants setting of USBMODE register,
but this register is not defined in EHCI specification and different
cores can have it on different offset.
Also, for cores with TT extension, actual port speed must be determinable.
But again, EHCI specification not covers this so this patch provides
function for two most common variant of speed bits layout.
Reviewed by: hselasky
Differential Revision: https://reviews.freebsd.org/D5088
POSIX requires these members to be of type void * rather than the
char * inherited from 4BSD. NetBSD and OpenBSD both changed their
fields to void * back in 1998. No new build failures were reported
via an exp-run.
PR: 206503 (exp-run)
Reviewed by: kib
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D5092
Summary:
Migrate to using the semi-opaque type rman_res_t to specify rman resources. For
now, this is still compatible with u_long.
This is step one in migrating rman to use uintmax_t for resources instead of
u_long.
Going forward, this could feasibly be used to specify architecture-specific
definitions of resource ranges, rather than baking a specific integer type into
the API.
This change has been broken out to facilitate MFC'ing drivers back to 10 without
breaking ABI.
Reviewed By: jhb
Sponsored by: Alex Perez/Inertial Computing
Differential Revision: https://reviews.freebsd.org/D5075
providing compiled-in static environment data that is used instead of any
data passed in from a boot loader.
Previously 'env' worked only on i386 and arm xscale systems, because it
required the MD startup code to examine the global envmode variable and
decide whether to use static_env or an environment obtained from the boot
loader, and set the global kern_envp accordingly. Most startup code wasn't
doing so. Making things even more complex, some mips startup code uses an
alternate scheme that involves calling init_static_kenv() to pass an empty
buffer and its size, then uses a series of kern_setenv() calls to populate
that buffer.
Now all MD startup code calls init_static_kenv(), and that routine provides
a single point where envmode is checked and the decision is made whether to
use the compiled-in static_kenv or the values provided by the MD code.
The routine also continues to serve its original purpose for mips; if a
non-zero buffer size is passed the routine installs the empty buffer ready
to accept kern_setenv() values. Now if the size is zero, the provided buffer
full of existing env data is installed. A NULL pointer can be passed if the
boot loader provides no env data; this allows the static env to be installed
if envmode is set to do so.
Most of the work here is a near-mechanical change to call the init function
instead of directly setting kern_envp. A notable exception is in xen/pv.c;
that code was originally installing a buffer full of preformatted env data
along with its non-zero size (like mips code does), which would have allowed
kern_setenv() calls to wipe out the preformatted data. Now it passes a zero
for the size so that the buffer of data it installs is treated as
non-writeable.
These are all works in progress. Notably - no wifi support just yet!
I've booted the MT7620 on a TP-Link Archer C2 via tftpboot.
Submitted by: Stanislav Galabov <sgalabov@gmail.com>
* Add in chipset awareness to the obio bus layout (ie, which devices are
where);
* Add in some USB OTG changes to be aware of the newer stuff;
* Add in a configurable primary console - some chips use the normal UART,
some use UARTLITE.
Tested (by Stanislav);
* RT3050 (NFS)
* RT5350 (NFS, MFS)
* MT7620 (USB)
Submitted by: Stanislav Galabov <sgalabov@gmail.com>
The Ingenic JZ7480 SoC that is on the Imagination Technologies CI20 board
has an L2 cache:
Cache info:
picache_stride = 4096
picache_loopcount = 8
pdcache_stride = 4096
pdcache_loopcount = 8
cpu0: Ingenic Xburst processor v79.2
MMU: Standard TLB, 32 entries
L1 i-cache: 8 ways of 128 sets, 32 bytes per line
L1 d-cache: 8 ways of 128 sets, 32 bytes per line
L2 cache: 8 ways of 256 sets, 128 bytes per line, 256 KiB total size
Config1=0xbe67338b<WatchRegs,EJTAG,FPU>
Config2=0x80000267
Config3=0x20
is what includes machine/ofw_machdep.h. Don't declare OF_decode_addr();
it isn't implemented yet on mips and the declaration for it is about to
be commonized into openfirm.h.
address and use this mechanism when:
1. kmem_alloc_{attr,contig}() can't find suitable free pages in the physical
memory allocator's free page lists. This replaces the long-standing
approach of scanning the inactive and inactive queues, converting clean
pages into PG_CACHED pages and laundering dirty pages. In contrast, the
new mechanism does not use PG_CACHED pages nor does it trigger a large
number of I/O operations.
2. on 32-bit MIPS processors, uma_small_alloc() and the pmap can't find
free pages in the physical memory allocator's free page lists that are
covered by the direct map. Tested by: adrian
3. ttm_bo_global_init() and ttm_vm_page_alloc_dma32() can't find suitable
free pages in the physical memory allocator's free page lists.
In the coming months, I expect that this new mechanism will be applied in
other places. For example, balloon drivers should use relocation to
minimize fragmentation of the guest physical address space.
Make vm_phys_alloc_contig() a little smarter (and more efficient in some
cases). Specifically, use vm_phys_segs[] earlier to avoid scanning free
page lists that can't possibly contain suitable pages.
Reviewed by: kib, markj
Glanced at: jhb
Discussed with: jeff
Sponsored by: EMC / Isilon Storage Division
Differential Revision: https://reviews.freebsd.org/D4444
This is a holdover from how reset is handled in the ARGE_MDIO world.
You need to define the mdio bus device if you want to use the ethernet
device or the arge setup path doesn't bring the MAC out of reset.
http://www.t-es-t.hu/download/mips/md00090c.pdf this is bit 3 of the
config0 word, not bit 2. This should fix virtually indexed caches
(relatively new in the MIPS world, so no current platforms used this
and current code just uses it as an optimization). It was causing
false positives on newer platforms that default to large values for
the kseg0 cache coherency attribute.
Submitted by: Stanislav Galabov
PR: 205249
These helper functions can be used to read in or write a buffer from or to
an arbitrary process' address space. Without them, this can only be done
using proc_rwmem(), which requires the caller to fill out a uio. This is
onerous and results in code duplication; the new functions provide a simpler
interface which is sufficient for most existing callers of proc_rwmem().
This change also adds a manual page for proc_rwmem() and the new functions.
Reviewed by: jhb, kib
Differential Revision: https://reviews.freebsd.org/D4245
sysent.
sv_prepsyscall is unused.
sv_sigsize and sv_sigtbl translate signal number from the FreeBSD
namespace into the ABI domain. It is only utilized on i386 for iBCS2
binaries. The issue with this approach is that signals for iBCS2 were
delivered with the FreeBSD signal frame layout, which does not follow
iBCS2. The same note is true for any other potential user if
sv_sigtbl. In other words, if ABI needs signal number translation, it
really needs custom sv_sendsig method instead.
Sponsored by: The FreeBSD Foundation
created for bus_dma_tag_t tag, bounce pages should be allocated
only if needed.
Before the fix, they were allocated always if BUS_DMA_COULD_BOUNCE flag
was set but BUS_DMA_MIN_ALLOC_COMP not. As bounce pages are never freed,
it could cause memory exhaustion when a lot of such tags together with
their maps were created.
Note that there could be more maps in one tag by current design.
However BUS_DMA_MIN_ALLOC_COMP flag is tag's flag. It's set after
bounce pages are allocated. Thus, they are allocated only for first
tag's map which needs them.
Approved by: kib (mentor)
Extended memory here is "physical memory above 256MB".
"memsize" in the environment only grows to 256MB; "ememsize" is the entire
memory range. Extended memory shows up at physical address 0x90000000.
This allows for malta64 VMs to be created with > 256MB RAM, all the way
up to 2GB RAM.
Tested:
* qemu-devel package; qemu-system-mips64 -m 2048 (and -m 256 to test the
no-ememsize case.)
TODO:
* testing mips32 with > 256MB RAM.
Reviewed by: imp
for the AP143.
Wifi doesn't work on the QCA9533 board, but basic ethernet/ethernet
and ethernet switch support does work.
The AP143 has 32MB RAM and 4MB flash, so this was tested with a USB
rootfs.
Tested:
* QCA9533v2, AP143 reference design board.
Small $25 IoT device, 400mhz Atheros cpu, Atheros WiFi and Ethernet
18 GPIOs, and support for Relay, Servo, and OLED expansion
https://onion.io/omega/
Reviewed by: adrian
Approved by: bapt (mentor)
Relnotes: yes
Sponsored by: ScaleEngine Inc.
Differential Revision: https://reviews.freebsd.org/D4188
The QCA953x SoC is an integrated 2x2 2GHz 11n + MIPS24k core, with
a 5 port FE switch, gige WAN port, and all the same stuff you'd find on
its predecessor - the AR9331.
However, buried deep in here somewhere is also a PCIe EP/RC for various
applications and some other weird bits I don't yet know about.
This is enough to get the reference board up and booting. I haven't yet
had it pass lots of packets - I need to finalise the ethernet switch
bits and the GMAC configuration (ie, how the ethernet ports and switch
are wired up) and I'll bring that in when I commit the base configuration
files to use the thing.
The wifi stuff will come much later. I have to port that support from
Linux ath9k and extend our vendor HAL to support it.
The reference board (AP143) comes with 32MB RAM and 4MB flash, so in order
to use it I need to get USB working fully so I can run root from there.
Thankyou to Qualcomm Atheros for access to the reference design board.
Details:
* Add register definitions from openwrt;
* It looks like a QCA955x but shrunk down to a QCA933x footprint, so
use the QCA955x bits and fix up the clock detection code to do the
QCA953x bits (they're very subtly different);
* Teach GPIO about it;
* Teach EHCI about it;
* Teach if_arge about it;
* Teach the CPU detection code about it.
Tested:
* AP143, QCA9533v2 SoC
Obtained from: Linux, Linux OpenWRT
